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1. 发明授权

US11195838B2 Arrays of capacitors, methods used in forming integrated circuitry, and methods used in forming an array of capacitors 有权
公开(公告)号：US11195838B2
公开(公告)日：2021-12-07
申请号：US16420582
申请日：2019-05-23
申请人： Micron Technology, Inc.
发明人： Scott L. Light
IPC分类号： H01L27/108 , H01L27/11502 , H01L49/02
摘要： A method used in forming integrated circuitry comprises forming an array of structures elevationally through a stack comprising first and second materials. The structures project vertically relative to an outermost portion of the first material. Energy is directed onto vertically-projecting portions of the structures and onto the second material in a direction that is angled from vertical and that is along a straight line between immediately-adjacent of the structures to form openings into the second material that are individually between the immediately-adjacent structures along the straight line. Other embodiments, including structure independent of method, are disclosed.

2. 发明授权

US11158571B2 Devices including conductive interconnect structures, related electronic systems, and related methods 有权
公开(公告)号：US11158571B2
公开(公告)日：2021-10-26
申请号：US16227492
申请日：2018-12-20
申请人： Micron Technology, Inc.
发明人： Jonathan T. Doebler , Scott L. Light
IPC分类号： H01L23/522 , H01L23/532 , H01L21/768
摘要： A semiconductor device comprises conductive lines, a conductive landing pad in electrical communication with a conductive line of the conductive lines, and a conductive interconnect structure in electrical communication with the conductive landing pad. The conductive interconnect structure comprises a contact plug in electrical communication with the conductive landing pad, and a global interconnect contact in electrical communication with the contact plug and having a greater lateral width than the contact plug. Related electronic systems and method are also disclosed.

3. 发明授权

US10998224B2 Semiconductor devices comprising conductive patterns of varying dimensions and related systems 有权
公开(公告)号：US10998224B2
公开(公告)日：2021-05-04
申请号：US16531837
申请日：2019-08-05
申请人： Micron Technology, Inc.
发明人： Scott L. Light , Richard J. Hill
IPC分类号： H01L23/52 , H01L21/768 , H01L21/033 , H01L23/522 , H01L23/528
摘要： A metal pattern comprising interconnected small metal segments, medium metal segments, and large metal segments. At least one of the small metal segments comprises a pitch of less than about 45 nm and the small metal segments, medium metal segments, and large metal segments are separated from one another by variable spacing. Semiconductor devices comprising initial metallizations, systems comprising the metal pattern, and methods of forming a pattern are also disclosed.

4. 发明授权

US09465287B2 Methods of forming patterns for semiconductor device structures 有权
公开(公告)号：US09465287B2
公开(公告)日：2016-10-11
申请号：US14928159
申请日：2015-10-30
申请人： Micron Technology, Inc.
发明人： Scott L. Light , Yuan He , Michael A. Many , Michael Hyatt
IPC分类号： G03F7/00 , G03F7/20 , G03F7/039 , G03F7/075 , G03F7/095 , G03F7/32 , G03F7/40
CPC分类号： G03F7/0035 , G03F7/039 , G03F7/0392 , G03F7/0758 , G03F7/095 , G03F7/2022 , G03F7/32 , G03F7/322 , G03F7/325 , G03F7/405 , H01L21/0273 , H01L21/32139
摘要： Methods of forming a pattern in a semiconductor device structure include deprotecting an outer portion of a first photosensitive resist material, forming a second photosensitive resist material, exposing portions of the first and second photosensitive resist materials to radiation, and removing the deprotected outer portion of the first photosensitive resist material and the exposed portions of the first and second photosensitive resist materials. Additional methods include forming a first resist material over a substrate to include a first portion and a relatively thicker second portion, deprotecting substantially the entire first portion and an outer portion of the second portion while leaving an inner portion of the second portion protected, and forming a second resist material over the substrate. A portion of the second resist material is exposed to radiation, and deprotected and exposed portions of the first and second resist materials are removed.

5. 发明授权

US09153458B2 Methods of forming a pattern on a substrate 有权
标题翻译：在基板上形成图案的方法
公开(公告)号：US09153458B2
公开(公告)日：2015-10-06
申请号：US14064261
申请日：2013-10-28
申请人： Micron Technology, Inc.
发明人： Scott L. Light , Anton deVilliers
IPC分类号： H01L21/311 , H01L21/033
CPC分类号： H01L21/31144 , H01L21/0337 , H01L21/0338
摘要： A method of forming a pattern on a substrate includes forming a repeating pattern of four first lines elevationally over an underlying substrate. A repeating pattern of four second lines is formed elevationally over and crossing the repeating pattern of four first lines. First alternating of the four second lines are removed from being received over the first lines. After the first alternating of the four second lines have been removed, elevationally exposed portions of alternating of the four first lines are removed to the underlying substrate using a remaining second alternating of the four second lines as a mask. Additional embodiments are disclosed and contemplated.
摘要翻译：在衬底上形成图案的方法包括在下面的衬底上形成四个第一线的重复图案。四条第二条线的重复图案在四条第一条线的重复图案的正上方横跨形成。四条第二条线的第一次交替从第一条线路上被接收除去。在四条第二条线的第一次交替已经被去除之后，四条第一条线的交替的高度暴露的部分使用四条第二条线的剩余的第二交替作为掩模被去除到下面的基底。另外的实施例被公开和预期。

6. 发明申请

US20140106280A1 LITHOGRAPHY METHODS, METHODS FOR FORMING PATTERNING TOOLS AND PATTERNING TOOLS 有权
标题翻译：图形方法，形成图案工具和绘图工具的方法
公开(公告)号：US20140106280A1
公开(公告)日：2014-04-17
申请号：US14107767
申请日：2013-12-16
申请人： Micron Technology, Inc.
发明人： Jianming Zhou , Scott L. Light , David Kewley , Prasanna Srinivasan , Anton deVilliers
IPC分类号： G03F7/20
CPC分类号： G03F7/20 , G03F1/26 , G03F1/32 , G03F7/70433 , G03F7/70883
摘要： Methods of lithography, methods for forming patterning tools, and patterning tools are described. One such patterning tool include an active region that forms a first diffraction image on a lens when in use, and an inactive region that forms a second diffraction image on a lens when in use. The inactive region includes a pattern of phase shifting features formed in a substantially transparent material of the patterning tool. Patterning tools and methods, as described, can be used to compensate for lens distortion from effects such as localized heating.
摘要翻译：描述了光刻方法，用于形成图案形成工具的方法和图案形成工具。一种这样的图案形成工具包括在使用时在透镜上形成第一衍射图像的有源区域和在使用时在透镜上形成第二衍射图像的非活性区域。非活性区域包括形成在图案形成工具的基本上透明的材料中的相移特征的图案。如所描述的图案化工具和方法可用于补偿透镜失真，例如局部加热等影响。

7. 发明申请

US20140051251A1 Methods Of Forming a Pattern on a Substrate 有权
标题翻译：在基材上形成图案的方法
公开(公告)号：US20140051251A1
公开(公告)日：2014-02-20
申请号：US14064261
申请日：2013-10-28
申请人： Micron Technology, Inc.
发明人： Scott L. Light , Anton deVilliers
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , H01L21/0337 , H01L21/0338
摘要： A method of forming a pattern on a substrate includes forming a repeating pattern of four first lines elevationally over an underlying substrate. A repeating pattern of four second lines is formed elevationally over and crossing the repeating pattern of four first lines. First alternating of the four second lines are removed from being received over the first lines. After the first alternating of the four second lines have been removed, elevationally exposed portions of alternating of the four first lines are removed to the underlying substrate using a remaining second alternating of the four second lines as a mask. Additional embodiments are disclosed and contemplated.
摘要翻译：在衬底上形成图案的方法包括在下面的衬底上形成四个第一线的重复图案。四条第二条线的重复图案在四条第一条线的重复图案的正上方横跨形成。四条第二条线的第一次交替从第一条线路上被接收除去。在四条第二条线的第一次交替已经被去除之后，四条第一条线的交替的高度暴露的部分使用四条第二条线的剩余的第二交替作为掩模被去除到下面的基底。另外的实施例被公开和预期。

8. 发明公开

US20230317601A1 MICROELECTRONIC DEVICES WITH STAIRCASED STADIUMS AND BOTH THROUGH-STEP AND TO-STEP CONTACTS, AND RELATED SYSTEMS AND METHODS 审中-公开
公开(公告)号：US20230317601A1
公开(公告)日：2023-10-05
申请号：US17709020
申请日：2022-03-30
申请人： Micron Technology, Inc.
发明人： Harsh Narendrakumar Jain , Scott L. Light , Shruthi Kumara Vadivel , Shuangqiang Luo
IPC分类号： H01L23/528 , H01L21/768
CPC分类号： H01L23/528 , H01L21/76895
摘要： Microelectronic devices include a tiered stack comprising a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A stadium within the tiered stack includes a staircase with steps at ends of some of the tiers. The steps each have a tread provided by an upper surface portion of one of the conductive structures. Conductive contact structures extend to one of the steps and include a first conductive contact structure terminating at the tread of the step and a second conductive contact structure extending through the tread of the step. Related fabrication methods and electronic systems are also disclosed.

9. 发明授权

US10522395B1 Methods of forming a pattern 有权
公开(公告)号：US10522395B1
公开(公告)日：2019-12-31
申请号：US16107407
申请日：2018-08-21
申请人： Micron Technology, Inc.
发明人： Scott L. Light , Richard J. Hill
IPC分类号： H01L23/52 , H01L21/768 , H01L21/033 , H01L23/522 , H01L23/528
摘要： A metal pattern comprising interconnected small metal segments, medium metal segments, and large metal segments. At least one of the small metal segments comprises a pitch of less than about 45 nm and the small metal segments, medium metal segments, and large metal segments are separated from one another by variable spacing. Semiconductor devices comprising initial metallizations, systems comprising the metal pattern, and methods of forming a pattern are also disclosed.

10. 发明授权

US09583381B2 Methods for forming semiconductor devices and semiconductor device structures 有权
标题翻译：用于形成半导体器件和半导体器件结构的方法
公开(公告)号：US09583381B2
公开(公告)日：2017-02-28
申请号：US13918065
申请日：2013-06-14
申请人： Micron Technology, Inc.
发明人： Ranjan Khurana , Michael Hyatt , Scott L. Light , Kevin J. Torek , Anton J. deVilliers
IPC分类号： H01L21/311 , H01L21/312 , H01L21/32 , G03F7/26 , H01L21/768 , H01L21/027 , H01L21/033 , G03F7/095 , G03F7/00 , H01L49/02
CPC分类号： H01L21/76816 , G03F7/0035 , G03F7/095 , H01L21/0273 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L28/90
摘要： Methods of forming semiconductor devices and features in semiconductor device structures include conducting an anti-spacer process to remove portions of a first mask material to form first openings extending in a first direction. Another anti-spacer process is conducted to remove portions of the first mask material to form second openings extending in a second direction at an angle to the first direction. Portions of a second mask material underlying the first mask material at intersections of the first openings and second openings are removed to form holes in the second mask material and to expose a substrate underlying the second mask material.
摘要翻译：在半导体器件结构中形成半导体器件和特征的方法包括进行防间隔工艺以去除第一掩模材料的部分以形成沿第一方向延伸的第一开口。进行另一个防间隔处理以去除第一掩模材料的部分，以形成沿与第一方向成角度的第二方向延伸的第二开口。去除在第一开口和第二开口的交叉点处的第一掩模材料下面的第二掩模材料的部分，以在第二掩模材料中形成孔并暴露第二掩模材料下面的衬底。

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