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1. 发明公开

EP1128595A3 Synchronisation of a radio reception apparatus 审中-公开
标题翻译：无线电接收器装置的同步
公开(公告)号：EP1128595A3
公开(公告)日：2005-08-10
申请号：EP01103878.3
申请日：2001-02-16
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Orihashi, Masayuki , Abe, Katsuaki , Msuya, Job Cleopa , Sagawa, Morikazu , Yoneyama, Masayoshi
IPC分类号： H04L7/04 , H04L27/22
CPC分类号： H04L27/22 , H04L7/042 , H04L2027/0028
摘要： Convolver 104 calculates convolution integration between symbol number s given by calculation length determination section 118 of a series of known signals sequentially output from known signal storage section 103 and a series of signals corresponding to s symbols selected at symbol intervals from the reception signal series stored in shift register 102 and difference calculation section 105 calculates difference vectors corresponding to 1 symbol of the signal series subjected to convolution integration. Addition section 106 sequentially adds up the calculated difference vectors, calculates addition difference vectors in the same way by shifting the reception signal series 1 sample at a time, memory 107 stores the time of shifting in association with the addition difference vectors and detection section 108 detects parts that satisfy a specific condition from the vectors stored in memory 107.

2. 发明公开

EP1085690A3 Reception apparatus and method 审中-公开
标题翻译：装置和方法的用于接收的
公开(公告)号：EP1085690A3
公开(公告)日：2005-08-10
申请号：EP00120026.0
申请日：2000-09-14
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Abe, Katsuaki , Orihashi, Masayuki , Msuya, Job Cleopa , Sagawa, Morikazu , Yoneyama, Masayoshi
IPC分类号： H04L7/02
CPC分类号： H04L7/042 , H04L7/0004 , H04L7/007 , H04L7/0334
摘要： A phase of a sampling clock provided from clock generating circuit 107 is switched periodically and alternately with a phase difference of 180 degrees, and during a period of each phase, timing estimating circuit 105 estimates a symbol timing. High-accuracy timing estimating circuit 109 selects an estimated result with higher reliability among symbol timing estimated results obtained in respective periods, thereby enabling estimation of the symbol timing with time resolution twice a sampling period. It is possible to decrease an operation frequency in an A/D conversion circuit even in a system requiring timing synchronization accuracy with high accuracy.

3. 发明公开

EP1128595A2 Synchronisation of a radio reception apparatus 审中-公开
标题翻译： Synchronisierung einesRadioempfangsgeräts
公开(公告)号：EP1128595A2
公开(公告)日：2001-08-29
申请号：EP01103878.3
申请日：2001-02-16
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Orihashi, Masayuki , Abe, Katsuaki , Msuya, Job Cleopa , Sagawa, Morikazu , Yoneyama, Masayoshi
IPC分类号： H04L7/04 , H04L27/22
CPC分类号： H04L27/22 , H04L7/042 , H04L2027/0028
摘要： Convolver 104 calculates convolution integration between symbol number s given by calculation length determination section 118 of a series of known signals sequentially output from known signal storage section 103 and a series of signals corresponding to s symbols selected at symbol intervals from the reception signal series stored in shift register 102 and difference calculation section 105 calculates difference vectors corresponding to 1 symbol of the signal series subjected to convolution integration. Addition section 106 sequentially adds up the calculated difference vectors, calculates addition difference vectors in the same way by shifting the reception signal series 1 sample at a time, memory 107 stores the time of shifting in association with the addition difference vectors and detection section 108 detects parts that satisfy a specific condition from the vectors stored in memory 107.
摘要翻译：卷积器104计算从已知信号存储部103顺序输出的一系列已知信号的计算长度确定部分118给出的符号数s之间的卷积积分和对应于从存储在存储部分103中的接收信号序列以符号间隔选择的s个符号的一系列信号移位寄存器102和差分计算部分105计算对应于经历卷积积分的信号序列的1个符号的差分矢量。加法部106将计算出的差分矢量顺序相加，通过一次移位接收信号序列1个样本，以相同的方式计算加法差分矢量，存储器107与加法差分矢量相关联地存储移位时间，检测部108检测满足存储在存储器107中的矢量的特定条件的部分。

4. 发明公开

EP1085690A2 Reception apparatus and method 审中-公开
标题翻译： Vorrichtung und Verfahren zum Empfang
公开(公告)号：EP1085690A2
公开(公告)日：2001-03-21
申请号：EP00120026.0
申请日：2000-09-14
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Abe, Katsuaki , Orihashi, Masayuki , Msuya, Job Cleopa , Sagawa, Morikazu , Yoneyama, Masayoshi
IPC分类号： H04L7/033
CPC分类号： H04L7/042 , H04L7/0004 , H04L7/007 , H04L7/0334
摘要： A phase of a sampling clock provided from clock generating circuit 107 is switched periodically and alternately with a phase difference of 180 degrees, and during a period of each phase, timing estimating circuit 105 estimates a symbol timing. High-accuracy timing estimating circuit 109 selects an estimated result with higher reliability among symbol timing estimated results obtained in respective periods, thereby enabling estimation of the symbol timing with time resolution twice a sampling period. It is possible to decrease an operation frequency in an A/D conversion circuit even in a system requiring timing synchronization accuracy with high accuracy.
摘要翻译：从时钟发生电路107提供的采样时钟的相位以180度的相位差周期性地交替地切换，并且在每个相位的周期期间，定时估计电路105估计符号定时。高精度定时估计电路109在各周期中获得的符号定时估计结果中选择具有较高可靠性的估计结果，从而能够以采样周期两倍的时间分辨率来估计符号定时。即使在需要高精度的定时同步精度的系统中也可以降低A / D转换电路的工作频率。

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