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1. 发明公开

EP1631980A2 METHODS OF INCORPORATING GERMANIUM WITHIN CMOS PROCESS 有权转让
标题翻译：方法INTEGRATE锗CMOS工艺的
公开(公告)号：EP1631980A2
公开(公告)日：2006-03-08
申请号：EP04718583.0
申请日：2004-03-08
申请人： Luxtera, Inc. , Gunn, Lawrence C. III
发明人： GUNN III, Lawrence, C. , CAPELLINI, Giovanni , RATTIER, Maxime, J. , PINGUET, Thierry, J.
IPC分类号： H01L21/20
CPC分类号： H01L21/823878 , H01L21/8238 , Y10S438/958
摘要： Methods for deposition of a Ge layer during a CMOS process on a monolithic device are disclosed. The insertion of the Ge layer enables the conversion of light to electrical signals easily. As a result of this method, standard metals can be attached directly to the Ge in completing an electrical circuit. Vias can also be used to connect to the Ge layer. In a first aspect of the invention, a method comprises the step of incorporating the deposition of Ge at multiple temperatures in a standard CMOS process. In a second aspect of the invention, a method comprises the step of incorporating the deposition of poly-Ge growth in a standard CMOS process.

2. 发明申请

WO2008128202A2 DESIGN OF CMOS INTEGRATED GERMANIUM PHOTODIODES 审中-公开
标题翻译： CMOS集成锗片光刻胶的设计
公开(公告)号：WO2008128202A2
公开(公告)日：2008-10-23
申请号：PCT/US2008/060268
申请日：2008-04-14
申请人： LUXTERA, INC. , WITZENS, Jeremy , MASINI, Gianlorenzo , CAPELLINI, Giovanni , GUNN, III, Lawrence, C.
发明人： WITZENS, Jeremy , MASINI, Gianlorenzo , CAPELLINI, Giovanni , GUNN, III, Lawrence, C.
IPC分类号： C03B37/023 , G02B6/12 , G02B6/26 , H01S3/083
CPC分类号： G02B6/12007
摘要： A CMOS processing compatible germanium on silicon integrated waveguide photodiode. Positioning contacts in predicted low optical field regions, establishing side trenches in the silicon layer along the length of the photodiode reduces optical losses. Novel taper dimensions are selected based on the desirability of expected operational modes, reducing optical losses when light is injected from the silicon layer to the germanium layer. Reduced vertical mismatch systems have improved coupling between waveguide and photodiode. Light is coupled into and/or out of a novel silicon ring resonator and integrated waveguide photodiode system with reduced optical losses by careful design of the geometry of the optical path. An integrated waveguide photodiode with a reflector enables transmitted light to reflect back through the integrated waveguide photodiode, improving sensitivity. Careful selection of the dimensions of a novel integrated waveguide microdisk photodiode system results in reduced scattering. Improved sensitivity integrated waveguide photodiodes comprise integrated heaters.
摘要翻译： CMOS处理兼容锗硅集成波导光电二极管。在预测的低光场区域中定位触点，沿着光电二极管的长度在硅层中建立侧沟槽减少光损耗。基于期望的操作模式的期望来选择新的锥形尺寸，当光从硅层注入到锗层时减小光学损耗。减少的垂直失配系统改善了波导和光电二极管之间的耦合。通过仔细设计光路的几何形状，光被耦合到新的硅环谐振器和集成波导光电二极管系统中并减少光损耗。具有反射器的集成波导光电二极管使透射光能够通过集成波导光电二极管反射回来，提高灵敏度。仔细选择新型集成波导微盘光电二极管系统的尺寸导致散射减少。集成波导光电二极管的灵敏度提高集成加热器。

3. 发明申请

WO2005006406A2 METHODS OF INCORPORATING GERMANIUM WITHIN CMOS PROCESS 审中-公开
标题翻译：在CMOS工艺中掺入锗的方法
公开(公告)号：WO2005006406A2
公开(公告)日：2005-01-20
申请号：PCT/US2004/007126
申请日：2004-03-08
申请人： LUXTERA, INC. , GUNN III, Lawrence, C. , CAPELLINI, Giovanni , RATTIER, Maxime, J. , PINGUET, Thierry, J.
发明人： GUNN III, Lawrence, C. , CAPELLINI, Giovanni , RATTIER, Maxime, J. , PINGUET, Thierry, J.
IPC分类号： H01L
CPC分类号： H01L21/823878 , H01L21/8238 , Y10S438/958
摘要： Methods for deposition of a Ge layer during a CMOS process on a monolithic device are disclosed. The insertion of the Ge layer enables the conversion of light to electrical signals easily. As a result of this method, standard metals can be attached directly to the Ge in completing an electrical circuit. Vias can also be used to connect to the Ge layer. In a first aspect of the invention, a method comprises the step of incorporating the deposition of Ge at multiple temperatures in a standard CMOS process. In a second aspect of the invention, a method comprises the step of incorporating the deposition of poly-Ge growth in a standard CMOS process.
摘要翻译：公开了在CMOS工艺期间在单片器件上沉积锗层的方法。 Ge层的插入使得光易于转换为电信号。作为这种方法的结果，标准金属可以直接附着在Ge上以完成电路。过孔也可以用来连接到Ge层。在本发明的第一方面，一种方法包括在多个温度下在标准CMOS工艺中结合Ge沉积的步骤。在本发明的第二方面，一种方法包括在标准CMOS工艺中结合多Ge生长的沉积的步骤。

4. 发明授权

EP1631980B1 METHODS OF INCORPORATING GERMANIUM WITHIN CMOS PROCESS 有权转让
公开(公告)号：EP1631980B1
公开(公告)日：2018-08-15
申请号：EP04718583.0
申请日：2004-03-08
申请人： Luxtera, Inc. , Gunn III, Lawrence C.
发明人： GUNN III, Lawrence, C. , CAPELLINI, Giovanni , RATTIER, Maxime, J. , PINGUET, Thierry, J.
IPC分类号： H01L21/8238 , H01L21/20 , H01L21/205 , H01L27/144
CPC分类号： H01L21/823878 , H01L21/8238 , Y10S438/958
摘要： Methods for deposition of a Ge layer during a CMOS process on a monolithic device are disclosed. The insertion of the Ge layer enables the conversion of light to electrical signals easily. As a result of this method, standard metals can be attached directly to the Ge in completing an electrical circuit. Vias can also be used to connect to the Ge layer. In a first aspect of the invention, a method comprises the step of incorporating the deposition of Ge at multiple temperatures in a standard CMOS process. In a second aspect of the invention, a method comprises the step of incorporating the deposition of poly-Ge growth in a standard CMOS process.

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