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1. 发明授权

US08198174B2 Air channel interconnects for 3-D integration 有权
标题翻译：空气通道互连用于3-D集成
公开(公告)号：US08198174B2
公开(公告)日：2012-06-12
申请号：US12536176
申请日：2009-08-05
申请人： Louis L. Hsu , Brian L. Ji , Fei Liu , Conal E. Murray
发明人： Louis L. Hsu , Brian L. Ji , Fei Liu , Conal E. Murray
IPC分类号： H01L21/44
CPC分类号： H01L23/467 , H01L21/76898 , H01L23/481 , H01L25/0657 , H01L25/50 , H01L2225/06513 , H01L2225/06541 , H01L2225/06589 , H01L2924/0002 , H01L2924/00
摘要： A three-dimensional (3D) chip stack structure and method of fabricating the structure thereof are provided. The 3D chip stack structure includes a plurality of vertically stacked chips which are interconnected and bonded together, wherein each of the vertically stacked chips include one or more IC device strata. The 3D chip stack structure further includes an air channel interconnect network embedded within the chip stack structure, and wherein the air channel interconnect network is formed in between at least two wafers bonded to each other of the vertically stacked wafers and in between at least two bonded wafers of the vertically stacked wafers at a bonding interface thereof. In addition, the 3D chip stack structure further includes one or more openings in a peripheral region of the chip stack structure that lead into and out of the air channel interconnect network, so that air can flow into and out of the air channel interconnect network through the one or more openings to remove heat from the chip stack structure.
摘要翻译：提供三维（3D）芯片堆叠结构及其结构的制造方法。 3D芯片堆叠结构包括互连并结合在一起的多个垂直堆叠的芯片，其中每个垂直堆叠的芯片包括一个或多个IC器件层。 3D芯片堆叠结构还包括嵌入在芯片堆叠结构内的空气通道互连网络，并且其中空气通道互连网络形成在至少两个晶片之间，所述至少两个晶片彼此接合在垂直堆叠的晶片之间，并且在至少两个结合在其接合界面处的垂直堆叠的晶片的晶片。此外，3D芯片堆叠结构还包括在芯片堆叠结构的外围区域中的一个或多个开口，其引入和流出空气通道互连网络，使得空气可以流入和流出空气通道互连网络，通过一个或多个开口以从芯片堆叠结构移除热量。

2. 发明申请

US20110031633A1 AIR CHANNEL INTERCONNECTS FOR 3-D INTEGRATION 有权
标题翻译：用于三维集成的空气通道互连
公开(公告)号：US20110031633A1
公开(公告)日：2011-02-10
申请号：US12536176
申请日：2009-08-05
申请人： Louis L. Hsu , Brain L. Ji , Fei Liu , Conal E. Murray
发明人： Louis L. Hsu , Brain L. Ji , Fei Liu , Conal E. Murray
IPC分类号： H01L23/532 , H01L21/50 , H01L21/768
CPC分类号： H01L23/467 , H01L21/76898 , H01L23/481 , H01L25/0657 , H01L25/50 , H01L2225/06513 , H01L2225/06541 , H01L2225/06589 , H01L2924/0002 , H01L2924/00
摘要： A three-dimensional (3D) chip stack structure and method of fabricating the structure thereof are provided. The 3D chip stack structure includes a plurality of vertically stacked chips which are interconnected and bonded together, wherein each of the vertically stacked chips include one or more IC device strata. The 3D chip stack structure further includes an air channel interconnect network embedded within the chip stack structure, and wherein the air channel interconnect network is formed in between at least two wafers bonded to each other of the vertically stacked wafers and in between at least two bonded wafers of the vertically stacked wafers at a bonding interface thereof. In addition, the 3D chip stack structure further includes one or more openings in a peripheral region of the chip stack structure that lead into and out of the air channel interconnect network, so that air can flow into and out of the air channel interconnect network through the one or more openings to remove heat from the chip stack structure.
摘要翻译：提供三维（3D）芯片堆叠结构及其结构的制造方法。 3D芯片堆叠结构包括互连并结合在一起的多个垂直堆叠的芯片，其中每个垂直堆叠的芯片包括一个或多个IC器件层。 3D芯片堆叠结构还包括嵌入在芯片堆叠结构内的空气通道互连网络，并且其中空气通道互连网络形成在至少两个晶片之间，所述至少两个晶片彼此接合在垂直堆叠的晶片之间，并且在至少两个结合在其接合界面处的垂直堆叠的晶片的晶片。此外，3D芯片堆叠结构还包括在芯片堆叠结构的外围区域中的一个或多个开口，其引入和流出空气通道互连网络，使得空气可以流入和流出空气通道互连网络，通过一个或多个开口以从芯片堆叠结构移除热量。

3. 发明申请

US20120286377A1 Nanoelectromechanical Structures Exhibiting Tensile Stress And Techniques For Fabrication Thereof 审中-公开
标题翻译：展示拉伸应力的纳米机电结构及其制造技术
公开(公告)号：US20120286377A1
公开(公告)日：2012-11-15
申请号：US13103193
申请日：2011-05-09
申请人： Josephine B. Chang , Sebastian U. Engelmann , Michael A. Guillorn , Fei Liu , Conal E. Murray
发明人： Josephine B. Chang , Sebastian U. Engelmann , Michael A. Guillorn , Fei Liu , Conal E. Murray
IPC分类号： H01L29/84 , H01L21/3105 , H01L29/06
CPC分类号： H01L29/84 , B81B3/0072 , B81B2203/0109 , B81B2203/0307 , H01L29/0673
摘要： Improved nano-electromechanical system devices and structures and systems and techniques for their fabrication. In one embodiment, a structure comprises an underlying substrate separated from first and second anchor points by first and second insulating support points, respectively. The first and second anchor points are joined by a beam. First and second deposition regions overlie the first and second anchor points, respectively, and the first and second deposition regions exert compression on the first and second anchor points, respectively. The compression on the first and second anchor points causes opposing forces on the beam, subjecting the beam to a tensile stress. The first and second deposition regions suitably exhibit an internal tensile stress having an achievable maximum varying with their thickness, so that the tensile stress exerted on the beam depends at least on part on the thickness of the first and second deposition regions.
摘要翻译：改进的纳米机电系统设备及其制造的结构及系统和技术。在一个实施例中，结构包括分别通过第一和第二绝缘支撑点从第一和第二锚定点分离的下面的基底。第一和第二锚定点通过梁连接。第一和第二沉积区域分别覆盖在第一和第二锚定点上，并且第一和第二沉积区域分别在第一和第二锚定点上施加压缩。第一和第二锚固点上的压缩在梁上产生相反的力，使梁受到拉伸应力。第一和第二沉积区域适当地呈现具有随其厚度变化的可实现最大值的内部拉伸应力，使得施加在梁上的拉伸应力至少部分地取决于第一和第二沉积区域的厚度。

4. 发明授权

US10209853B2 System and method for dialog-enabled context-dependent and user-centric content presentation 有权
公开(公告)号：US10209853B2
公开(公告)日：2019-02-19
申请号：US15104695
申请日：2014-12-11
申请人： Robert Bosch GmbH , Fuliang Weng , Kui Xu , Fei Liu , Lin Zhao , Zhe Feng , Zhongnan Shen
发明人： Fuliang Weng , Kui Xu , Fei Liu , Lin Zhao , Zhe Feng , Zhongnan Shen
IPC分类号： G06F3/0481 , G06F9/451 , G06F3/01 , G06Q30/02 , G10L15/22 , G06F3/0488 , B60K35/00 , H04L29/06 , H04L29/08
摘要： An in-vehicle infotainment system, smart home information access and device control unit, or mobile system presents summarized information to a user based on a user preference model that is associated with the user. The system modifies the presentation of information to the user based on environmental context data about the vehicle and user context data about the activity of the user. During presentation of the information, the system modifies the content and presentation of the summarized information in response to multi-modal input requests from the user.

5. 发明申请

US20160117373A1 Data Segmentation and Visualization 审中-公开
标题翻译：数据分段和可视化
公开(公告)号：US20160117373A1
公开(公告)日：2016-04-28
申请号：US14898067
申请日：2013-06-13
申请人： Yingnong DANG , Dongmei ZHANG , Rui Justin DING , Fei LIU , Haoyu JIANG , MICROSOFT TECHNOLOGY LICENSING, LLC
发明人： Yingnong Dang , Rui Ding , Haoyu Jiang , Fei Liu , Dongmei Zhang
IPC分类号： G06F17/30
CPC分类号： G06F16/26 , G06F16/27 , G06F16/287
摘要： The techniques described herein provide tools that summarize a dataset by creating a final set of segments that, when visually presented via a histogram or other data presentation tool, show the distribution of at least a portion of the data. To create the final set of segments, the techniques described herein may collect or receive a dataset with distinct values, and divide the dataset into a number of segments that is less than or equal to a segment presentation threshold (e.g., ten segments). After creating the final set of segments, the techniques may configure and/or present data visualizations, such as histograms, for the created segments so that an observer is provided with a good viewing experience.
摘要翻译：本文描述的技术提供了通过创建最终的段集合来总结数据集的工具，当通过直方图或其他数据呈现工具直观呈现时，该组段显示数据的至少一部分的分布。为了创建最终的段集合，本文描述的技术可以收集或接收具有不同值的数据集，并将数据集划分成小于或等于段呈现阈值（例如，10个段）的多个段。在创建最后一组片段之后，技术可以为创建的片段配置和/或呈现诸如直方图的数据可视化，使得向观察者提供良好的观看体验。

6. 发明授权

US09121909B2 Method for estimating state-of-charge of lithium ion battery 有权
标题翻译：锂离子电池的充电状态估计方法
公开(公告)号：US09121909B2
公开(公告)日：2015-09-01
申请号：US13695414
申请日：2011-03-14
申请人： Fei Liu , Xusong Ruan , Feng Wen
发明人： Fei Liu , Xusong Ruan , Feng Wen
IPC分类号： G01N27/416 , G01R31/36
CPC分类号： G01R31/361 , G01R31/3624
摘要： The invention relates to the technical field of lithium-ion batteries, in particular to a method for estimating the state of charge of a lithium-ion battery. The method includes: charging a lithium-ion battery, recording multiple groups of ampere-hour integral values, and states of charge and voltage values corresponding to the ampere-hour integral values; taking the maximum value in the multiple groups of ampere-hour integral values as the first ampere-hour integral value, the state of charge corresponding to the first ampere-hour integral value as the first state of charge, and the voltage value corresponding to the first ampere-hour integral value as the first voltage value; monitoring the lithium-ion battery in real time, recording a real-time second ampere-hour integral value and a second voltage value, obtaining a second state of charge by an ampere-hour measuring method; and if the second voltage value is consistent with the first voltage value and the second state of charge is inconsistent with the first state of charge, replacing the second state of charge with the first state of charge. The invention increases the reliable evidence for judging the online equalization of the battery pack and most importantly avoids the situation where the state of charge of the battery can be corrected only on condition that the battery pack works at the extreme state of charge, and lowers the influences of the full charge and discharge on the lifetime of the battery.
摘要翻译：本发明涉及锂离子电池的技术领域，特别涉及一种用于估计锂离子电池的充电状态的方法。该方法包括：对锂离子电池充电，记录多组安培小时积分值，以及对应于安培小时积分值的充电状态和电压值; 将多组安培小时积分值中的最大值作为第一安培小时积分值，对应于作为第一充电状态的第一安培小时积分值的充电状态和对应于第一安培小时积分值作为第一电压值; 实时监控锂离子电池，记录实时第二安培小时积分值和第二电压值，通过安培小时测量方法获得第二充电状态; 并且如果所述第二电压值与所述第一电压值一致并且所述第二充电状态与所述第一充电状态不一致，则用所述第一充电状态代替所述第二充电状态。本发明增加了用于判断电池组的在线均衡的可靠证据，最重要的是避免了仅在电池组工作在极端充电状态的情况下可以仅修正电池的充电状态的情况，并且降低充电和放电对电池寿命的影响。

7. 发明授权

US08962448B2 Computer readable medium encoded with a program for fabricating 3D integrated circuit device using interface wafer as permanent carrier 有权
标题翻译：用用于制造使用界面晶片作为永久载体的3D集成电路器件的程序编码的计算机可读介质
公开(公告)号：US08962448B2
公开(公告)日：2015-02-24
申请号：US13572004
申请日：2012-08-10
申请人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Fei Liu , Sampath Purushothaman , Albert M. Young , Roy R. Yu
发明人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Fei Liu , Sampath Purushothaman , Albert M. Young , Roy R. Yu
IPC分类号： H01L21/46
CPC分类号： H01L25/0657 , H01L21/6835 , H01L25/18 , H01L25/50 , H01L2221/68377 , H01L2224/0401 , H01L2224/05001 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05558 , H01L2224/05568 , H01L2224/0557 , H01L2224/056 , H01L2224/131 , H01L2224/16227 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/73153 , H01L2224/73253 , H01L2224/83121 , H01L2224/83895 , H01L2224/92242 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2225/06593 , H01L2924/10253 , H01L2924/14 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1436 , H01L2924/1437 , H01L2924/15311 , H01L2924/157 , H01L2924/37001 , H01L2224/83 , H01L2224/11 , H01L2924/014 , H01L2924/00014
摘要： A computer readable medium is provided that is encoded with a program comprising instructions for performing a method for fabricating a 3D integrated circuit structure. Provided are an interface wafer including a first wiring layer and through-silicon vias, and a first active circuitry layer wafer including active circuitry. The first active circuitry layer wafer is bonded to the interface wafer. Then, a first portion of the first active circuitry layer wafer is removed such that a second portion remains attached to the interface wafer. A stack structure including the interface wafer and the second portion of the first active circuitry layer wafer is bonded to a base wafer. Next, the interface wafer is thinned so as to form an interface layer, and metallizations coupled through the through-silicon vias in the interface layer to the first wiring layer are formed on the interface layer.
摘要翻译：提供了一种计算机可读介质，其由包括用于执行制造3D集成电路结构的方法的指令的程序编码。提供了包括第一布线层和穿硅通孔的接口晶片，以及包括有源电路的第一有源电路层晶片。第一有源电路层晶片被结合到界面晶片。然后，去除第一有源电路层晶片的第一部分，使得第二部分保持附着到界面晶片。包括接口晶片和第一有源电路层晶片的第二部分的堆叠结构被结合到基底晶片。接下来，将界面晶片减薄以形成界面层，并且在界面层上形成通过界面层中的穿硅通孔耦合到第一布线层的金属化。

8. 发明申请

US20130053560A1 LAMIVUDINE OXALATE AND PREPARATION METHOD THEREOF 有权
标题翻译：柠檬酸盐及其制备方法
公开(公告)号：US20130053560A1
公开(公告)日：2013-02-28
申请号：US13581268
申请日：2010-12-23
申请人： Yanlong LIU , Fei Liu , Xiaquan Zhang
发明人： Yanlong LIU , Fei Liu , Xiaquan Zhang
IPC分类号： C07D411/04
CPC分类号： C07D411/04
摘要： Lamivudine oxalate, preparation method and crystalline forms thereof are disclosed. A preparation method of Lamivudine is also disclosed.
摘要翻译：公开了草药拉米夫定，其制备方法和结晶形式。还公开了拉米夫定的制备方法。

9. 发明申请

US20120278051A1 ANOMALY DETECTION, FORECASTING AND ROOT CAUSE ANALYSIS OF ENERGY CONSUMPTION FOR A PORTFOLIO OF BUILDINGS USING MULTI-STEP STATISTICAL MODELING 有权
标题翻译：异常检测，预测和根本原因分析使用多步统计建模的建筑物组合能源消耗
公开(公告)号：US20120278051A1
公开(公告)日：2012-11-01
申请号：US13098044
申请日：2011-04-29
申请人： Huijing Jiang , Young Min Lee , Fei Liu
发明人： Huijing Jiang , Young Min Lee , Fei Liu
IPC分类号： G06F17/10 , G06F19/00 , G01R19/00
CPC分类号： G06Q10/04 , G06Q50/06
摘要： Multi-step statistical modeling in one embodiment of the present disclosure enables anomaly detection, forecasting and/or root cause analysis of the energy consumption for a portfolio of buildings using multi-step statistical modeling. In one aspect, energy consumption data associated with a building, building characteristic data associated with the building, building operation and activities data associated with the building, and weather data are used to generate a variable based degree model. A base load factor, a heating coefficient and a cooling coefficient associated with the building and an error term are determined from the variable based degree model and used to generate a plurality of multivariate regression models. A time series model is generated for the error term to model seasonal factors which reflect monthly dependence on energy use and an auto-regressive integrated moving average model (ARIMA) which reflects temporal dependent patterns of the energy use.
摘要翻译：在本公开的一个实施例中的多步统计建模使得能够使用多步统计建模对建筑物组合的能量消耗进行异常检测，预测和/或根本原因分析。一方面，使用与建筑物相关联的能量消耗数据，构建与建筑物相关联的特征数据，建筑物操作和与建筑物相关联的活动数据以及天气数据来生成基于变量的度模型。从基于变量的度模型确定基础负荷因子，与建筑物相关联的加热系数和冷却系数以及误差项，并用于产生多个多元回归模型。为误差项生成时间序列模型，以模拟每月依赖能源使用的季节因素和反映能量使用的时间依赖模式的自回归积分移动平均模型（ARIMA）。

10. 发明申请

US20120181508A1 Graphene Devices and Silicon Field Effect Transistors in 3D Hybrid Integrated Circuits 有权
标题翻译：三维混合集成电路中的石墨烯器件和硅场效应晶体管
公开(公告)号：US20120181508A1
公开(公告)日：2012-07-19
申请号：US13009280
申请日：2011-01-19
申请人： Josephine B. Chang , Wilfried E. Haensch , Fei Liu , Zihong Liu
发明人： Josephine B. Chang , Wilfried E. Haensch , Fei Liu , Zihong Liu
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/0688 , H01L21/28506 , H01L21/8221 , H01L29/1606 , H01L29/66045 , H01L29/78 , H01L29/78684
摘要： A three dimensional integrated circuit includes a silicon substrate, a first source region disposed on the substrate, a first drain region disposed on the substrate, a first gate stack portion disposed on the substrate, a first dielectric layer disposed on the first source region, the first drain region, the first gate stack portion, and the substrate, a second dielectric layer formed on the first dielectric layer, a second source region disposed on the second dielectric layer, a second drain region disposed on the second dielectric layer, and a second gate stack portion disposed on the second dielectric layer, the second gate stack portion including a graphene layer.
摘要翻译：三维集成电路包括硅衬底，设置在衬底上的第一源极区域，设置在衬底上的第一漏极区域，设置在衬底上的第一栅极堆叠部分，设置在第一源极区域上的第一电介质层，第一漏极区域，第一栅极堆叠部分和衬底，形成在第一电介质层上的第二电介质层，设置在第二电介质层上的第二源极区域，设置在第二电介质层上的第二漏极区域，以及第二漏极区域栅极堆叠部分设置在第二介电层上，第二栅极堆叠部分包括石墨烯层。

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