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    • 4. 发明授权
    • Methods and apparatuses for link management in a scatternet
    • 分散网络中链路管理的方法和装置
    • US08139553B2
    • 2012-03-20
    • US11972797
    • 2008-01-11
    • Liang-Cheng ChangWei-Lun Wan
    • Liang-Cheng ChangWei-Lun Wan
    • H04J3/16
    • H04W92/02H04L1/18H04W84/18
    • An embodiment of a method for link management in a scatternet, performed by a wireless communication device, is provided. The wireless communication device simultaneously establishes a synchronization link in a first piconet, and an asynchronization link in a second piconet. The embodiment of the method contains the following steps. At least one time interval originally utilized for packet transmissions in the synchronization link is sacrificed. During the sacrificed time interval, the asynchronization link is switched to for a time period to maintain connection between the wireless communication device and a peer device operating with the asynchronization link.
    • 提供了一种由无线通信设备执行的用于分散网络中的链路管理的方法的实施例。 无线通信设备同时在第一微微网中建立同步链路,并在第二微微网中建立异步链路。 该方法的实施例包括以下步骤。 原始用于同步链路中的分组传输的至少一个时间间隔被牺牲。 在牺牲的时间间隔期间,将异步链路切换到一段时间,以维持无线通信设备与使用异步链路操作的对等设备之间的连接。
    • 8. 发明申请
    • PATCHING DEVICE FOR PATCHING ROM CODE, METHOD FOR PATCHING ROM CODE, AND ELECTRONIC DEVICE UTILIZING THE SAME
    • 用于分配ROM代码的分配设备,用于分配ROM代码的方法以及使用该代码的电子设备
    • US20090271593A1
    • 2009-10-29
    • US12111315
    • 2008-04-29
    • Ting-Cheng HsuLiang-Cheng ChangHong-Kai Hsu
    • Ting-Cheng HsuLiang-Cheng ChangHong-Kai Hsu
    • G06F9/30G06F9/32
    • G06F8/66
    • An electronic device comprising a ROM, a reprogrammable memory, a processor, and a patching device. The ROM stores a first function starting from a first address, the reprogrammable memory stores a second function starting from a second address, the patching device couples to the ROM and the reprogrammable memory, and the processor couples to the patching device. The patching device receives directive information from the processor and determines whether the processor is going to fetch the first function, and generates and returns a branch instruction to the processor when the processor is going to fetch the first function. After receiving the branch instruction, the processor executes the branch instruction to cause an unconditional jump to the second address and subsequently fetches the second function.
    • 一种包括ROM,可再编程存储器,处理器和修补装置的电子设备。 ROM存储从第一地址开始的第一功能,可编程存储器存储从第二地址开始的第二功能,修补设备耦合到ROM和可重新编程存储器,并且处理器耦合到修补设备。 修补装置从处理器接收指令信息,并且确定处理器是否要获取第一功能,并且当处理器要获取第一功能时,生成并返回到处理器的分支指令。 在接收到分支指令之后,处理器执行分支指令以使无条件跳转到第二地址,然后获取第二功能。