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1. 发明授权

US08785938B2 Method for forming polycrystalline film, polycrystalline film and thin film transistor fabricated from the polycrystalline film 有权
标题翻译：用于形成由多晶膜制造的多晶膜，多晶膜和薄膜晶体管的方法
公开(公告)号：US08785938B2
公开(公告)日：2014-07-22
申请号：US13583851
申请日：2012-08-02
申请人： Lianfeng Zhao , Renrong Liang , Mei Zhao , Jing Wang , Jun Xu
发明人： Lianfeng Zhao , Renrong Liang , Mei Zhao , Jing Wang , Jun Xu
IPC分类号： H01L29/786 , H01L29/04
CPC分类号： H01L29/78675 , H01L27/1281 , H01L29/04 , H01L29/66757
摘要： A method for forming a polycrystalline film, a polycrystalline film formed by the method and a thin film transistor fabricated from the polycrystalline film are provided. The method comprises the steps of: providing a substrate; forming a thermal conductor layer on the substrate; etching the thermal conductor layer until the substrate is exposed to form a thermal conductor pattern; forming a seed layer on the thermal conductor layer and the substrate; etching the seed layer to form seed crystals on both sidewalls of the thermal conductor; forming an amorphous layer on the substrate, the thermal conductor layer and the seed crystals; etching the amorphous layer; and recrystallizing the amorphous layer to form a polycrystalline layer.
摘要翻译：提供一种形成多晶膜的方法，通过该方法形成的多晶膜和由多晶膜制造的薄膜晶体管。该方法包括以下步骤：提供衬底; 在所述基板上形成热导体层; 蚀刻热导体层，直到基板被暴露以形成热导体图案; 在导热体层和基板上形成晶种层; 蚀刻种子层以在热导体的两个侧壁上形成晶种; 在基板上形成非晶层，热导体层和晶种; 蚀刻非晶层; 并使非晶层重结晶以形成多晶层。

2. 发明申请

US20130277677A1 METHOD FOR FORMING POLYCRYSTALLINE FILM, POLYCRYSTALLINE FILM AND THIN FILM TRANSISTOR FABRICATED FROM THE POLYCRYSTALLINE FILM 有权
标题翻译：形成多晶薄膜的方法，由多晶薄膜制成的多晶薄膜和薄膜晶体管
公开(公告)号：US20130277677A1
公开(公告)日：2013-10-24
申请号：US13583851
申请日：2012-08-02
申请人： Lianfeng Zhao , Renrong Liang , Mei Zhao , Jing Wang , Jun Xu
发明人： Lianfeng Zhao , Renrong Liang , Mei Zhao , Jing Wang , Jun Xu
IPC分类号： H01L29/786 , H01L29/04
CPC分类号： H01L29/78675 , H01L27/1281 , H01L29/04 , H01L29/66757
摘要： A method for forming a polycrystalline film, a polycrystalline film formed by the method and a thin film transistor fabricated from the polycrystalline film are provided. The method comprises the steps of: providing a substrate; forming a thermal conductor layer on the substrate; etching the thermal conductor layer until the substrate is exposed to form a thermal conductor pattern; forming a seed layer on the thermal conductor layer and the substrate; etching the seed layer to form seed crystals on both sidewalls of the thermal conductor; forming an amorphous layer on the substrate, the thermal conductor layer and the seed crystals; etching the amorphous layer; and recrystallizing the amorphous layer to form a polycrystalline layer.
摘要翻译：提供一种形成多晶膜的方法，通过该方法形成的多晶膜和由多晶膜制造的薄膜晶体管。该方法包括以下步骤：提供衬底; 在所述基板上形成热导体层; 蚀刻热导体层，直到基板被暴露以形成热导体图案; 在导热体层和基板上形成晶种层; 蚀刻种子层以在热导体的两个侧壁上形成晶种; 在基板上形成非晶层，热导体层和晶种; 蚀刻非晶层; 并使非晶层重结晶以形成多晶层。

3. 发明授权

US08860143B2 High-K gate dielectric with work function adjustment metal layer 有权
标题翻译：高K栅极电介质具有功能调整金属层
公开(公告)号：US08860143B2
公开(公告)日：2014-10-14
申请号：US13202411
申请日：2011-08-02
申请人： Mei Zhao , Renrong Liang , Jing Wang , Jun Xu
发明人： Mei Zhao , Renrong Liang , Jing Wang , Jun Xu
IPC分类号： H01L21/70 , H01L21/3115 , H01L21/8238 , H01L29/51 , H01L29/66
CPC分类号： H01L21/823842 , H01L21/31155 , H01L29/512 , H01L29/513 , H01L29/517 , H01L29/66659
摘要： A semiconductor structure is provided. The semiconductor structure comprises: a substrate; a gate dielectric layer formed on the substrate; a metal gate electrode layer formed on the gate dielectric layer; and at least one metal-containing adjusting layer for adjusting a work function of the semiconductor structure, in which an interfacial layer is formed between the substrate and the gate dielectric layer, and an energy of bond between a metal atom in the metal-containing adjusting layer and an oxygen atom is larger than that between an atom of materials forming the gate dielectric layer or the interfacial layer and an oxygen atom. Further, a method for forming the semiconductor structure is also provided.
摘要翻译：提供半导体结构。半导体结构包括：基板; 形成在所述基板上的栅介质层; 形成在栅介质层上的金属栅电极层; 以及至少一个用于调节半导体结构的功函数的含金属的调节层，其中在所述基底和所述栅极电介质层之间形成界面层，以及所述含金属调节中的金属原子之间的键的能量层和氧原子大于形成栅极介电层或界面层的材料的原子和氧原子之间的氧原子。此外，还提供了一种用于形成半导体结构的方法。

4. 发明申请

US20120292711A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 有权
标题翻译：半导体结构及其形成方法
公开(公告)号：US20120292711A1
公开(公告)日：2012-11-22
申请号：US13202411
申请日：2011-08-02
申请人： Mei Zhao , Renrong Liang , Jing Wang , Jun Xu
发明人： Mei Zhao , Renrong Liang , Jing Wang , Jun Xu
IPC分类号： H01L27/092 , H01L21/336
CPC分类号： H01L21/823842 , H01L21/31155 , H01L29/512 , H01L29/513 , H01L29/517 , H01L29/66659
摘要： A semiconductor structure is provided. The semiconductor structure comprises: a substrate; a gate dielectric layer formed on the substrate; a metal gate electrode layer formed on the gate dielectric layer; and at least one metal-containing adjusting layer for adjusting a work function of the semiconductor structure, in which an interfacial layer is formed between the substrate and the gate dielectric layer, and an energy of bond between a metal atom in the metal-containing adjusting layer and an oxygen atom is larger than that between an atom of materials forming the gate dielectric layer or the interfacial layer and an oxygen atom. Further, a method for forming the semiconductor structure is also provided.
摘要翻译：提供半导体结构。半导体结构包括：基板; 形成在所述基板上的栅介质层; 形成在栅介质层上的金属栅电极层; 以及至少一个用于调节半导体结构的功函数的含金属的调节层，其中在所述基底和所述栅极电介质层之间形成界面层，并且所述含金属调节中的金属原子之间的键能层和氧原子大于形成栅极介电层或界面层的材料的原子和氧原子之间的氧原子。此外，还提供了一种用于形成半导体结构的方法。

5. 发明授权

US08860140B2 Tunneling field effect transistor and method for forming the same 有权
标题翻译：隧道场效应晶体管及其形成方法
公开(公告)号：US08860140B2
公开(公告)日：2014-10-14
申请号：US13147470
申请日：2011-06-24
申请人： Renrong Liang , Ning Cui , Jing Wang , Jun Xu
发明人： Renrong Liang , Ning Cui , Jing Wang , Jun Xu
IPC分类号： H01L29/78 , H01L29/66 , H01L29/49 , H01L29/739
CPC分类号： H01L29/7391 , H01L29/4908 , H01L29/4983 , H01L29/66356
摘要： The present disclosure provides a TFET, which comprises: a substrate; a channel region formed in the substrate, and a source region and a drain region formed on two sides of the channel region; a gate stack formed on the channel region, wherein the gate stack comprises: a gate dielectric layer, and at least a first gate electrode and a second gate electrode distributed in a direction from the source region to the drain region and formed on the gate dielectric layer, and the first gate electrode and the second gate electrode have different work functions; and a first side wall and a second side wall formed on a side of the first gate electrode and on a side of the second gate electrode respectively.
摘要翻译：本公开提供了一种TFET，其包括：基板; 形成在所述衬底中的沟道区，以及形成在所述沟道区的两侧的源极区和漏极区; 形成在所述沟道区上的栅极叠层，其中所述栅极堆叠包括：栅极电介质层，以及至少第一栅极电极和第二栅极电极，所述栅极电极和第二栅极电极沿着从所述源极区域到所述漏极区域的方向分布并形成在所述栅极电介质上第一栅电极和第二栅电极具有不同的功函数; 以及分别形成在第一栅电极的一侧和第二栅极侧的第一侧壁和第二侧壁。

6. 发明申请

US20120267609A1 COMPLEMENTARY TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR FORMING THE SAME 有权
标题翻译：补充隧道场效应晶体管及其形成方法
公开(公告)号：US20120267609A1
公开(公告)日：2012-10-25
申请号：US13386581
申请日：2011-11-28
申请人： Renrong Liang , Jun Xu , Jing Wang
发明人： Renrong Liang , Jun Xu , Jing Wang
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L29/66356 , H01L29/0657 , H01L29/0847 , H01L29/165 , H01L29/4236 , H01L29/7391
摘要： A complementary tunneling field effect transistor and a method for forming the same are provided. The complementary tunneling field effect transistor comprises: a substrate; an insulating layer, formed on the substrate; a first semiconductor layer, formed on the insulating layer and comprising first and second doped regions; a first type TFET vertical structure formed on a first part of the first doped region and a second type TFET vertical structure formed on a first part of the second doped region, in which a second part of the first doped region is connected with a second part of the second doped region and a connecting portion between the second part of the first doped region and the second part of the second doped region is used as a drain output; and a U-shaped gate structure, formed between the first type TFET vertical structure and the second type TFET vertical structure.
摘要翻译：提供互补隧道场效应晶体管及其形成方法。互补隧道场效应晶体管包括：衬底; 形成在基板上的绝缘层; 第一半导体层，形成在所述绝缘层上并且包括第一和第二掺杂区域; 形成在第一掺杂区域的第一部分上的第一类型TFET垂直结构和形成在第二掺杂区域的第一部分上的第二类型TFET垂直结构，其中第一掺杂区域的第二部分与第二部分的第二掺杂区域的第二部分和第二掺杂区域的第二部分之间的连接部分用作漏极输出; 以及形成在第一类型TFET垂直结构和第二类型TFET垂直结构之间的U形栅极结构。

7. 发明申请

US20140145312A1 SEMICONDUCTOR STRUCTURE WITH RARE EARTH OXIDE 审中-公开
标题翻译：具有稀土氧化物的半导体结构
公开(公告)号：US20140145312A1
公开(公告)日：2014-05-29
申请号：US13816173
申请日：2012-12-18
申请人： Jing Wang , Renrong Liang , Lei Guo , Jun Xu
发明人： Jing Wang , Renrong Liang , Lei Guo , Jun Xu
IPC分类号： H01L29/02
CPC分类号： H01L29/02 , H01L21/02507 , H01L21/0251 , H01L21/28255 , H01L29/1054 , H01L29/161 , H01L29/517 , H01L29/78
摘要： A semiconductor structure with a rare earth oxide is provided. The semiconductor structure comprises: a semiconductor substrate (100); and a plurality of insulation oxide layers (201, 202 . . . 20x) and a plurality of single crystal semiconductor layers (301, 302 . . . 30x) alternately stacked on the semiconductor substrate (100). A material of the insulation oxide layer (201) contacted with the semiconductor substrate (100) is any one of a rare earth oxide, SiO2, SiOxNy and a combination thereof, a material of other insulation oxide layers (202 . . . 20x) is a single crystal rare earth oxide.
摘要翻译：提供了具有稀土氧化物的半导体结构。半导体结构包括：半导体衬底（100）; 以及交替层叠在半导体基板（100）上的多个绝缘氧化物层（201,202,20.0x）和多个单晶半导体层（301,302,30 ...）。与半导体衬底（100）接触的绝缘氧化物层（201）的材料是稀土氧化物，SiO 2，SiO x N y及其组合中的任一种，其它绝缘氧化物层（202.0×20×）的材料为单晶稀土氧化物。

8. 发明授权

US08653504B2 Complementary tunneling field effect transistor and method for forming the same 有权
标题翻译：互补隧道场效应晶体管及其形成方法
公开(公告)号：US08653504B2
公开(公告)日：2014-02-18
申请号：US13386581
申请日：2011-11-28
申请人： Renrong Liang , Jun Xu , Jing Wang
发明人： Renrong Liang , Jun Xu , Jing Wang
IPC分类号： H01L29/06 , H01L29/08 , H01L21/8238
CPC分类号： H01L29/66356 , H01L29/0657 , H01L29/0847 , H01L29/165 , H01L29/4236 , H01L29/7391
摘要： A complementary tunneling field effect transistor and a method for forming the same are provided. The complementary tunneling field effect transistor comprises: a substrate; an insulating layer, formed on the substrate; a first semiconductor layer, formed on the insulating layer and comprising first and second doped regions; a first type TFET vertical structure formed on a first part of the first doped region and a second type TFET vertical structure formed on a first part of the second doped region, in which a second part of the first doped region is connected with a second part of the second doped region and a connecting portion between the second part of the first doped region and the second part of the second doped region is used as a drain output; and a U-shaped gate structure, formed between the first type TFET vertical structure and the second type TFET vertical structure.
摘要翻译：提供互补隧道场效应晶体管及其形成方法。互补隧道场效应晶体管包括：衬底; 形成在基板上的绝缘层; 第一半导体层，形成在所述绝缘层上并且包括第一和第二掺杂区域; 形成在第一掺杂区域的第一部分上的第一类型TFET垂直结构和形成在第二掺杂区域的第一部分上的第二类型TFET垂直结构，其中第一掺杂区域的第二部分与第二部分的第二掺杂区域的第二部分和第二掺杂区域的第二部分之间的连接部分用作漏极输出; 以及形成在第一类型TFET垂直结构和第二类型TFET垂直结构之间的U形栅极结构。

9. 发明申请

US20130105764A1 TUNNELING FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD FOR FORMING THE SAME 有权
标题翻译：隧道场效应晶体管结构及其形成方法
公开(公告)号：US20130105764A1
公开(公告)日：2013-05-02
申请号：US13640929
申请日：2012-08-28
申请人： Ning Cui , Renrong Liang , Jing Wang , Jun Xu
发明人： Ning Cui , Renrong Liang , Jing Wang , Jun Xu
IPC分类号： H01L29/775 , H01L21/335
CPC分类号： H01L29/78603 , H01L29/7391
摘要： A tunneling field effect transistor structure and a method for forming the same are provided. The tunneling field effect transistor structure comprises: a substrate; a plurality of convex structures formed on the substrate, every two adjacent convex structures being separated by a predetermined cavity less than 30 nm in width, the convex structures comprising a plurality of sets, and each set comprising more than two convex structures; a plurality of floated films formed on tops of the convex structures, each floated film corresponding to one set of convex structures, a region of each floated film corresponding to a top of an intermediate convex structure in each set being formed as a channel region, and regions of the each floated film at both sides of the channel region are formed as a source region and a drain region with opposite conductivity types respectively; and a gate stack formed on each channel region.
摘要翻译：提供隧道场效应晶体管结构及其形成方法。隧道场效应晶体管结构包括：衬底; 形成在所述基板上的多个凸起结构，每两个相邻的凸起结构被宽度小于30nm的预定空腔隔开，所述凸结构包括多组，并且每组包括多于两个凸结构; 形成在凸结构的顶部上的多个浮膜，每个悬浮膜对应于一组凸结构，每个浮动膜的与每组中的中间凸结构的顶部相对应的区域形成为沟道区，以及在沟道区两侧的每个浮膜的区域分别形成为具有相反导电类型的源极区域和漏极区域; 以及形成在每个通道区域上的栅极堆叠。

10. 发明申请

US20120223387A1 TUNNELING DEVICE AND METHOD FOR FORMING THE SAME 有权
标题翻译：隧道装置及其形成方法
公开(公告)号：US20120223387A1
公开(公告)日：2012-09-06
申请号：US13147465
申请日：2011-06-24
申请人： Ning Cui , Renrong Liang , Jing Wang , Jun Xu
发明人： Ning Cui , Renrong Liang , Jing Wang , Jun Xu
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/42312 , H01L21/26586 , H01L29/66356 , H01L29/7391
摘要： The present disclosure provides a tunneling device, which comprises: a substrate; a channel region formed in the substrate, and a source region and a drain region formed on two sides of the channel region; and a gate stack formed on the channel region and a first side wall and a second side wall formed on two sides of the gate stack, wherein the gate stack comprises: a first gate dielectric layer; at least a first gate electrode and a second gate electrode formed on the first gate dielectric layer; a second gate dielectric layer formed between the first gate electrode and the first side wall; and a third gate dielectric layer formed between the second gate electrode and the second side wall.
摘要翻译：本公开提供一种隧道装置，其包括：基板; 形成在所述衬底中的沟道区，以及形成在所述沟道区的两侧的源极区和漏极区; 以及形成在所述沟道区上的栅极堆叠以及形成在所述栅极堆叠的两侧上的第一侧壁和第二侧壁，其中所述栅极堆叠包括：第一栅极介电层; 形成在所述第一栅极介电层上的至少第一栅电极和第二栅电极; 形成在所述第一栅电极和所述第一侧壁之间的第二栅介质层; 以及形成在第二栅电极和第二侧壁之间的第三栅介质层。

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