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    • 3. 发明授权
    • Miniature multi-branch patch antenna
    • 微型多分支贴片天线
    • US06218989B1
    • 2001-04-17
    • US08698169
    • 1996-08-08
    • Martin Victor SchneiderCuong Tran
    • Martin Victor SchneiderCuong Tran
    • H01Q138
    • H01Q9/0407H01Q1/40H01Q1/523
    • A miniature, multi-branch patch antenna suitable for operating in the 1 GHz to 100 GHz frequency range, a method for making same and a communication system using the same is disclosed. In one embodiment, the antenna comprises a planar dielectric substrate, a plurality of conducting antenna elements each having a feed port, a ground plane and a septum located between each conducting antenna element. In a second embodiment, the antenna comprises a planar dielectric substrate, a plurality of conducting antenna elements each having a feed port, a ground plane and a superstrate that is disposed on the plurality of conducting antenna elements and at least a portion of the dielectric substrate. The septum and the superstrate suppress undesirable coupling mechanisms. In a communication system according to the present invention, the miniature, multi-branch patch antenna is coupled to a transmitter and/or receiver.
    • 公开了一种适用于1GHz至100GHz频率范围内操作的微型多分支贴片天线,其制造方法和使用该天线的通信系统。 在一个实施例中,天线包括平面介质衬底,多个导电天线元件,每个导体天线元件具有位于每个导电天线元件之间的馈电端口,接地平面和隔膜。 在第二实施例中,天线包括平面电介质基板,多个导电天线元件,每个导体天线元件具有设置在多个导电天线元件和介电基片的至少一部分上的馈电端口,接地平面和覆盖层 。 隔膜和覆盖物抑制不期望的耦合机制。 在根据本发明的通信系统中,微型多分支贴片天线耦合到发射机和/或接收机。
    • 4. 发明授权
    • Microstrip patch filters
    • 微带补丁过滤器
    • US5805034A
    • 1998-09-08
    • US406289
    • 1995-03-17
    • James G. EvansMartin Victor SchneiderRobert W. Wilson
    • James G. EvansMartin Victor SchneiderRobert W. Wilson
    • H01P1/203H01P1/205H01P1/208H01P1/212H01P7/08H01P1/20
    • H01P1/20381
    • A microstrip patch filter in which a dielectric has a ground plane printed on one of its faces and a conductive arrangement printed on the other of said faces, the conductive arrangement includes a flat patch, input and output leads electromagnetically coupled to the flat patch, the flat patch or the dielectric substrate has a reactance-enhancing metallic constriction located along a portion of the patch. When the constriction is in the patch it forms a current-concentrating inductive constriction. When the constriction is in the dielectric substrate, it enhances the capacitance. In an embodiment, the patch has two mutually-transverse constrictions that divide the patch into four sub-patches cross-connected by current-concentrating inductive constriction.
    • 一种微带贴片滤波器,其中电介质具有印刷在其一个面上的接地平面和印刷在另一个所述面上的导电布置,所述导电布置包括平坦贴片,电磁耦合到所述平坦贴片的输入和输出引线, 平面贴片或介电衬底具有沿着贴片的一部分定位的电抗增强金属收缩部。 当收缩处在贴片中时,它形成电流集中的感应收缩。 当收缩在电介质基片中时,它会增加电容。 在一个实施例中,贴片具有两个相互横向的收缩,其将贴片分成四个通过电流集中感应收缩交叉连接的子贴片。
    • 6. 发明授权
    • Method of manufacturing semiconductor diodes for use in millimeter-wave
circuits
    • 制造用于毫米波电路的半导体二极管的方法
    • US4023260A
    • 1977-05-17
    • US664269
    • 1976-03-05
    • Martin Victor Schneider
    • Martin Victor Schneider
    • H01L21/301H01L21/304H01L21/78H01L29/872B01J17/00H01L21/302
    • H01L21/3043H01L21/78H01L29/872Y10S257/926Y10S438/977
    • A new method of manufacturing semiconductor diodes is described in which the resulting diode chips have ohmic contacts on the four side surfaces of the diode chip. An insulating layer of a material such as silicon-dioxide is first formed on the epitaxial layer of a semiconductor wafer. Notches are then cut in a gridlike pattern into the semiconductor wafer on the side of the chip having the insulating layer. The notches extend approximately halfway into the semiconductor wafer and form a plurality of areas, each one of which has the dimensions of a desired diode chip. An ohmic contact is then established on the walls and bottoms of the notches by depositing a metallic layer and alloying this layer to the semiconductor material. A plurality of diodes are formed in holes in the insulating layer on each one of the areas representing an individual chip. The semiconductor wafer is then backlapped to remove the remaining material connecting the individual chips together thereby forming a plurality of individual diode chips.
    • 描述了制造半导体二极管的新方法,其中所得的二极管芯片在二极管芯片的四个侧表面上具有欧姆接触。 首先在半导体晶片的外延层上形成诸如二氧化硅的材料的绝缘层。 然后,在具有绝缘层的芯片一侧将凹口切割成格子状图案进入半导体晶片。 凹口大致延伸到半导体晶片的中途,并形成多个区域,每个区域具有期望的二极管芯片的尺寸。 然后通过沉积金属层并将该合金化到半导体材料上,在凹口的壁和底部上形成欧姆接触。 在表示单个芯片的每个区域上的绝缘层中的孔中形成多个二极管。 然后将半导体晶片重叠以除去将各个芯片连接在一起的剩余材料,从而形成多个单独的二极管芯片。
    • 8. 发明授权
    • Process for contact photolithography utilizing a photomask having
indented channels
    • 使用具有缩进通道的光掩模的接触光刻技术
    • US3936301A
    • 1976-02-03
    • US456555
    • 1974-04-01
    • Martin Victor Schneider
    • Martin Victor Schneider
    • G03F1/00G03F7/20H01L21/00H01L21/027G03C5/00G03C5/06
    • H01L21/0271G03F7/2014H01L21/00
    • In contact type photolithographic masking processes for fabricating planar structures, a photoresist is applied to a wafer and a mask is placed over the photoresist. Illumination through the mask, which has a pattern of opaque areas, produces a photochemical reaction in the photoresist which upon developing creates a duplicate of the mask pattern. However, the photoresist is conventionally applied by a spinning process and the rotation produces a build-up of the photoresist around the edges of the wafer. This build-up prevents the pattern portion of the mask from making good physical contact with the photoresist with a resultant decrease in reproducibility and accuracy of the fabricated pattern. A modified mask is formed with a channel corresponding to the peripheral build-up. The channel accepts the build-up so that good contact may be maintained between the photoresist and the patterned portion of the mask.
    • 在用于制造平面结构的接触型光刻掩模工艺中,将光致抗蚀剂施加到晶片,并将掩模放置在光致抗蚀剂上。 通过具有不透明区域图案的掩模的照明在光致抗蚀剂中产生光化学反应,其在显影时产生掩模图案的副本。 然而,光致抗蚀剂通常通过旋转工艺施加,并且旋转产生围绕晶片边缘的光致抗蚀剂的积聚。 这种堆积防止掩模的图案部分与光致抗蚀剂进行良好的物理接触,导致制造图案的再现性和精度的降低。 形成具有对应于周边建立的通道的修改的掩模。 通道接受积聚,从而可以在光致抗蚀剂和掩模的图案化部分之间保持良好的接触。