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1. 发明授权

US5889435A On-chip PLL phase and jitter self-test circuit 失效
标题翻译：片内PLL相位和抖动自检电路
公开(公告)号：US5889435A
公开(公告)日：1999-03-30
申请号：US884694
申请日：1997-06-30
申请人： Larry D. Smith , Norman E. Abt
发明人： Larry D. Smith , Norman E. Abt
IPC分类号： G01R29/26 , G01R31/30 , G01R31/317 , H03L7/081 , H03L7/085 , H03L7/087 , H03L7/06
CPC分类号： G01R31/31709 , G01R31/30 , H03L7/081 , H03L7/085 , H03L7/087 , G01R29/26
摘要： An ASIC includes a PLL and digital circuitry to quantize and measure phase and average maximum jitter between a system clock input to the PLL, and a PLL-generated clock signal. The system clock is input to a series-string of delay elements, each contributing a delay of about 1.DELTA.t. Each delay element is associated with a two-input logic element, such as an EX-OR gate or an EX-NOR gate. One input to each two-input logic element is a version of the PLL-generated clock delayed by about (N/2) .DELTA.t. The second input to the first EX-OR is the output from the first delay element, the second input to the first EX-NOR is the output from the second delay element, and so on. Whichever delay element outputs a signal most closely in phase with the delayed PLL-generated clock will have an associated two-input logic element signal with a minimum duty cycle. Each two-input logic element output signal is capacitor integrated, sampled, stored and digitized. The digitized output signal identifies the lowest duty cycle two-input logic element, and thus phase shift. The relative breadth of the integrated capacitor voltage profile provides a measure of average maximum jitter.
摘要翻译： ASIC包括PLL和数字电路，用于量化和测量输入到PLL的系统时钟与PLL生成的时钟信号之间的相位和平均最大抖动。系统时钟输入到一系列延迟元件，每个延迟元件的延迟约为1 DELTA t。每个延迟元件与诸如异或门或EX-NOR门的双输入逻辑元件相关联。每个双输入逻辑元件的一个输入是延迟约（N / 2）DELTA t的PLL生成时钟的版本。第一个EX-OR的第二个输入是第一个延迟元件的输出，第一个EX-NOR的第二个输入是第二个延迟元件的输出，依此类推。无论哪个延迟元件输出与延迟PLL产生的时钟最相同的信号，将具有最小占空比的相关联的双输入逻辑元件信号。每个双输入逻辑单元输出信号是电容集成，采样，存储和数字化。数字化输出信号识别最低占空比双输入逻辑元件，从而识别相移。集成电容电压曲线的相对宽度提供平均最大抖动的度量。

2. 发明授权

US06385565B1 System and method for determining the desired decoupling components for power distribution systems using a computer system 失效
标题翻译：用于使用计算机系统确定用于配电系统的期望的去耦组件的系统和方法
公开(公告)号：US06385565B1
公开(公告)日：2002-05-07
申请号：US09099547
申请日：1998-06-18
申请人： Raymond E. Anderson , Larry D. Smith
发明人： Raymond E. Anderson , Larry D. Smith
IPC分类号： G06F1750
CPC分类号： H05K1/0231 , G06F17/5036 , H05K3/0005 , H05K2201/09309
摘要： A system and method for using a computer system to determine the desired decoupling components for stabilizing the electrical impedance in the power distribution system of an electrical interconnecting apparatus, including a method for measuring the ESR for an electrical device, a method for determining a number of desired decoupling components for a power distribution system, and a method for placing the desired decoupling components in the power distribution system. The method creates a model of the power distribution system based upon an M×N grid for both the power plane and the ground plane. The model receives input from a user and from a database of various characteristics for a plurality of decoupling components. The method determines a target impedance over a desired frequency range. The method selects decoupling components. The method determines a number for each of the decoupling components chosen. The method places current sources in the model at spatial locations corresponding to physical locations of active components. The method optionally also places a power supply in the model. The method selects specific locations in the model to calculate transfer impedance values as a function of frequency. The method effectuates the model to determine the transfer impedance values as the function of frequency at the specific locations previously chosen. The method then compares the transfer impedance values as the function of frequency at the specific locations to the target impedance for the power distribution system.
摘要翻译：一种用于使用计算机系统来确定用于稳定电互连装置的配电系统中的电阻抗的期望的去耦组件的系统和方法，包括用于测量电气装置的ESR的方法，用于确定电气装置的数量的方法用于配电系统的期望的去耦组件，以及用于将所需去耦组件放置在配电系统中的方法。该方法基于用于电力平面和接地平面的MxN网格创建配电系统的模型。模型从多个去耦组件接收来自用户和来自用于各种特征的数据库的输入。该方法确定所需频率范围内的目标阻抗。该方法选择去耦组件。该方法为所选择的每个去耦组件确定一个数字。该方法将模型中的电流源放置在与活动组件的物理位置对应的空间位置处。该方法还可以在模型中放置电源。该方法选择模型中的特定位置来计算作为频率的函数的传输阻抗值。该方法使模型确定传输阻抗值作为先前选择的特定位置处的频率函数。该方法然后将传输阻抗值作为特定位置处的频率的函数与配电系统的目标阻抗进行比较。

3. 外观设计

USD312173S Ammunition box 失效
公开(公告)号：USD312173S
公开(公告)日：1990-11-20
申请号：US59319
申请日：1987-06-08
申请人： Larry D. Smith , Robert G. Tanner
设计人： Larry D. Smith , Robert G. Tanner

4. 发明授权

US4055757A Calculator apparatus with annuity switch for performing begin-and end-period annuity calculations 失效
标题翻译：具有年金开关的计算器设备用于执行开始和结束期年金计算
公开(公告)号：US4055757A
公开(公告)日：1977-10-25
申请号：US718290
申请日：1976-08-27
申请人： Lynn W. Tillman , Kent R. Henscheid , Larry D. Smith
发明人： Lynn W. Tillman , Kent R. Henscheid , Larry D. Smith
IPC分类号： G06F15/02 , G06Q40/00 , G06F15/30
CPC分类号： G06Q40/02 , G06Q40/00
摘要： A programmable electronic calculator is provided having a manually operable annuity switch with begin- and end-position settings, enabling a user to specify the type of annuity calculation to be performed. When the switch is set to the begin position, the annuity calculation is performed with payments due at the beginning of each payment period; when the switch is set to the end position, the annuity calculation is performed with payments due at the end of each payment period. The annuity calculation is performed under control of a routine stored in a read-only-memory (ROM) of a data processing unit.
摘要翻译：提供了一种可编程电子计算器，其具有手动操作的具有开始和结束位置设置的年金开关，使得用户能够指定要执行的年金计算的类型。当开关设置为开始位置时，年金计算是在每个付款周期开始时到期的付款进行的; 当开关设置为最终位置时，年金计算是在每个付款周期结束时到期的付款进行的。在存储在数据处理单元的只读存储器（ROM）中的程序的控制下执行年金计算。

5. 发明授权

US07162795B2 Power distribution system with a dedicated power structure and a high performance voltage regulator 有权
标题翻译：配电系统具有专用电源结构和高性能稳压器
公开(公告)号：US07162795B2
公开(公告)日：2007-01-16
申请号：US10893507
申请日：2004-07-16
申请人： Larry D. Smith , Istvan Novak , Michael C. Freda
发明人： Larry D. Smith , Istvan Novak , Michael C. Freda
IPC分类号： H05K3/30
CPC分类号： H05K1/0231 , G06F1/26 , H05K1/0262 , H05K1/141 , H05K3/325 , H05K3/3436 , H05K3/368 , H05K2201/09309 , H05K2201/10545 , H05K2201/10734 , Y10T29/49117 , Y10T29/4913 , Y10T29/49144
摘要： A system and method for distributing power to an integrated circuit. In one embodiment, a power laminate may be mounted to a printed circuit board (PCB). The integrated circuit for which power is to be distributed may be electrically coupled to the PCB. The power laminate may include one or more power planes and one or more reference (i.e. ground) planes, with each pair of power/reference planes separated by a dielectric layer. The power laminate may also include a connector or other means for receiving power from an external power source. The power laminate may be electrically coupled to the integrated circuit, thereby enabling it to provide power to the integrated circuit. The power laminate may also include a voltage regulator circuit, and a plurality of decoupling capacitors.
摘要翻译：一种用于向集成电路分配电力的系统和方法。在一个实施例中，功率层压板可以安装到印刷电路板（PCB）。要分配功率的集成电路可以电耦合到PCB。功率层压板可以包括一个或多个电源平面和一个或多个参考（即接地）平面，每对功率/参考平面由电介质层分开。功率层压板还可以包括用于从外部电源接收功率的连接器或其它装置。功率层压板可以电耦合到集成电路，从而使其能够向集成电路提供电力。电力层压板还可以包括电压调节器电路和多个去耦电容器。

6. 发明授权

US06850878B2 System and method for determining the required decoupling capacitors for a power distribution system using an improved capacitor model 有权
标题翻译：用于使用改进的电容器模型确定配电系统所需的去耦电容器的系统和方法
公开(公告)号：US06850878B2
公开(公告)日：2005-02-01
申请号：US09841912
申请日：2001-04-24
申请人： Larry D. Smith , David Hockanson
发明人： Larry D. Smith , David Hockanson
IPC分类号： G06F17/50 , H01P5/12 , G06F17/10
CPC分类号： G06F17/5036
摘要： A system and method for determining the required decoupling capacitors for a power distribution system using an improved capacitor model. In one embodiment, a method for determining the decoupling capacitors for a power distribution system includes creating a model of the power distribution system using circuit simulation software, such as SPICE. The power distribution system model includes a plurality of cells interconnected at predetermined nodes. The method then selects one or more decoupling capacitors for the power distribution system. The decoupling capacitors are represented in the power distribution system model by a capacitor model, which is a mathematical model of an electrical circuit. The electrical circuit upon which the capacitor model is based is a ladder circuit. Following the selecting of the decoupling capacitors, the power distribution system model is update based on the selections, and operation of the power distribution system is then simulated. During the simulation, transfer impedance values are determined for each of the nodes, and compared to target impedance. The method is then repeated until each of the transfer impedance values is at or below the target impedance.
摘要翻译：一种用于使用改进的电容器模型确定配电系统所需的去耦电容器的系统和方法。在一个实施例中，用于确定配电系统的去耦电容器的方法包括使用诸如SPICE之类的电路仿真软件来创建配电系统的模型。配电系统模型包括在预定节点处互连的多个小区。该方法然后为配电系统选择一个或多个去耦电容器。解耦电容器在电力分配系统模型中由电容器模型表示，电容器模型是电路的数学模型。电容器型号所基于的电路是梯形电路。在选择去耦电容器之后，根据选择更新配电系统模型，然后模拟配电系统的运行。在模拟期间，为每个节点确定传输阻抗值，并与目标阻抗进行比较。然后重复该方法，直到每个传输阻抗值处于或低于目标阻抗。

7. 发明授权

US06571184B2 System and method for determining the decoupling capacitors for power distribution systems with a frequency-dependent target impedance 有权
公开(公告)号：US06571184B2
公开(公告)日：2003-05-27
申请号：US09778602
申请日：2001-02-06
申请人： Raymond E. Anderson , Larry D. Smith , Tanmoy Roy
发明人： Raymond E. Anderson , Larry D. Smith , Tanmoy Roy
IPC分类号： G06F1900
CPC分类号： G06F17/5036
摘要： A system and method for determining the desired decoupling capacitors for power distribution systems having frequency dependent target impedance. In one embodiment, the target impedance may be a function of frequency, and thus may vary in value over a frequency range from 0 Hz to a corner frequency. A specific quantity of decoupling capacitors may be selected to provide decoupling for the power distribution for a given frequency within the frequency range. A total impedance provided by the specific quantity of selected decoupling capacitors may be calculated and compared to the calculated target impedance for the given frequency. If the total impedance provided by the specific quantity of selected decoupling capacitors is greater than the target impedance for the given frequency, the impedance may be adjusted by changing the quantity of capacitors. Capacitors may continue to be added until the total impedance is less than the target impedance. This may be performed for one or more frequencies within the calculated frequency range.

8. 发明授权

US06564355B1 System and method for analyzing simultaneous switching noise 有权
标题翻译：分析同步开关噪声的系统和方法
公开(公告)号：US06564355B1
公开(公告)日：2003-05-13
申请号：US09651678
申请日：2000-08-30
申请人： Larry D. Smith , Raymond E. Anderson , Tanmoy Roy
发明人： Larry D. Smith , Raymond E. Anderson , Tanmoy Roy
IPC分类号： G06F1750
CPC分类号： G06F17/5036
摘要： A system and method for analyzing simultaneous switching noise. In one embodiment, a model may be provided for the electronic circuit to be analyzed. The electronic circuit may be an integrated circuit, a multi-chip module, a printed circuit assembly, or other type, and may in some embodiments include combinations of these types. The electronic circuit may include a plurality of drivers, each of which may be coupled to a power plane, a ground plane, and a transmission line. The connection of the driver may be accurately modeled in this manner. Each driver may be configured to switch between a logic high voltage and a logic low voltage. The modeled electronic circuit may also include a voltage source coupled to the power plane and the ground plane, a voltage regulator module, and a plurality of decoupling capacitors. The simultaneous switching of a plurality of drivers, from a logic high to a logic low, or vice versa, may be simulated. The system and method may then allow for the calculation of solutions for the transmission line and the power planes (as will be detailed below). The transmission line solution and power plane solution may be superimposed on each other, which may allow for an analysis of plane bounce, which may include one or more fluctuations in the voltage between the power plane and the ground planes.
摘要翻译：一种用于分析同时开关噪声的系统和方法。在一个实施例中，可以为要分析的电子电路提供模型。电子电路可以是集成电路，多芯片模块，印刷电路组件或其他类型，并且在一些实施例中可以包括这些类型的组合。电子电路可以包括多个驱动器，每个驱动器可以耦合到电源平面，接地平面和传输线。可以以这种方式精确地建模驾驶员的连接。每个驱动器可以被配置为在逻辑高电压和逻辑低电压之间切换。建模的电子电路还可以包括耦合到电源平面和接地平面的电压源，电压调节器模块和多个去耦电容器。可以模拟多个驱动器从逻辑高到逻辑低的同时切换，反之亦然。然后，系统和方法可以允许计算传输线和电源平面的解决方案（如下面将详细描述的）。传输线解决方案和电力平面解决方案可以彼此叠加，这可以允许对平面反弹的分析，其可以包括电力平面和接地平面之间的电压的一个或多个波动。

9. 发明授权

US06760232B2 Power distribution system having a dedicated power structure with apertures for mounting integrated circuit packages 有权
标题翻译：配电系统具有专用功率结构，带有用于安装集成电路封装的孔
公开(公告)号：US06760232B2
公开(公告)日：2004-07-06
申请号：US09809838
申请日：2001-03-16
申请人： Larry D. Smith , Michael C. Freda , Ali Hassanzadeh
发明人： Larry D. Smith , Michael C. Freda , Ali Hassanzadeh
IPC分类号： H05K702
CPC分类号： H05K1/141 , H01L24/17 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/1703 , H01L2924/15151 , H01L2924/19105 , H01L2924/19106 , H05K1/0262 , H05K1/0263 , H05K3/3436 , H05K3/368 , H05K7/1092 , H05K2201/049 , H05K2201/09309 , H05K2201/10689 , H05K2201/10734
摘要： A system and method for distributing power to an integrated circuit. In one embodiment, a power laminate may be mounted to a printed circuit board (PCB). The integrated circuit for which power is to be distributed may be electrically coupled to the PCB. The power laminate may include one or more power planes and one or more reference (i.e. ground) planes, with each pair of power/reference planes separated by a dielectric layer. The power laminate may also include a connector or other means for receiving power from an external power source. The power laminate may be electrically coupled to the integrated circuit, thereby enabling it to provide core power to the integrated circuit. The power laminate may also include a voltage regulator circuit, and a plurality of decoupling capacitors. In one embodiment, the power laminate may include a plurality of apertures which allow for the passing of connections between the integrated circuit and the PCB. The integrated circuit may be mounted to the PCB by solder balls of a ball-grid array, elestomeric connections of a land-grid array, or other type of mounting. The each of the solder balls or elastomeric connections may pass though one of the apertures of the power laminate.
摘要翻译：一种用于向集成电路分配电力的系统和方法。在一个实施例中，功率层压板可以安装到印刷电路板（PCB）。要分配功率的集成电路可以电耦合到PCB。功率层压板可以包括一个或多个电源平面和一个或多个参考（即接地）平面，每对功率/参考平面由电介质层分开。功率层压板还可以包括用于从外部电源接收功率的连接器或其它装置。功率层压板可以电耦合到集成电路，从而使其能够向集成电路提供核心功率。电力层压板还可以包括电压调节器电路和多个去耦电容器。在一个实施例中，功率层压板可以包括允许集成电路和PCB之间的连接通过的多个孔。该集成电路可以通过球栅阵列的焊球，陆格栅阵列的其他类型的安装的电子连接安装到PCB。每个焊球或弹性体连接可以通过功率层叠体的一个孔。

10. 发明授权

US06195613B1 Method and system for measuring equivalent series resistance of capacitors and method for decoupling power distribution systems 有权
公开(公告)号：US06195613B1
公开(公告)日：2001-02-27
申请号：US09149164
申请日：1998-09-08
申请人： Tanmoy Roy , Larry D. Smith , Raymond E. Anderson , Thomas J. Pelc , Douglas W. Forehand
发明人： Tanmoy Roy , Larry D. Smith , Raymond E. Anderson , Thomas J. Pelc , Douglas W. Forehand
IPC分类号： G01R2700
CPC分类号： G06F17/5036 , H05K3/0005 , H05K2201/09309
摘要： A system and method for measuring the equivalent series resistance (ESR) of one or more capacitors using an impedance analyzer, whereby the capacitors are joined to the impedance analyzer with a conductive adhesive. The conductive adhesive may advantageously provide for an electrically and mechanically stable connection between the capacitor and the remainder of the electrical circuit used to measure the ESR of the capacitor. The conductive adhesive may include heat activated or cold solder, or conductive putty. The system comprises a measuring unit for sweeping a frequency range to find the minimum impedance for the capacitor and a connector assembly for holding the capacitor in an electrically and mechanically stable connection using the conductive adhesive. The connector assembly includes a mating portion adapted for electrically connecting the connector assembly to an I/O port of the measuring unit and a terminal portion that accommodates a connection to the capacitor using the conductive adhesive. The method comprises connecting a mating portion of the connector assembly to the impedance analyzer. Next, the impedance analyzer is calibrated, and the capacitor is then connected to a terminal portion of the connector assembly using the conductive adhesive. Finally, the impedance analyzer sweeps a frequency range to find the ESR for the capacitor. The method may also measure the ESR of each of a number of capacitors using an impedance analyzer. The method may connect in series the number of capacitors to the connector assembly using the conductive adhesive. The method determines the equivalent series resistance of each of the number of capacitors by dividing the minimum impedance by the number of capacitors. The method may also comprise selecting one or more capacitors, measuring the ESR of each of the capacitors, and determining a desired number of each of the capacitors for placing into a power distribution system.

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