专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

EP1111413B1 Multifunction integrated optics chip having improved polarization extinction ratio 有权
标题翻译：具有改进的偏振消光比的多功能集成光学芯片
公开(公告)号：EP1111413B1
公开(公告)日：2005-08-03
申请号：EP00311505.2
申请日：2000-12-20
申请人： LITTON SYSTEMS, INC.
发明人： Gampp, Lorrie L. , Martinez, Arthur R. , Flaherty, Thomas , Geosling, Christine E. , Zimmerman, Gregory
IPC分类号： G02B6/122 , G01C19/72
CPC分类号： G02B6/126 , G02B6/122

2. 发明公开

EP0977073A3 Dual purpose input electrode structure for multi-function integrated optics chips (MIOCs) 审中-公开
标题翻译：双功能Eingangselektrodentruktur于多功能集成光学芯片（“MIOC”）
公开(公告)号：EP0977073A3
公开(公告)日：2000-07-12
申请号：EP99114785.1
申请日：1999-07-28
申请人： LITTON SYSTEMS, INC.
发明人： Gampp, Lorrie L. , Zimmerman, Gregory A. , Geosling, Christine E. , Rahn, John P.
IPC分类号： G02F1/035
CPC分类号： G02F1/3137 , G02F1/035 , G02F2203/21
摘要： An Integrated Optics Chip with improved performance when exposed to rapidly changing temperature is disclosed. The optic chip or integrated optic chip or MIOC has a top surface, a +Z face and -Z face. The chip is formed from a crystal having a high electro-optic coefficient such as Lithium Niobate. For the purpose of orienting the components to the optic chip to be described, the +Z crystal axis extends outward from the +Z face. An input waveguide formed in the top surface of the chip and orthogonal to the +Z axis receives an optical signal from an input port, passes the signal via a waveguide network, to an output waveguide coupling the waveguide network to an output port. Metalization is applied to the top face of the optic chip to form at least a first and a second rail. The first and second rails are positioned to very closely straddle a portion of the input waveguide. A conductive bridge connects the first and second rails to prevent a charge differential from developing between the first and second rails.

3. 发明公开

EP0977074A2 An integrated optics chip with reduced thermal errors due to pyroelectric effects 有权
标题翻译： Integrierter optischer Chip mit Verringerung des durch pyroelektrischen Effekt induzierten thermischen Fehlers
公开(公告)号：EP0977074A2
公开(公告)日：2000-02-02
申请号：EP99114791.9
申请日：1999-07-28
申请人： LITTON SYSTEMS, INC.
发明人： Shafer, Kenneth W. , Abbink, Henry C. , Rahn, John P. , Geosling, Christine E. , Zimmerman, Gregory A.
IPC分类号： G02F1/035
CPC分类号： G02F1/035 , G02F2203/21
摘要： An Integrated Optics Chip with improved performance when exposed to changing temperature is disclosed. The optic chip or integrated optic chip or MIOC has a top surface, a +Z face and -Z face. The chip is formed from a crystal having a high electro-optic coefficient such as Lithium Niobate. For the purpose of orienting the components to the optic chip to be described, the +Z crystal axis extends outward from the +Z face, the Z axis being the axis across which a pyroelectric effect is exhibited. The top surface is orthogonal to the Z axis. An input waveguide on the top surface receives an optical signal from an input port, passes the signal via a waveguide network, to an output waveguide coupling the waveguide network to an output port. A portion of the +Z and -Z faces are coated at least partially with a conductive coating. A conductive path couples the +Z and -Z faces to prevent a charge differential from developing between the +Z and -Z faces due to a change in temperature of the optic chip and the pyroelectric effect.
摘要翻译：公开了当暴露于变化的温度时具有改进的性能的集成光学芯片。光学芯片或集成光学芯片或MIOC具有顶面，+ Z面和-Z面。该芯片由具有高电光系数的晶体形成，例如铌酸锂。为了将元件定向到要描述的光学芯片，+ Z晶体轴从+ Z面向外延伸，Z轴是表示热电效应的轴。顶面与Z轴正交。顶表面上的输入波导接收来自输入端口的光信号，将信号经由波导网络传递到将波导网络耦合到输出端口的输出波导。至少部分地用导电涂层涂覆一部分+ Z和-Z面。由于光学芯片的温度变化和热电效应，导电路径耦合+ Z和-Z面以防止+ Z和-Z面之间的电荷差异发展。

4. 发明授权

EP0977074B1 An integrated optics chip with reduced thermal errors due to pyroelectric effects 有权
标题翻译：与减少的感应热电效应的热误差的集成光学芯片
公开(公告)号：EP0977074B1
公开(公告)日：2008-09-03
申请号：EP99114791.9
申请日：1999-07-28
申请人： Litton Systems, Inc.
发明人： Shafer, Kenneth W. , Abbink, Henry C. , Rahn, John P. , Geosling, Christine E. , Zimmerman, Gregory A.
IPC分类号： G02F1/035
CPC分类号： G02F1/035 , G02F2203/21

5. 发明公开

EP1111413A1 Multifunction integrated optics chip having improved polarization extinction ratio 有权
标题翻译：多功能一体机 - 智能手机芯片mitemonicultem Polarisationsausöschungsverhältnis
公开(公告)号：EP1111413A1
公开(公告)日：2001-06-27
申请号：EP00311505.2
申请日：2000-12-20
申请人： LITTON SYSTEMS, INC.
发明人： Gampp, Lorrie L. , Martinez, Arthur R. , Flaherty, Thomas , Geosling, Christine E. , Zimmerman, Gregory
IPC分类号： G02B6/122 , G01C19/72
CPC分类号： G02B6/126 , G02B6/122
摘要： An integrated optics chip (70) includes an optical waveguide network (11) formed on a surface (106) of a substrate (72) formed of an electrooptically active material. The optical waveguide network (11) has an input facet (86) where an optical signal may be input to the optical waveguide network (11) and an output facet (88) where optical signals may be output from the optical waveguide network (11). A trench (74) is formed in the bottom surface (80) of the substrate and arranged to extend into the substrate toward the optical waveguide network (11). The trench (74) prevents light rays incident thereon from inside the substrate (72) from propagating to the output facet (88). In particular, the trench (74) prevents light scattered at the input facet (86) or from scattering centers in the optical waveguide network (11) from reflecting from the bottom surface (80) of the substrate (72) to the output facet (88). A cover (78) may be mounted to the top surface (106) of the substrate (72) to provide structural strength to the integrated optics chip (70). One or more side grooves (143, 144) may be formed in the sides of the substrate (72) and cover (78). A light absorbing material may be placed in the trench (74) and grooves (143, 144). A plurality of electrodes (150) may be formed on the substrate (72) adjacent the optical waveguide network (11), and a plurality of access electrodes (158, 160) may be formed on sides of the substrate (72) and cover (78) to provide electrical signals to the electrodes (150).
摘要翻译：集成光学芯片（70）包括形成在由电光活性材料形成的衬底（72）的表面（106）上的光波导网络（11）。光波导网络（11）具有可将光信号输入到光波导网络（11）的输入面（86）和可从光波导网络（11）输出光信号的输出小面（88）。沟槽（74）形成在基板的底面（80）中，并布置成朝向光波导网络（11）延伸到基板中。所述沟槽（74）防止从所述衬底（72）内部入射到其上的光线传播到所述输出小面（88）。特别地，沟槽74防止在输入面（86）处散射的光或光波导网络（11）中的散射中心从基板（72）的底表面（80）反射到输出小面（ 88）。盖（78）可以安装到基板（72）的顶表面（106），以向集成光学芯片（70）提供结构强度。可以在基板（72）和盖（78）的侧面中形成一个或多个侧槽（143,144）。光吸收材料可以放置在沟槽（74）和凹槽（143,144）中。可以在与光波导网络（11）相邻的基板（72）上形成多个电极（150），并且可以在基板（72）和盖（...）的侧面上形成多个接入电极（158,160） 78）以向电极（150）提供电信号。

6. 发明公开

EP0977073A2 Dual purpose input electrode structure for multi-function integrated optics chips (MIOCs) 审中-公开
标题翻译： Doppelfunktions-Eingangselektrodenstrukturfürmultifunktionale integrierte optische Chips（“MIOCs”）
公开(公告)号：EP0977073A2
公开(公告)日：2000-02-02
申请号：EP99114785.1
申请日：1999-07-28
申请人： LITTON SYSTEMS, INC.
发明人： Gampp, Lorrie L. , Zimmerman, Gregory A. , Geosling, Christine E. , Rahn, John P.
IPC分类号： G02F1/035
CPC分类号： G02F1/3137 , G02F1/035 , G02F2203/21
摘要： An Integrated Optics Chip with improved performance when exposed to rapidly changing temperature is disclosed. The optic chip or integrated optic chip or MIOC has a top surface, a +Z face and -Z face. The chip is formed from a crystal having a high electro-optic coefficient such as Lithium Niobate. For the purpose of orienting the components to the optic chip to be described, the +Z crystal axis extends outward from the +Z face. An input waveguide formed in the top surface of the chip and orthogonal to the +Z axis receives an optical signal from an input port, passes the signal via a waveguide network, to an output waveguide coupling the waveguide network to an output port. Metalization is applied to the top face of the optic chip to form at least a first and a second rail. The first and second rails are positioned to very closely straddle a portion of the input waveguide. A conductive bridge connects the first and second rails to prevent a charge differential from developing between the first and second rails.
摘要翻译：公开了当暴露于快速变化的温度时具有改进性能的集成光学芯片。光学芯片或集成光学芯片或MIOC具有顶面，+ Z面和-Z面。该芯片由具有高电光系数的晶体形成，例如铌酸锂。为了将组件定向到要描述的光学芯片，+ Z晶体轴从+ Z面向外延伸。形成在芯片的顶表面并与+ Z轴正交的输入波导接收来自输入端口的光信号，将信号经由波导网络传递到将波导网络耦合到输出端口的输出波导。金属化被施加到光学芯片的顶面以形成至少第一和第二轨道。第一和第二轨道定位成非常紧密地跨越输入波导的一部分。导电桥连接第一和第二导轨，以防止在第一和第二导轨之间产生电荷差。

7. 发明公开

EP0977074A3 An integrated optics chip with reduced thermal errors due to pyroelectric effects 有权
标题翻译：集成光学芯片由于热电效应而减少热误差
公开(公告)号：EP0977074A3
公开(公告)日：2000-07-12
申请号：EP99114791.9
申请日：1999-07-28
申请人： LITTON SYSTEMS, INC.
发明人： Shafer, Kenneth W. , Abbink, Henry C. , Rahn, John P. , Geosling, Christine E. , Zimmerman, Gregory A.
IPC分类号： G02F1/035
CPC分类号： G02F1/035 , G02F2203/21
摘要： An Integrated Optics Chip with improved performance when exposed to changing temperature is disclosed. The optic chip or integrated optic chip or MIOC has a top surface, a +Z face and -Z face. The chip is formed from a crystal having a high electro-optic coefficient such as Lithium Niobate. For the purpose of orienting the components to the optic chip to be described, the +Z crystal axis extends outward from the +Z face, the Z axis being the axis across which a pyroelectric effect is exhibited. The top surface is orthogonal to the Z axis. An input waveguide on the top surface receives an optical signal from an input port, passes the signal via a waveguide network, to an output waveguide coupling the waveguide network to an output port. A portion of the +Z and -Z faces are coated at least partially with a conductive coating. A conductive path couples the +Z and -Z faces to prevent a charge differential from developing between the +Z and -Z faces due to a change in temperature of the optic chip and the pyroelectric effect.
摘要翻译：公开了一种集成光学芯片，当暴露于变化的温度时具有改进的性能。光学芯片或集成光学芯片或MIOC具有顶面，+ Z面和-Z面。该芯片由诸如铌酸锂之类的具有高电光系数的晶体形成。为了将部件定向到要描述的光学芯片，+ Z晶轴从+ Z面向外延伸，Z轴是穿过其展现热电效应的轴。顶面与Z轴正交。顶面上的输入波导从输入端口接收光信号，将信号经由波导网络传递到将波导网络耦合到输出端口的输出波导。 + Z和-Z面的一部分至少部分地涂覆有导电涂层。导电路径耦合+ Z和-Z面以防止由于光学芯片的温度变化和热电效应在+ Z和-Z面之间产生电荷差异。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式