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    • 2. 发明申请
    • SERIAL INTEGRATED SCAN-BASED TESTING OF INK JET PRINT HEAD
    • 喷墨打印头的串行集成扫描测试
    • WO03083904B1
    • 2004-08-26
    • PCT/US0309151
    • 2003-03-24
    • LEXMARK INT INC
    • COOK WILLIAM PAULEDELEN JOHN GLENNPARISH GEORGE KEITHROWE KRISTI MAGGARDZEARFOSS SUSAN MARIE
    • B41J2/05G01R31/3185B41J29/38B41J29/393G01R31/28
    • B41J2/04541B41J2/04543B41J2/0458G01R31/318536
    • An n-bit serial register (12) in an ink jet print head (10) operates in a print mode or a test mode. When the shift register (12) is operating in the print mode or a test mode. When the shift register is operating in the print mode, n bits of print data (PDATA) are serially scanned into n number of bit registers (12) and are then latched out to heater addressing logic circuitry (20), (22), (24), in the print head (10) to control a print operation. When the circuit is operating in the test mode, x bits of test point data from x number of test nodes (TP) in the print head (10) are loaded in parallel into x number of the n number of bit registers (12), and are then serially scanned out to a test data output (TDATA). In this manner, a single shift register (12) may be used to scan in print data (PDATA) and scan out test data (TDATA), thereby providing observability and controllability of the internal logic nodes of the print head (10) while minimizing logic size and the number of input/output connections on the print head.
    • 喷墨打印头(10)中的n位串行寄存器(12)以打印模式或测试模式操作。 当移位寄存器(12)在打印模式或测试模式下操作时。 当移位寄存器以打印模式操作时,将n位打印数据(PDATA)串行扫描到n个位寄存器(12)中,然后锁存到加热器寻址逻辑电路(20),(22),( 在打印头(10)中控制打印操作。 当电路在测试模式下工作时,来自打印头(10)中x个测试节点(TP)的测试点数据的x位被并行加载到n个位寄存器(12)中的x个数中, 然后被串行扫描输出到测试数据输出(TDATA)。 以这种方式,可以使用单个移位寄存器(12)来扫描打印数据(PDATA)并且扫描出测试数据(TDATA),从而提供打印头(10)的内部逻辑节点的可观察性和可控制性,同时最小化 逻辑大小和打印头上输入/输出连接的数量。
    • 4. 发明申请
    • INK JET PRINTER WITH RESISTANCE COMPENSATION CIRCUIT
    • 喷墨打印机具有电阻补偿电路
    • WO2005044565B1
    • 2005-09-15
    • PCT/US2004035655
    • 2004-10-27
    • LEXMARK INT INC
    • PARISH GEORGE KEITHROWE KRISTI MAGGARDEDELEN JOHN GLENN
    • B41J2/05B41J29/38
    • B41J2/04538B41J2/0457B41J2/0458
    • An ink jet printer includes a printhead control circuit that produces printhead command signals based on data signals provided by the printer. A power circuit actuates ink ejectors in response to the printhead command signals and includes a plurality of compensation circuits. Each ink ejector is associated with a single compensation circuit and each compensation circuit includes a number of switches connected in parallel with each other. Each switch in a single compensation circuit is connected to actuate a single ink ejector when the switch is turned on. The compensation circuits adjust their internal resistance by turning on more or less switches and thereby compensate for changing effective parasitic resistance of the power lines
    • 喷墨打印机包括打印头控制电路,其基于由打印机提供的数据信号产生打印头命令信号。 电源电路响应打印头命令信号启动墨水喷射器并包括多个补偿电路。 每个喷墨器与单个补偿电路相关联,并且每个补偿电路包括彼此并联连接的多个开关。 当开关打开时,连接单个补偿电路中的每个开关以驱动单个喷墨器。 补偿电路通过接通或多或少的开关来调整它们的内阻,从而补偿电源线的有效寄生电阻的变化
    • 5. 发明申请
    • SERIAL INTEGRATED SCAN-BASED TESTING OF INK JET PRINT HEAD
    • 喷墨打印头的串行集成扫描测试
    • WO03083904A2
    • 2003-10-09
    • PCT/US0309151
    • 2003-03-24
    • LEXMARK INT INC
    • COOK WILLIAM PAULEDELEN JOHN GLENNPARISH GEORGE KEITHROWE KRISTI MAGGARDZEARFOSS SUSAN MARIE
    • B41J2/05G01R31/3185H01L
    • B41J2/04541B41J2/04543B41J2/0458G01R31/318536
    • An n-bit serial register in an ink jet print head operates in a print mode or a test mode. When the shift register is operating in the print mode or a test mode. When the shift register is operating in the print mode, n bits of print data are serially scanned into n number of bit registers and are then latched out to heater addressing logic circuitry in the print head to control a print operation. When the circuit is operating in the test mode, x bits of test point data from x number of test nodes in the print head are loaded in parallel into x number of the n number of bit registers, and are then serially scanned out to a test data output. In this manner, a single shift register may be used to scan in print data and scan out test data, thereby providing observability and controllability of the internal logic nodes of the print head while minimizing logic size and the number of input/output connections on the print head.
    • 喷墨打印头中的n位串行寄存器在打印模式或测试模式下操作。 当移位寄存器在打印模式或测试模式下运行时。 当移位寄存器工作在打印模式时,打印数据的n位被顺序地扫描到n个位寄存器中,然后被锁存到打印头中的加热器寻址逻辑电路以控制打印操作。 当电路在测试模式下工作时,打印头中x个测试节点的x位测试点数据并行加载到x个n个位寄存器中,然后连续扫描出一个测试 数据输出。 以这种方式,可以使用单个移位寄存器来扫描打印数据并扫描测试数据,从而提供打印头的内部逻辑节点的可观察性和可控性,同时使逻辑大小和输入/输出连接数量最小化 打印头。
    • 6. 发明申请
    • INK JET PRINTER WITH RESISTANCE COMPENSATION CIRCUIT
    • 喷墨打印机电阻补偿电路
    • WO2005044565A3
    • 2005-07-28
    • PCT/US2004035655
    • 2004-10-27
    • LEXMARK INT INC
    • PARISH GEORGE KEITHROWE KRISTI MAGGARDEDELEN JOHN GLENN
    • B41J2/05B41J29/38
    • B41J2/04538B41J2/0457B41J2/0458
    • An ink jet printer includes a printhead control circuit that produces printhead command signals based on data signals provided by the printer. A power circuit actuates ink ejectors in response to the printhead command signals and includes a plurality of compensation circuits. Each ink ejector is associated with a single compensation circuit and each compensation circuit includes a number of switches connected in parallel with each other. Each switch in a single compensation circuit is connected to actuate a single ink ejector when the switch is turned on. The compensation circuits adjust their internal resistance by turning on more or less switches and thereby compensate for changing effective parasitic resistance of the power lines
    • 喷墨打印机包括基于由打印机提供的数据信号产生打印头命令信号的打印头控制电路。 电源电路响应于打印头命令信号来致动墨水喷射器并且包括多个补偿电路。 每个喷墨器与单个补偿电路相关联,并且每个补偿电路包括彼此并联连接的多个开关。 当开关打开时,单个补偿电路中的每个开关连接以致动单个墨水喷射器。 补偿电路通过打开或多或少的开关来调整其内部电阻,从而补偿电源线的有效寄生电阻的变化
    • 8. 发明申请
    • REDUCED SIZE INKJET PRINTHEAD HEATER CHIP HAVING INTEGRAL VOLTAGE REGULATOR AND REGULATING CAPACITORS
    • 具有整体电压调节器和调节电容器的减小尺寸INKJET PRINTHEAD加热器芯片
    • WO2004060677A2
    • 2004-07-22
    • PCT/US0341272
    • 2003-12-24
    • LEXMARK INT INC
    • EDELEN JOHN GLENNPARISH GEORGE KEITHROWE KRISTI MAGGARD
    • B41J2/05B41J2/175B41J
    • B41J2/04521B41J2/04541B41J2/04543B41J2/04548B41J2/0457B41J2/0458B41J2/17526
    • An inkjet printhead heater chip has an integral voltage regulator that derives two output voltages from a single chip input voltage. One of the two output voltages powers control logic circuitry as the other powers FET drivers. Preferred output voltages include +3.3 volts for the control logic circuitry and +7.5 volts for the FET drivers. A Vgs of the FET is about +7.5 volts which enables a FET area width of about 400 microns. Outputs of the control logic circuitry provide input to the FET drivers. A resistive heater for rejecting ink couples between a drain of the FET and the chip input voltage. Voltage regulating capacitors exist on the heater chip in parallel with the input voltage and each of the output voltages. Preferred capacitors have a gate oxide and a polysilicon layer overlying a substrate. Inkjet printers for housing the printheads are also disclosed.
    • 喷墨打印头加热器芯片具有从单个芯片输入电压导出两个输出电压的积分电压调节器。 两个输出电压之一为另一个供电FET驱动器供电控制逻辑电路。 优选的输出电压包括控制逻辑电路的+3.3伏特,FET驱动器的+7.5伏特。 FET的Vgs约为+7.5伏,这使得FET面积宽度约为400微米。 控制逻辑电路的输出为FET驱动器提供输入。 用于拒绝FET的漏极和芯片输入电压之间的墨水耦合的电阻加热器。 电压调节电容器与输入电压和每个输出电压并联,存在于加热器芯片上。 优选的电容器具有覆盖在衬底上的栅极氧化物和多晶硅层。 还公开了用于容纳打印头的喷墨打印机。