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1. 发明授权

US11810527B2 Display device and data driver 有权
公开(公告)号：US11810527B2
公开(公告)日：2023-11-07
申请号：US17857045
申请日：2022-07-04
申请人： LAPIS Technology Co., Ltd.
发明人： Hiroshi Tsuchi
IPC分类号： G09G3/36 , G09G3/20
CPC分类号： G09G3/3685 , G09G3/2018 , G09G3/3614 , G09G3/3648 , G09G2310/0291 , G09G2310/0297 , G09G2310/08 , G09G2320/0209 , G09G2320/0247
摘要： The disclosure includes multiple data drivers provided for each predetermined number of data lines. Each data driver receives an image signal; generates, based on the image signal, a positive gradation data signal and a negative gradation data signal; outputs one of the positive and negative gradation data signals to one of a first and second data line groups of a display panel; and outputs the other of the positive and negative gradation data signals to the other of the first and second data line groups. The data driver shifts a phase of the negative gradation data signal in a direction delayed with respect to the positive gradation data signal, and controls a slew rate of an output amplifier for outputting the positive gradation data signal to be lower than that of an output amplifier for outputting the negative gradation data signal.

2. 发明授权

US11568831B2 Output circuit, data driver, and display apparatus 有权
公开(公告)号：US11568831B2
公开(公告)日：2023-01-31
申请号：US17672645
申请日：2022-02-15
申请人： LAPIS Technology Co., Ltd.
发明人： Hiroshi Tsuchi , Manabu Nishimizu
IPC分类号： G09G3/36 , H03K17/687 , G02F1/1362 , G02F1/133
摘要： An output circuit includes a first switch that outputs a positive voltage signal received via a first node when in an ON state, a second switch that outputs a negative voltage signal received via a second node when in an ON state, third and fourth switches that set the first and second nodes to a reference power supply voltage when in an ON state, a first follower circuit that generates, as a gate voltage, a voltage signal following and being in phase with a voltage signal of the first node through source follower operation and supplies the gate voltage to a gate of the first switch, and a second follower circuit that generates, as a gate voltage, a voltage signal following and being in phase with a voltage signal of the second node through source follower operation and supplies the gate voltage to a gate of the second switch.

3. 发明授权

US11862058B2 Load driving circuit, display driver, display apparatus and semiconductor device 有权
公开(公告)号：US11862058B2
公开(公告)日：2024-01-02
申请号：US17989660
申请日：2022-11-17
申请人： LAPIS Technology Co., Ltd.
发明人： Hiroshi Tsuchi
IPC分类号： G09G3/36 , G09G3/00 , H03K17/56 , G09G3/3225
CPC分类号： G09G3/006 , H03K17/56 , G09G3/3225 , G09G3/3648 , G09G2310/0291 , G09G2330/021 , G09G2330/12
摘要： Provided is an output amplifier having: a push-pull output-stage formed by first and second output-stage transistors; and a detection circuit detecting an abnormal output current output by the output amplifier and including: a coupling circuit, generating first and second currents mirroring current flowing in the first output-stage transistor and third and fourth currents mirroring current flowing in the second output-stage transistor, coupling the first and third currents at a first output node, outputting a first voltage at the first output node, coupling the second and fourth currents at a second output node, and outputting a second voltage at the second output node; and a determination circuit, outputting a determination signal indicating normality of an output current based on the first and second voltages. The coupling circuit generates the first to fourth currents. In the reference state, the third current >the first current, the second current >the fourth current.

4. 发明授权

US11532257B2 Display driver and display device 有权
公开(公告)号：US11532257B2
公开(公告)日：2022-12-20
申请号：US17515553
申请日：2021-11-01
申请人： LAPIS Technology Co., Ltd.
发明人： Hayato Koizumi , Hiroshi Tsuchi
IPC分类号： G09G5/10 , G09G3/20
摘要： The disclosure provides a display driver and a display device which includes the display driver. A display driver according to the disclosure has a temperature abnormality detection circuit that detects a temperature inside the display driver and generates a temperature abnormality detection signal indicating the presence of a temperature abnormality when the temperature therein is higher than a predetermined temperature threshold, and a temperature abnormality notification processing part that causes a display panel to display an image for informing of occurrence of a temperature abnormality for a predetermined period instead of an image based on a video signal in accordance with the temperature abnormality detection signal.

5. 发明公开

US20240312428A1 DIGITAL-TO-ANALOG CONVERTER, DATA DRIVER, AND DISPLAY DEVICE 审中-公开
公开(公告)号：US20240312428A1
公开(公告)日：2024-09-19
申请号：US18601529
申请日：2024-03-11
申请人： LAPIS Technology Co., Ltd.
发明人： Hiroshi Tsuchi
IPC分类号： G09G3/36 , G09G3/3275
CPC分类号： G09G3/3688 , G09G3/3275 , G09G2300/0828 , G09G2300/0838 , G09G2310/027 , G09G2310/0286 , G09G2310/0291
摘要： The disclosure includes a differential amplifier and a first decoder that distributes and supplies a first or a second voltage to each of a plurality of input terminals based on digital data. The differential amplifier includes a Kth-power of 2 pieces of differential pairs each driven by an individually received tail current, and a tail current control circuit that individually supplies the tail current to the Kth-power of 2 pieces of the differential pairs. The tail current control circuit sets a current ratio of the tail current flowing through of two respective differential pairs among the Kth-power of 2 pieces of the differential pairs to be larger than a current ratio of the tail current flowing through other respective differential pairs excluding the two differential pairs.

6. 发明授权

US11756501B2 Display apparatus output circuit selectively providing positive and negative voltages realized in reduced area in a simple configuration 有权
公开(公告)号：US11756501B2
公开(公告)日：2023-09-12
申请号：US17672655
申请日：2022-02-15
申请人： LAPIS Technology Co., Ltd.
发明人： Hiroshi Tsuchi
IPC分类号： G09G3/36
CPC分类号： G09G3/3696 , G09G3/3688 , G09G2310/0254 , G09G2310/0272
摘要： An output circuit includes a first switch that outputs a positive voltage signal received via a first node when in an ON state, a second switch that outputs a negative voltage signal received via a second node when in an ON state, third and fourth switches that set the first and second nodes to a reference power supply voltage when in an ON state, a first voltage follower circuit that supplies a voltage obtained by shifting a voltage of the positive voltage signal supplied to the first node to a negative side by a predetermined voltage difference to a gate of the first switch, and a second voltage follower circuit that supplies a voltage obtained by shifting a voltage of the negative voltage signal supplied to the second node to a positive side by a predetermined voltage difference to a gate of the second switch.

7. 发明授权

US12073804B2 Signal level shift conversion circuit for display driver and display device converting input voltage signal at synchronized timing 有权
公开(公告)号：US12073804B2
公开(公告)日：2024-08-27
申请号：US17555485
申请日：2021-12-19
申请人： LAPIS Technology Co., Ltd.
发明人： Hiroshi Tsuchi , Hayato Koizumi
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G3/3696 , G09G2310/0289 , G09G2310/08
摘要： The disclosure includes: first level shift part generating a voltage signal by converting an input voltage signal into amplitude between first negative and positive polarity power supply voltages; second level shift part generating a first polarity voltage signal by converting the voltage signal into amplitude between a reference and the first positive polarity power supply voltage; third level shift part outputting a first-polarity high voltage signal by converting the first polarity voltage signal into amplitude between a higher second positive polarity power supply voltage and the reference; fourth level shift part generating a second polarity voltage signal by converting the voltage signal into amplitude between the reference and the first negative polarity power supply voltage; and fifth level shift part outputting a second-polarity high voltage signal by converting the second polarity voltage signal into amplitude between a lower second negative polarity power supply voltage and the reference.

8. 发明授权

US11990102B2 Display apparatus and data driver 有权
公开(公告)号：US11990102B2
公开(公告)日：2024-05-21
申请号：US18150787
申请日：2023-01-05
申请人： LAPIS Technology Co., Ltd.
发明人： Hiroshi Tsuchi
IPC分类号： G09G3/36 , G09G3/20
CPC分类号： G09G3/3685 , G09G3/2096 , G09G3/3614 , G09G2310/08 , G09G2320/0209 , G09G2320/0247
摘要： In a first output mode, a signal in which a data pulse having a positive polarity voltage value appears in a predetermined cycle is output as a positive polarity gradation data signal, and a signal in which a data pulse having a negative polarity voltage value appears in the predetermined cycle with a phase different from the positive polarity gradation data signal is output as a negative polarity gradation data signal. In a second output mode, the above positive polarity gradation data signal is generated, and a signal in which a data pulse having a negative polarity voltage value appears in the predetermined cycle with the same phase as the positive polarity gradation data signal is output as the negative polarity gradation data signal. The first and second output modes are alternatively executed, and the output mode is switched within a predetermined period at intervals of the predetermined period.

9. 发明授权

US11955095B2 Output circuit for liquid crystal display driver providing high reliability and reduced area selectively outputting positive and negative voltage signals 有权
公开(公告)号：US11955095B2
公开(公告)日：2024-04-09
申请号：US17696838
申请日：2022-03-16
申请人： LAPIS Technology Co., Ltd.
发明人： Hiroshi Tsuchi
IPC分类号： G09G3/36 , G02F1/1362
CPC分类号： G09G3/36 , G02F1/136286 , G09G2300/0871 , G09G2330/02
摘要： The disclosure provides an output circuit, a display driver including the output circuit and a display device. The disclosure includes a PMOS transistor switch that outputs a positive voltage signal from an output terminal when it is turned on, an NMOS transistor switch that outputs a negative voltage signal from the output terminal when it is turned on, and a voltage control circuit that supplies a voltage obtained by shifting the level of a voltage of a source or a drain when the PMOS transistor switch is turned on to a high potential side to a back gate of the PMOS transistor switch and supplies a voltage obtained by shifting the level of a voltage of a source or a drain when the NMOS transistor switch is turned on to a low potential side to a back gate of the NMOS transistor switch.

10. 发明授权

US11769438B2 Display driver and display apparatus 有权
公开(公告)号：US11769438B2
公开(公告)日：2023-09-26
申请号：US17583998
申请日：2022-01-25
申请人： LAPIS Technology Co., Ltd.
发明人： Takuro Kotaki , Atsushi Hirama , Hiroshi Tsuchi
IPC分类号： G09G3/20
CPC分类号： G09G3/2003 , G09G2310/0291 , G09G2310/0297 , G09G2320/0666 , G09G2320/0673
摘要： The present invention includes first to j-th DA conversion circuits that are fixedly coupled to one of a plurality of gradation reference voltage generating circuits steadily generating respective gradation reference voltage groups according to gamma correction characteristics of color components different from one another, and select a gradation reference voltage corresponding to a pixel data piece among the gradation reference voltage group generated by the one of gradation reference voltage generating circuits to output the gradation reference voltage as a gradation voltage, an output unit that assigns the first to j-th gradation voltages to respective first to j-th driving voltage signals in a mode according to an output switching signal, and outputs the first to j-th driving voltage signals to the display panel, and an output control unit that generates the output switching signal to switch modes of assigning the first to j-th gradation voltages to the first to j-th driving voltage signals at every division period obtained by dividing a horizontal scanning period by a division number indicated by a division number setting signal, and outputs an input switching signal that causes the first to j-th driving voltage signals to be input in turn to the respective data lines as many as the division number at a cycle of the division periods for the respective first to j-th driving voltage signals.

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