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1. 发明授权

US09148148B2 Gate driving circuit and display apparatus having the same 有权
标题翻译：栅极驱动电路及其显示装置
公开(公告)号：US09148148B2
公开(公告)日：2015-09-29
申请号：US13083295
申请日：2011-04-08
申请人： Kyung-Ho Park , Si-Hyun Ahn , Dong-Hee Shin , Hyung-Jun Park , So-Young Kim , Soo-Hyun Kim
发明人： Kyung-Ho Park , Si-Hyun Ahn , Dong-Hee Shin , Hyung-Jun Park , So-Young Kim , Soo-Hyun Kim
IPC分类号： G09G3/00 , H03K19/0185 , G09G3/36
CPC分类号： H03K19/018521 , G09G3/3677 , G09G2310/0286
摘要： Provided is a gate driving circuit including cascade-connected stages that output gate signals. An n-th one of the stages (“n” is a natural number) includes a pull-up part, a pull-up controller, a first pull-down part, a second pull-down part, and a pull-down controller. The pull-up part outputs a first clock signal as an output signal of the n-th stage. The pull-up controller selectively applies first and second powers to a control electrode of the pull-up part. The first pull-down part pulls down a voltage applied to the control electrode of the pull-up part to an off voltage. The second pull-down part pulls down a voltage applied to an output electrode of the pull-up part to the off voltage. The pull-down controller selectively applies the first and second powers to control electrodes of the first and second pull-down parts.
摘要翻译：提供了一种栅极驱动电路，其包括输出栅极信号的级联连接级。第n级（“n”是自然数）包括上拉部分，上拉控制器，第一下拉部分，第二下拉部分和下拉控制器。上拉部分输出第一时钟信号作为第n级的输出信号。上拉控制器选择性地向上拉部分的控制电极施加第一和第二功率。第一下拉部分将施加到上拉部分的控制电极的电压拉低至截止电压。第二下拉部分将施加到上拉部分的输出电极的电压拉低至截止电压。下拉控制器选择性地将第一和第二功率施加到第一和第二下拉部分的控制电极。

2. 发明申请

US20120105398A1 GATE DRIVING CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME 有权
标题翻译：闸门驱动电路和显示装置
公开(公告)号：US20120105398A1
公开(公告)日：2012-05-03
申请号：US13083295
申请日：2011-04-08
申请人： Kyung-Ho Park , Si-Hyun Ahn , Dong-Hee Shin , Hyung-Jun Park , So-Young Kim , Soo-Hyun Kim
发明人： Kyung-Ho Park , Si-Hyun Ahn , Dong-Hee Shin , Hyung-Jun Park , So-Young Kim , Soo-Hyun Kim
IPC分类号： G06F3/038 , H03K3/00
CPC分类号： H03K19/018521 , G09G3/3677 , G09G2310/0286
摘要： Provided is a gate driving circuit including cascade-connected stages that output gate signals. An n-th one of the stages (“n” is a natural number) includes a pull-up part, a pull-up controller, a first pull-down part, a second pull-down part, and a pull-down controller. The pull-up part outputs a first clock signal as an output signal of the n-th stage. The pull-up controller selectively applies first and second powers to a control electrode of the pull-up part. The first pull-down part pulls down a voltage applied to the control electrode of the pull-up part to an off voltage. The second pull-down part pulls down a voltage applied to an output electrode of the pull-up part to the off voltage. The pull-down controller selectively applies the first and second powers to control electrodes of the first and second pull-down parts.
摘要翻译：提供了一种栅极驱动电路，其包括输出栅极信号的级联连接级。第n级（“n”是自然数）包括上拉部分，上拉控制器，第一下拉部分，第二下拉部分和下拉控制器。上拉部分输出第一时钟信号作为第n级的输出信号。上拉控制器选择性地向上拉部分的控制电极施加第一和第二功率。第一下拉部分将施加到上拉部分的控制电极的电压拉低至截止电压。第二下拉部分将施加到上拉部分的输出电极的电压拉低至截止电压。下拉控制器选择性地将第一和第二功率施加到第一和第二下拉部分的控制电极。

3. 发明申请

US20110304786A1 DISPLAY SUBSTRATE 审中-公开
标题翻译：显示基板
公开(公告)号：US20110304786A1
公开(公告)日：2011-12-15
申请号：US12955582
申请日：2010-11-29
申请人： Seon-Kyoon MOK , Si-Hyun Ahn , Woo-Jung Shin , Byoung-Sun Na , So-Young Kim
发明人： Seon-Kyoon MOK , Si-Hyun Ahn , Woo-Jung Shin , Byoung-Sun Na , So-Young Kim
IPC分类号： G02F1/133
CPC分类号： G02F1/136286 , G02F1/133 , G02F1/1345 , G09G3/3696
摘要： A display substrate includes a plurality of gate lines extending in a first direction and arranged in a second direction in a display area of the display substrate, an alignment film formed in the display area and in an end area adjacent to end portions of the gate lines in a peripheral area surrounding the display area, and a plurality of circuit stages formed in the end area to connect to the gate lines and a dummy stage connected to a last circuit stage of the circuit stages. Each of the circuit stages includes a gate driving circuit disposed at the higher portion the gate line corresponding to the circuit stages and a gate connecting line formed in the peripheral area between the display area and the gate driving circuit to connect each of the circuit stages with each of the gate lines.
摘要翻译：显示基板包括在显示基板的显示区域中沿第一方向延伸并沿第二方向布置的多条栅极线，形成在显示区域中的取向膜和与栅极线的端部相邻的端部区域在围绕显示区域的外围区域中，以及形成在端部区域中以连接到栅极线的多个电路级以及连接到电路级的最后电路级的虚拟级。每个电路级包括设置在对应于电路级的栅极线的较高部分处的栅极驱动电路和形成在显示区域和栅极驱动电路之间的周边区域中的栅极连接线，以将每个电路级与每个电路级连接每条门线。

4. 发明授权

US09024857B2 Gate driving apparatus and display device including the same 有权
标题翻译：门驱动装置及包括其的显示装置
公开(公告)号：US09024857B2
公开(公告)日：2015-05-05
申请号：US13074378
申请日：2011-03-29
申请人： Si-Hyun Ahn , Byoung-Sun Na , Kyong-Sik Choi , Hye-Rim Han , Seon-Kyoon Mok , So-Young Kim , Woo-Jung Shin
发明人： Si-Hyun Ahn , Byoung-Sun Na , Kyong-Sik Choi , Hye-Rim Han , Seon-Kyoon Mok , So-Young Kim , Woo-Jung Shin
IPC分类号： G09G3/36 , G02F1/1343 , G02F1/1345 , G06F3/038 , G11C19/28
CPC分类号： G09G3/3677 , G09G2300/0426 , G09G2310/0286 , G09G2330/04 , G11C19/28
摘要： Provided are a gate driving apparatus and a display device including the same. The gate driving apparatus includes a plurality of stages arranged sequentially, each stage is adapted to output a gate signal and including first output lines and a second output line, wherein the first output lines are electrically connected to a gate line corresponding to each of the stages and are adapted to transmit the gate signal to a plurality of pixels coupled to the gate line, the second output line is adapted to transmit the gate signal to a preceding stage of each of the stages, and the first output lines and the second output line share one contact pad.
摘要翻译：提供了一种门驱动装置和包括该驱动装置的显示装置。栅极驱动装置包括依次布置的多个级，每一级适于输出栅极信号并包括第一输出线和第二输出线，其中第一输出线电连接到与每个级对应的栅极线并且适于将栅极信号传输到耦合到栅极线的多个像素，第二输出线适于将栅极信号传输到每个级的前级，并且第一输出线和第二输出线共享一个接触垫。

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