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    • 5. 发明申请
    • THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURE
    • 薄膜晶体管基板及其制造方法
    • US20080135846A1
    • 2008-06-12
    • US11955252
    • 2007-12-12
    • Kyoung-Ju SHINChong-Chul ChaiMee-Hye Jung
    • Kyoung-Ju SHINChong-Chul ChaiMee-Hye Jung
    • H01L27/12H01L21/84
    • H01L27/1288H01L27/0248H01L27/1214
    • A thin film transistor (“TFT”) substrate in which the size of a pixel TFT formed in a display area is reduced using a single slit mask, and the length of the channel area of a protection TFT constituting an electrostatic discharge protection circuit formed in a non-display area is formed larger than that of the pixel TFT using the same mask pattern. The TFT substrate includes a signal line and a discharge line formed on a substrate, a signal supply pad formed on one end of the signal line to supply a signal to the signal line, and an electrostatic discharge protection circuit including at least one protection TFT including a plurality of channels formed between the signal supply pad and the discharge line and/or between the signal line and the discharge line.
    • 使用单个狭缝掩模,在显示区域中形成的像素TFT的尺寸减小的薄膜晶体管(“TFT”)基板,以及构成静电放电保护电路的保护TFT的沟道面积的长度 使用相同的掩模图案,非显示区域形成为大于像素TFT的非显示区域。 TFT基板包括形成在基板上的信号线和放电线,形成在信号线的一端上以向信号线提供信号的信号供给焊盘,以及包括至少一个保护TFT的静电放电保护电路, 形成在信号供给焊盘和放电线之间和/或信号线与放电线之间的多个通道。
    • 6. 发明授权
    • Thin film transistor substrate and method of manufacture
    • 薄膜晶体管基板及其制造方法
    • US07928437B2
    • 2011-04-19
    • US11955252
    • 2007-12-12
    • Kyoung-Ju ShinChong-Chul ChaiMee-Hye Jung
    • Kyoung-Ju ShinChong-Chul ChaiMee-Hye Jung
    • H01L29/04
    • H01L27/1288H01L27/0248H01L27/1214
    • A thin film transistor (“TFT”) substrate in which the size of a pixel TFT formed in a display area is reduced using a single slit mask, and the length of the channel area of a protection TFT constituting an electrostatic discharge protection circuit formed in a non-display area is formed larger than that of the pixel TFT using the same mask pattern. The TFT substrate includes a signal line and a discharge line formed on a substrate, a signal supply pad formed on one end of the signal line to supply a signal to the signal line, and an electrostatic discharge protection circuit including at least one protection TFT including a plurality of channels formed between the signal supply pad and the discharge line and/or between the signal line and the discharge line.
    • 使用单个狭缝掩模,在显示区域中形成的像素TFT的尺寸减小的薄膜晶体管(“TFT”)基板,以及构成静电放电保护电路的保护TFT的沟道面积的长度 使用相同的掩模图案,非显示区域形成为大于像素TFT的非显示区域。 TFT基板包括形成在基板上的信号线和放电线,形成在信号线的一端上以向信号线提供信号的信号供给焊盘,以及包括至少一个保护TFT的静电放电保护电路, 形成在信号供给焊盘和放电线之间和/或信号线与放电线之间的多个通道。
    • 10. 发明申请
    • LIQUID CRYSTAL DISPLAY
    • 液晶显示器
    • US20090256985A1
    • 2009-10-15
    • US12335133
    • 2008-12-15
    • Kwang-Chul JungMee-Hye JungHee-Seop KimChong-Chul ChaiSung-Woon Kim
    • Kwang-Chul JungMee-Hye JungHee-Seop KimChong-Chul ChaiSung-Woon Kim
    • G02F1/133
    • G02F1/1368
    • A liquid crystal display includes a substrate; a common voltage line formed on the substrate and transmitting a common voltage; a pixel electrode formed on the common voltage line and including a first subpixel electrode and a second subpixel electrode; a first thin film transistor connected to the first subpixel electrode, and including a first gate electrode, a first source electrode, and a first drain electrode; a second thin film transistor connected to the second subpixel electrode, and including a second gate electrode, a second source electrode, and a second drain electrode; a boosting capacitor connected to the first subpixel electrode; a third thin film transistor connected to the common voltage line and the boosting capacitor, and including a third gate electrode, a third source electrode, and a third drain electrode; and a fourth thin film transistor connected to the second subpixel electrode and the boosting capacitor, wherein the common voltage line is formed in the same layer as the third source electrode, and is electrically connected to the third source electrode.
    • 液晶显示器包括基板; 形成在基板上并传输公共电压的公共电压线; 形成在所述公共电压线上并且包括第一子像素电极和第二子像素电极的像素电极; 连接到第一子像素电极的第一薄膜晶体管,并且包括第一栅电极,第一源电极和第一漏电极; 连接到第二子像素电极的第二薄膜晶体管,并且包括第二栅电极,第二源电极和第二漏电极; 连接到所述第一子像素电极的升压电容器; 连接到公共电压线和升压电容器的第三薄膜晶体管,并且包括第三栅电极,第三源电极和第三漏电极; 以及连接到所述第二子像素电极和所述升压电容器的第四薄膜晶体管,其中所述公共电压线形成在与所述第三源电极相同的层中,并且电连接到所述第三源电极。