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    • 1. 发明授权
    • Latch structure, frequency divider, and methods for operating same
    • 锁存结构,分频器和操作方法
    • US08058901B2
    • 2011-11-15
    • US12552810
    • 2009-09-02
    • Kun ZhangKenneth Charles Barnett
    • Kun ZhangKenneth Charles Barnett
    • H03K19/173
    • H03K3/356121H03K5/1565H03K23/544
    • A latch includes three circuits. The first circuit drives a first output (QB) to a first level when a first input (D) and a first clock phase (CK) are both low, to a second level when D and CK are both high, and provides high impedance (HI-Z) when different logic levels are applied to D and CK. The second circuit drives a second output (Q) to the first level when a third input (DB) and a complimentary clock phase (CKB) are both low, to the second level when DB and CKB are both high, and provides HI-Z when different logic levels are applied to DB and CKB. The third circuit maintains voltages of Q and QB when the first and second circuits provide HI-Z at Q and QB. Odd-number dividers constructed with such latches produce 50% duty cycle operation without restricting output pulse widths to integer multiples of input periods.
    • 闩锁包括三个电路。 当D和CK均为高电平时,当第一输入(D)和第一时钟相位(CK)均为低电平时,第一电路将第一输出(QB)驱动到第一电平,并提供高阻抗( 当对D和CK应用不同的逻辑电平时,HI-Z)。 当DB和CKB均为高电平时,第三输入(DB)和互补时钟相位(CKB)均为低电平时,第二电路将第二输出(Q)驱动到第一电平,并提供HI-Z 当DB和CKB应用不同的逻辑电平时。 当第一和第二电路在Q和QB提供HI-Z时,第三电路维持Q和QB的电压。 使用这种锁存器构造的奇数分频器可以产生50%的占空比运算,而不会将输出脉冲宽度限制为输入周期的整数倍。
    • 4. 发明申请
    • ACTIVE CIRCUITS WITH ISOLATION SWITCHES
    • 具有隔离开关的有源电路
    • US20080224770A1
    • 2008-09-18
    • US11832581
    • 2007-08-01
    • Tae Wook KimKenneth Charles BarnettHarish Muthali
    • Tae Wook KimKenneth Charles BarnettHarish Muthali
    • H03F1/14
    • H03F3/72H03F1/342H03F3/211H03F3/45475H03F3/68H03F2203/21142H03F2203/45731
    • Active circuits with isolation switches are described. In one design, an apparatus includes first and second amplifiers coupled in parallel. Each amplifier receives an input signal and provides an output signal. Each amplifier has a switch that isolates the amplifier when the amplifier is turned off. The first and second amplifiers may be high and low gain amplifiers or two low noise amplifiers (LNAs). The first and second amplifiers may be for different communication systems, different frequency bands, and/or different gain ranges. In general, any number of amplifiers may be coupled in parallel, and each amplifier may have a switch to isolate that amplifier when turned off. A switch for an amplifier may be a shunt switch coupled between an internal node of the amplifier and ground. The shunt switch may be closed when the amplifier is turned off and may be opened when the amplifier is turned on.
    • 描述了具有隔离开关的有源电路。 在一种设计中,装置包括并联耦合的第一和第二放大器。 每个放大器接收输入信号并提供输出信号。 每个放大器都有一个开关,当放大器关闭时,隔离放大器。 第一和第二放大器可以是高和低增益放大器或两个低噪声放大器(LNA)。 第一和第二放大器可以用于不同的通信系统,不同的频带和/或不同的增益范围。 通常,任何数量的放大器可以并联耦合,并且每个放大器可以具有开关以在关断时隔离该放大器。 用于放大器的开关可以是耦合在放大器的内部节点和地之间的并联开关。 当放大器关闭时,并联开关可能关闭,并且当放大器接通时可能会断开分流开关。