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1. 发明授权

US06869478B2 Method for producing silicon single crystal having no flaw 有权
标题翻译：无裂纹的硅单晶的制造方法
公开(公告)号：US06869478B2
公开(公告)日：2005-03-22
申请号：US10239593
申请日：2001-03-19
申请人： Kozo Nakamura , Toshiaki Saishoji , Shinji Togawa , Toshirou Kotooka , Susumu Maeda
发明人： Kozo Nakamura , Toshiaki Saishoji , Shinji Togawa , Toshirou Kotooka , Susumu Maeda
IPC分类号： C30B29/06 , C30B15/00 , C30B15/14 , C30B15/22 , H01L21/208 , C30B15/20
CPC分类号： C30B29/06 , C30B15/14 , C30B15/203 , Y10T117/1004 , Y10T117/1008 , Y10T117/1068
摘要： A method for producing a silicon ingot having no defect over a wide range of region with stability and good reproducibility, wherein when a silicon single crystal (11) is pulled up form a silicon melt (13), the shape of a solid-liquid interface (14) which a boundary between the silicon melt (13) and the silicon single crystal (11) and the temperature distribution on the side face (11b) of a single crystal under being pulled up are appropriately controlled.
摘要翻译：一种在宽范围的区域内产生无缺陷的硅锭的稳定性和再现性的方法，其中当硅单晶（11）由硅熔体（13）拉出时，固液界面的形状（14），其中硅熔体（13）和硅单晶（11）之间的边界以及在被拉起的单晶的侧面（11b）上的温度分布被适当地控制。

2. 发明授权

US07235128B2 Process for producing single-crystal semiconductor and apparatus for producing single-crystal semiconductor 有权
标题翻译：单晶半导体的制造方法及单晶半导体的制造装置
公开(公告)号：US07235128B2
公开(公告)日：2007-06-26
申请号：US11005180
申请日：2004-12-06
申请人： Susumu Maeda , Hiroshi Inagaki , Shigeki Kawashima , Shoei Kurosaka , Kozo Nakamura
发明人： Susumu Maeda , Hiroshi Inagaki , Shigeki Kawashima , Shoei Kurosaka , Kozo Nakamura
IPC分类号： C30B15/20
CPC分类号： C30B29/06 , C30B15/20 , C30B15/22 , C30B15/36 , Y10S117/90 , Y10T117/1004
摘要： A process for producing a single-crystal semiconductor and an apparatus therefor. A single-crystal semiconductor of large diameter and large weight can be lifted with the use of existing equipment not having any substantial change thereto while not influencing the oxygen concentration of single-crystal semiconductor and the temperature of melt and while not unduly raising the temperature of seed crystal. In particular, the relationship (L1, L2, L3) between the allowable temperature difference (ΔT) and the diameter (D) of seed crystal (14) is preset so that the temperature difference between the seed crystal (14) at the time the seed crystal (14) is immersed in the melt and the melt (5) falls within the allowable temperature difference (ΔT) at which dislocations are not introduced into the seed crystal (14). In accordance with the relationship (L1, L2, L3), the allowable temperature difference (ΔT) corresponding to the diameter (D) of seed crystal (14) to be immersed in the melt is determined. Temperature control is conducted so that at the time the seed crystal (14) is immersed in the melt (5) the temperature difference between the seed crystal (14) and the melt (5) falls within the determined allowable temperature difference (ΔT).
摘要翻译：一种单晶半导体的制造方法及其装置。可以使用不具有任何显着变化的现有设备来提升大直径和大重量的单晶半导体，同时不影响单晶半导体的氧浓度和熔体的温度，同时不会过度地提高温度晶种。特别地，预设晶种（14）的允许温差（DeltaT）和直径（D）之间的关系（L 1，L 2，L 3），使得晶种（14）在籽晶（14）浸入熔体中的时间和熔体（5）落入未被引入到晶种（14）中的位错的允许温度差（DeltaT）之内。根据关系（L 1，L 2，L 3），确定与浸入熔体中的晶种（14）的直径（D）相对应的容许温度差（DeltaT）。进行温度控制，使晶种（14）浸入熔融物（5）中时晶种（14）和熔体（5）之间的温度差落在确定的允许温差（DeltaT）之内。

3. 发明申请

US20060005762A1 Method for producing silicon wafer 有权
标题翻译：硅晶片的制造方法
公开(公告)号：US20060005762A1
公开(公告)日：2006-01-12
申请号：US10533147
申请日：2003-10-31
申请人： Susumu Maeda , Hiroshi Inagaki , Shigeki Kawashima , Shoei Kurosaka , Kozo Nakamura
发明人： Susumu Maeda , Hiroshi Inagaki , Shigeki Kawashima , Shoei Kurosaka , Kozo Nakamura
IPC分类号： C30B15/00 , C30B21/06 , C30B23/00 , C30B30/04 , C30B27/02
CPC分类号： C30B29/06 , C30B15/203
摘要： The present invention is to produce a silicon crystal wherein the boron concentration in the silicon crystal and the growth condition V/G are controlled so that the boron concentration in the silicon crystal is no less than 1×1018 atoms/cm3 and the growth condition V/G falls within the epitaxial defect-free region α2 whose lower limit line LN1 is the line indicating that the growth rate V gradually drops as the boron concentration increases. Further, the present invention is to produce a silicon wafer wherein the boron concentration in the silicon crystal and the growth condition V/G are controlled so as to include at least the epitaxial defect region β1, and the heat treatment condition of the silicon crystal and the oxygen concentration in the silicon crystal are controlled so that no OSF nuclei grow to OSFs. Moreover, the present invention is to produce a silicon crystal wherein the boron concentration in the silicon crystal and the growth condition V/G are controlled so that they fall in the vicinity of the lower limit line LN3 within the epitaxial defect-free region α1.
摘要翻译：本发明是为了制造硅晶体，其中硅晶体中的硼浓度和生长条件V / G被控制，使得硅晶体中的硼浓度不低于1×10 18原子/ cm 3，并且生长条件V / G落在外延无缺陷区域α2N中，其下限线LN1是表示生长速率V逐渐下降的线硼浓度增加。此外，本发明是为了制造硅晶片，其中硅晶体中的硼浓度和生长条件V / G被控制为至少包括外延缺陷区β1，并且控制硅晶体的热处理条件和硅晶体中的氧浓度，使得OSF核不生长到OSF。此外，本发明是为了制造硅晶体，其中硅晶体中的硼浓度和生长条件V / G被控制为使得它们落入外延缺陷区域内的下限线LN3附近， SUB> 1 。

4. 发明申请

US20050139149A1 Process for producing single-crystal semiconductor and apparatus for producing single-crystal semiconductor 有权
标题翻译：单晶半导体的制造方法及单晶半导体的制造装置
公开(公告)号：US20050139149A1
公开(公告)日：2005-06-30
申请号：US11005180
申请日：2004-12-06
申请人： Susumu Maeda , Hiroshi Inagaki , Shigeki Kawashima , Shoei Kurosaka , Kozo Nakamura
发明人： Susumu Maeda , Hiroshi Inagaki , Shigeki Kawashima , Shoei Kurosaka , Kozo Nakamura
IPC分类号： C30B15/00 , C30B15/20 , C30B15/22 , C30B15/36 , C30B29/06 , C30B21/06 , C30B27/02 , C30B28/10 , C30B30/04
CPC分类号： C30B29/06 , C30B15/20 , C30B15/22 , C30B15/36 , Y10S117/90 , Y10T117/1004
摘要： A process for producing a single-crystal semiconductor and an apparatus therefor. A single-crystal semiconductor of large diameter and large weight can be lifted with the use of existing equipment not having any substantial change thereto while not influencing the oxygen concentration of single-crystal semiconductor and the temperature of melt and while not unduly raising the temperature of seed crystal. In particular, the relationship (L1, L2, L3) between the allowable temperature difference (ΔT) and the diameter (D) of seed crystal (14) is preset so that the temperature difference between the seed crystal (14) at the time the seed crystal (14) is immersed in the melt and the melt (5) falls within the allowable temperature difference (ΔT) at which dislocations are not introduced into the seed crystal (14). In accordance with the relationship (L1, L2, L3), the allowable temperature difference (ΔT) corresponding to the diameter (D) of seed crystal (14) to be immersed in the melt is determined. Temperature control is conducted so that at the time the seed crystal (14) is immersed in the melt (5) the temperature difference between the seed crystal (14) and the melt (5) falls within the determined allowable temperature difference (ΔT).
摘要翻译：一种单晶半导体的制造方法及其装置。可以使用不具有任何显着变化的现有设备来提升大直径和大重量的单晶半导体，同时不影响单晶半导体的氧浓度和熔体的温度，同时不会过度地提高温度晶种。特别地，预设晶种（14）的允许温差（DeltaT）和直径（D）之间的关系（L 1，L 2，L 3），使得晶种（14）在籽晶（14）浸入熔体中的时间和熔体（5）落入未被引入到晶种（14）中的位错的允许温度差（DeltaT）之内。根据关系（L 1，L 2，L 3），确定与浸入熔体中的晶种（14）的直径（D）相对应的允许温度差（DeltaT）。进行温度控制，使晶种（14）浸入熔融物（5）中时晶种（14）和熔体（5）之间的温度差落在确定的允许温差（DeltaT）之内。

5. 发明授权

US07329317B2 Method for producing silicon wafer 有权
标题翻译：硅晶片的制造方法
公开(公告)号：US07329317B2
公开(公告)日：2008-02-12
申请号：US10533147
申请日：2003-10-31
申请人： Susumu Maeda , Hiroshi Inagaki , Shigeki Kawashima , Shoei Kurosaka , Kozo Nakamura
发明人： Susumu Maeda , Hiroshi Inagaki , Shigeki Kawashima , Shoei Kurosaka , Kozo Nakamura
IPC分类号： C30B15/00 , C30B21/06 , C30B23/00 , C30B30/04 , C30B27/02
CPC分类号： C30B29/06 , C30B15/203
摘要： The present invention is to produce a silicon crystal wherein the boron concentration in the silicon crystal and the growth condition V/G are controlled so that the boron concentration in the silicon crystal is no less than 1×1018 atoms/cm3 and the growth condition V/G falls within the epitaxial defect-free region α2 whose lower limit line LN1 is the line indicating that the growth rate V gradually drops as the boron concentration increases. A silicon wafer is also produced wherein the boron concentration in the silicon crystal and the growth condition V/G are controlled so as to include at least the epitaxial defect region β1, and both the heat treatment condition and the oxygen concentration of the silicon crystal are controlled so that no OSF nuclei grow to OSFs.
摘要翻译：本发明是为了制造硅晶体，其中硅晶体中的硼浓度和生长条件V / G被控制，使得硅晶体中的硼浓度不低于1×10 18原子/ cm 3，并且生长条件V / G落在外延缺陷区域α2N中，其下限线LN 1是表示生长速率V逐渐下降的线随着硼浓度的增加。还生产硅晶片，其中硅晶体中的硼浓度和生长条件V / G被控制为至少包括外延缺陷区β1，并且热处理条件和控制硅晶体的氧浓度使得OSF核不生长到OSF。

6. 发明授权

US08999864B2 Silicon wafer and method for heat-treating silicon wafer 有权
标题翻译：硅晶片和硅晶片热处理方法
公开(公告)号：US08999864B2
公开(公告)日：2015-04-07
申请号：US13322080
申请日：2010-05-28
申请人： Takeshi Senda , Hiromichi Isogai , Eiji Toyoda , Koji Araki , Tatsuhiko Aoki , Haruo Sudo , Koji Izunome , Susumu Maeda , Kazuhiko Kashima , Hiroyuki Saito
发明人： Takeshi Senda , Hiromichi Isogai , Eiji Toyoda , Koji Araki , Tatsuhiko Aoki , Haruo Sudo , Koji Izunome , Susumu Maeda , Kazuhiko Kashima , Hiroyuki Saito
IPC分类号： H01L21/26 , H01L21/00 , H01L21/322
CPC分类号： H01L21/3225 , Y10S438/928
摘要： A silicon wafer for preventing a void defect in a bulk region from becoming source of contamination and slip generation in a device process is provided. And a heat-treating method thereof for reducing crystal defects such as COP in a region near the wafer surface to be a device active region is provided. The silicon wafer has a surface region 1 which is a defect-free region and a bulk region 2 including void defect of a polyhedron whose basic shape is an octahedron in which a corner portion of the polyhedron is in the curved shape and an inner-wall oxide film the void defect is removed. The silicon wafer is provided by performing a heat-treating method in which gas to be supplied, inner pressure of spaces and a maximum achievable temperature are set to a predetermined value when subjecting the silicon wafer produced by a CZ method to RTP.
摘要翻译：提供了一种用于防止大块区域中的空隙缺陷成为装置处理中的污染源和滑移产生的硅晶片。并且提供了一种用于在晶片表面附近的区域中减少诸如COP之类的晶体缺陷的热处理方法作为器件有源区。硅晶片具有作为无缺陷区域的表面区域1和包括多面体的空隙的主体区域2，其基本形状为八面体，多面体的角部为弯曲形状，内壁氧化膜去除空隙缺陷。通过进行热处理方法来提供硅晶片，当将通过CZ方法制造的硅晶片经受RTP时，将待供给的气体，空间的内部压力和最大可实现温度设定为预定值。

7. 发明申请

US20140346914A1 STATOR WINDING OF ELECTRICAL ROTATING MACHINE 有权
标题翻译：电动旋转机定子绕组
公开(公告)号：US20140346914A1
公开(公告)日：2014-11-27
申请号：US14372226
申请日：2012-04-19
申请人： Yoichi Funasaki , Kiyonori Koga , Susumu Maeda
发明人： Yoichi Funasaki , Kiyonori Koga , Susumu Maeda
IPC分类号： H02K3/28
CPC分类号： H02K3/28
摘要： In a three-phase, four-pole, four-parallel-circuit stator winding of an electrical rotating machine, each of two sets of U-phase output terminals U1, U2 is formed of two sets of parallel circuits each formed of windings having a same pitch (one is formed of first and second winding circuits 1, 2 and the other is formed of third and fourth winding circuits 3, 4). The winding of each winding circuit is formed of two serially-connected coil phase bands (coil phase bands a and b form the first winding circuit 1 and coil phase bands c and d, coil phase bands e and f, and coil phase bands g and h form the second, third, and fourth winding circuits 2, 3, 4, respectively). A voltage vector phase difference and a voltage difference between the winding circuits can be eliminated without providing a jumper wire to winding end portions.
摘要翻译：在旋转电机的三相四极并联电路定子绕组中，两组U相输出端子U1，U2中的每一组由两组并联电路组成，每组由具有相同的间距（一个由第一和第二绕组电路1,2形成，另一个由第三和第四绕组电路3,4组成）。每个绕组电路的绕组由两个串联的线圈相位带（线圈相位带a和b形成第一绕组电路1和线圈相位带c和d，线圈相位带e和f以及线圈相位带g和 h分别形成第二，第三和第四绕组电路2,3,4）。可以消除绕组电路之间的电压矢量相位差和电压差，而不向绕组端部提供跨接线。

8. 发明申请

US20140034194A1 STEEL FOR NITRIDING AND NITRIDED COMPONENT 审中-公开
标题翻译：用于硝化和硝化组分的钢
公开(公告)号：US20140034194A1
公开(公告)日：2014-02-06
申请号：US13982594
申请日：2012-01-26
申请人： Hideki Imataka , Masato Yuya , Yuya Gyotoku , Atsushi Kobayashi , Susumu Maeda
发明人： Hideki Imataka , Masato Yuya , Yuya Gyotoku , Atsushi Kobayashi , Susumu Maeda
IPC分类号： C22C38/50 , C22C38/46 , C22C38/44 , C22C38/28 , C22C38/00 , C22C38/22 , C22C38/20 , C22C38/06 , C22C38/04 , C22C38/02 , C23C8/26 , C22C38/24
CPC分类号： C22C38/50 , C21D1/06 , C21D9/32 , C22C38/001 , C22C38/02 , C22C38/04 , C22C38/06 , C22C38/20 , C22C38/22 , C22C38/24 , C22C38/28 , C22C38/44 , C22C38/46 , C23C8/26
摘要： A steel for nitriding having a chemical composition consisting of, by mass percent, C: 0.07-0.14%, Si: 0.10-0.30%, Mn: 0.4-1.0%, S: 0.005-0.030%, Cr: 1.0-1.5%, Mo: ≦0.05% (including 0%), Al: 0.010% or more to less than 0.10%, V: 0.10-0.25%, optionally at least one element selected from Cu: ≦0.30% and Ni: ≦0.25% [0.61Mn+1.11Cr+0.35Mo+0.47≦2.30], and the balance of Fe and impurities. P, N, Ti and O among the impurities are P: ≦0.030%, N: ≦0.008%, Ti: ≦0.005%, and O: ≦0.0030%. The steel is easily subjected to cutting before nitriding and suitable for use as an automobile ring gear. The nitrided component having a surface hardness of 650-900 HV, core hardness being ≧150 HV, and effective case depth of ≧0.15 mm has excellent bending fatigue strength and surface fatigue strength although the content of Mo is as low as ≦0.05% and has a small amount of expansion caused by nitriding.
摘要翻译：按质量％计含有C：0.07-0.14％，Si：0.10-0.30％，Mn：0.4-1.0％，S：0.005-0.030％，Cr：1.0-1.5％的化学组成的氮化氮钢， Mo：≤0.05％（包括0％），Al：0.010％以上至小于0.10％，V：0.10-0.25％，任选至少一种选自Cu：0.30％和Ni：0.25％的元素[0.61 Mn +1.11Cr+0.35Mo+0.47@2.30]，余量为Fe和杂质。杂质中的P，N，Ti和O分别为P：@ 0.030％，N：0.008％，Ti：0.005％，O：0.0030％。钢在氮化之前易于切割，适用于汽车齿圈。表面硬度为650-900HV，芯硬度> 150HV，有效壳深度≥0.15mm的氮化组分具有优异的弯曲疲劳强度和表面疲劳强度，尽管Mo的含量低至≤0.05 ％，渗氮少量膨胀。

9. 发明授权

US08252700B2 Method of heat treating silicon wafer 有权
标题翻译：硅晶片热处理方法
公开(公告)号：US08252700B2
公开(公告)日：2012-08-28
申请号：US12656232
申请日：2010-01-21
申请人： Takeshi Senda , Hiromichi Isogai , Eiji Toyoda , Kumiko Murayama , Koji Araki , Tatsuhiko Aoki , Haruo Sudo , Koji Izunome , Susumu Maeda , Kazuhiko Kashima
发明人： Takeshi Senda , Hiromichi Isogai , Eiji Toyoda , Kumiko Murayama , Koji Araki , Tatsuhiko Aoki , Haruo Sudo , Koji Izunome , Susumu Maeda , Kazuhiko Kashima
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： C30B33/02 , C30B29/06 , C30B33/005 , H01L21/3225 , H01L21/324 , H01L21/67109
摘要： In a method of heat treating a wafer obtained by slicing a silicon single crystal ingot manufactured by the Czochralski method, a rapid heating/cooling heat treatment is carried out by setting a holding time at an ultimate temperature of 1200° C. or more and a melting point of silicon or less to be equal to or longer than one second and to be equal to or shorter than 60 seconds in a mixed gas atmosphere containing oxygen having an oxygen partial pressure of 1.0% or more and 20% or less and argon, and an oxide film having a thickness of 9.1 nm or less or 24.3 nm or more is thus formed on a surface of the silicon wafer.
摘要翻译：在通过切片由切克劳斯基法制造的硅单晶锭进行切片而得到的晶片的热处理方法中，通过将保持时间设定为1200℃以上的最终温度，进行快速加热/冷却热处理，在含有氧分压为1.0％以上且20％以下的氧和氩气的混合气体气氛中，硅的熔点以下等于或大于1秒且等于或小于60秒，因此在硅晶片的表面上形成厚度为9.1nm以下或24.3nm以上的氧化膜。

10. 发明申请

US20100055884A1 MANUFACTURING METHOD FOR SILICON WAFER 有权
标题翻译：硅波的制造方法
公开(公告)号：US20100055884A1
公开(公告)日：2010-03-04
申请号：US12512229
申请日：2009-07-30
申请人： Hiromichi Isogai , Takeshi Senda , Eiji Toyoda , Kumiko Murayama , Koji Izunome , Susumu Maeda , Kazuhiko Kashima
发明人： Hiromichi Isogai , Takeshi Senda , Eiji Toyoda , Kumiko Murayama , Koji Izunome , Susumu Maeda , Kazuhiko Kashima
IPC分类号： H01L21/20
CPC分类号： C30B29/06 , C30B15/00 , C30B33/02 , H01L21/3225
摘要： In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300° C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.
摘要翻译：在硅晶片的制造方法中，在硅晶片上进行第一热处理工艺，同时引入具有0.01体积％的氧气的第一气体。％以上1.00体积％％以下和稀有气体，并且在停止引入第一气体并引入具有20体积％的氧气的第二气体的同时进行第二热处理工艺。％以上100体积％％以下，稀有气体。在第一热处理工艺中，将硅晶片以第一加热速率快速加热到1300℃或更高的第一温度和硅的熔点或更低，并保持在第一温度。在第二热处理工艺中，将硅晶片保持在第一温度，并以第一冷却速度从第一温度快速冷却。

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