专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20070249158A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070249158A1
公开(公告)日：2007-10-25
申请号：US11808667
申请日：2007-06-12
申请人： Yoshio Okayama , Akira Suzuki , Koujiro Kameyama , Mitsuo Umemoto , Kenji Takahashi , Hiroshi Terao , Masataka Hoshino
发明人： Yoshio Okayama , Akira Suzuki , Koujiro Kameyama , Mitsuo Umemoto , Kenji Takahashi , Hiroshi Terao , Masataka Hoshino
IPC分类号： H01L21/4763
CPC分类号： H01L24/12 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L24/11 , H01L2224/05001 , H01L2224/05009 , H01L2224/05022 , H01L2224/0508 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/13025 , H01L2224/13099 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2224/05599
摘要： A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.
摘要翻译：提供了可靠性提高的半导体器件及其制造方法。本发明的半导体器件包括半导体衬底，通过由氧化硅，氮化硅等形成的绝缘层在半导体衬底上形成的焊盘电极，接合到半导体衬底的顶表面以覆盖衬垫的支撑板电极和形成在半导体衬底中并从半导体衬底的背表面延伸到焊盘电极的通孔，其中靠近焊盘电极的部分处的通孔的孔径大于通孔的孔径靠近半导体衬底的背面的部分。

2. 发明授权

US07750478B2 Semiconductor device with via hole of uneven width 有权
标题翻译：具有不均匀宽度的通孔的半导体器件
公开(公告)号：US07750478B2
公开(公告)日：2010-07-06
申请号：US11808667
申请日：2007-06-12
申请人： Koujiro Kameyama , Akira Suzuki , Yoshio Okayama , Mitsuo Umemoto , Kenji Takahashi , Hiroshi Terao , Masataka Hoshino
发明人： Koujiro Kameyama , Akira Suzuki , Yoshio Okayama , Mitsuo Umemoto , Kenji Takahashi , Hiroshi Terao , Masataka Hoshino
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/12 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L24/11 , H01L2224/05001 , H01L2224/05009 , H01L2224/05022 , H01L2224/0508 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/13025 , H01L2224/13099 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2224/05599
摘要： A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.
摘要翻译：提供了可靠性提高的半导体器件及其制造方法。本发明的半导体器件包括半导体衬底，通过由氧化硅，氮化硅等形成的绝缘层在半导体衬底上形成的焊盘电极，接合到半导体衬底的顶表面以覆盖衬垫的支撑板电极和形成在半导体衬底中并从半导体衬底的背表面延伸到焊盘电极的通孔，其中靠近焊盘电极的部分处的通孔的孔径大于通孔的孔径靠近半导体衬底的背面的部分。

3. 发明授权

US07732925B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07732925B2
公开(公告)日：2010-06-08
申请号：US11055707
申请日：2005-02-11
申请人： Yoshio Okayama , Akira Suzuki , Koujiro Kameyama , Mitsuo Umemoto , Kenji Takahashi , Hiroshi Terao , Masataka Hoshino
发明人： Yoshio Okayama , Akira Suzuki , Koujiro Kameyama , Mitsuo Umemoto , Kenji Takahashi , Hiroshi Terao , Masataka Hoshino
IPC分类号： H01L29/40
CPC分类号： H01L24/12 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L24/11 , H01L2224/05001 , H01L2224/05009 , H01L2224/05022 , H01L2224/0508 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/13025 , H01L2224/13099 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2224/05599
摘要： A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.
摘要翻译：提供了可靠性提高的半导体器件及其制造方法。本发明的半导体器件包括半导体衬底，通过由氧化硅，氮化硅等形成的绝缘层在半导体衬底上形成的焊盘电极，接合到半导体衬底的顶表面以覆盖衬垫的支撑板电极和形成在半导体衬底中并从半导体衬底的背表面延伸到焊盘电极的通孔，其中靠近焊盘电极的部分处的通孔的孔径大于通孔的孔径靠近半导体衬底的背面的部分。

4. 发明申请

US20050189637A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050189637A1
公开(公告)日：2005-09-01
申请号：US11055707
申请日：2005-02-11
申请人： Yoshio Okayama , Akira Suzuki , Koujiro Kameyama , Mitsuo Umemoto , Kenji Takahashi , Hiroshi Terao , Masataka Hoshino
发明人： Yoshio Okayama , Akira Suzuki , Koujiro Kameyama , Mitsuo Umemoto , Kenji Takahashi , Hiroshi Terao , Masataka Hoshino
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/60 , H01L21/768 , H01L23/12 , H01L23/31 , H01L23/48 , H01L23/495
CPC分类号： H01L24/12 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L24/11 , H01L2224/05001 , H01L2224/05009 , H01L2224/05022 , H01L2224/0508 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/13025 , H01L2224/13099 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2224/05599
摘要： A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate through an insulation layer made of silicon oxide, silicon nitride or the like, a supporting plate bonded to a top surface of the semiconductor substrate to cover the pad electrode and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein an aperture of the via hole at a portion close to the pad electrode is larger than an aperture of the via hole at a portion close to the back surface of the semiconductor substrate.
摘要翻译：提供了可靠性提高的半导体器件及其制造方法。本发明的半导体器件包括半导体衬底，通过由氧化硅，氮化硅等形成的绝缘层在半导体衬底上形成的焊盘电极，接合到半导体衬底的顶表面以覆盖衬垫的支撑板电极和形成在半导体衬底中并从半导体衬底的背表面延伸到焊盘电极的通孔，其中靠近焊盘电极的部分处的通孔的孔径大于通孔的孔径靠近半导体衬底的背表面的部分。

5. 发明申请

US20060024966A1 Manufacturing method of semiconductor device 有权
公开(公告)号：US20060024966A1
公开(公告)日：2006-02-02
申请号：US11182024
申请日：2005-07-15
申请人： Mitsuo Umemoto , Masataka Hoshino , Hiroshi Terao
发明人： Mitsuo Umemoto , Masataka Hoshino , Hiroshi Terao
IPC分类号： H01L21/302
CPC分类号： H01L21/76898 , H01L23/481 , H01L2224/02372 , H01L2224/03 , H01L2224/0401 , H01L2224/05 , H01L2224/05548 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2924/014
摘要： A manufacturing method of a semiconductor device having a through-hole electrode is offered to improve reliability and yield of the semiconductor device. A via hole penetrating through a semiconductor substrate is formed at a location corresponding to a pad electrode. An insulation film is formed on a back surface of the semiconductor substrate and a surface of the via hole. A reinforcing insulation film having an overhung portion at a rim of the via hole is formed on the back surface of the semiconductor substrate. The insulation film on a bottom of the via hole is removed by etching using the reinforcing insulation film as a mask, while the insulation film on a side wall of the via hole remains. The through-hole electrode, a wiring layer and a conductive terminal are formed on the back surface of the semiconductor substrate and the via hole. Finally, the semiconductor substrate is divided into a plurality of semiconductor dice by dicing.

6. 发明授权

US07094701B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07094701B2
公开(公告)日：2006-08-22
申请号：US11182024
申请日：2005-07-15
申请人： Mitsuo Umemoto , Masataka Hoshino , Hiroshi Terao
发明人： Mitsuo Umemoto , Masataka Hoshino , Hiroshi Terao
IPC分类号： H10L22/302
CPC分类号： H01L21/76898 , H01L23/481 , H01L2224/02372 , H01L2224/03 , H01L2224/0401 , H01L2224/05 , H01L2224/05548 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2924/014
摘要： A manufacturing method of a semiconductor device having a through-hole electrode is offered to improve reliability and yield of the semiconductor device. A via hole penetrating through a semiconductor substrate is formed at a location corresponding to a pad electrode. An insulation film is formed on a back surface of the semiconductor substrate and a surface of the via hole. A reinforcing insulation film having an overhung portion at a rim of the via hole is formed on the back surface of the semiconductor substrate. The insulation film on a bottom of the via hole is removed by etching using the reinforcing insulation film as a mask, while the insulation film on a side wall of the via hole remains. The through-hole electrode, a wiring layer and a conductive terminal are formed on the back surface of the semiconductor substrate and the via hole. Finally, the semiconductor substrate is divided into a plurality of semiconductor dice by dicing.
摘要翻译：提供具有通孔电极的半导体器件的制造方法，以提高半导体器件的可靠性和产量。穿过半导体衬底的通孔形成在对应于焊盘电极的位置处。绝缘膜形成在半导体衬底的背面和通孔的表面上。在半导体基板的背面形成有在通孔的边缘处具有突出部的加强绝缘膜。通过使用加强绝缘膜作为掩模的蚀刻来除去通孔底部的绝缘膜，同时保留通孔侧壁上的绝缘膜。通孔电极，布线层和导电端子形成在半导体衬底的背面和通孔上。最后，半导体衬底通过切割被分成多个半导体晶片。

7. 发明授权

US08367466B2 Manufacturing stacked semiconductor device 有权
标题翻译：制造叠层半导体器件
公开(公告)号：US08367466B2
公开(公告)日：2013-02-05
申请号：US12210113
申请日：2008-09-12
申请人： Masataka Hoshino , Junichi Kasai
发明人： Masataka Hoshino , Junichi Kasai
IPC分类号： H01L21/00
CPC分类号： H01L21/561 , H01L21/76898 , H01L24/82 , H01L25/0657 , H01L25/50 , H01L2225/06541 , H01L2225/06551 , H01L2225/06593 , H01L2924/15311
摘要： A method in accordance with an embodiment of the invention can include forming fan-out wirings on an insulating layer formed on a wafer. Additionally, electrodes of a plurality of semiconductor chips stacked on the fan-out wirings can be electrically coupled with the fan-out wirings. The wafer can be removed.
摘要翻译：根据本发明的实施例的方法可以包括在形成在晶片上的绝缘层上形成扇出布线。此外，堆叠在扇出布线上的多个半导体芯片的电极可以与扇出布线电耦合。可以去除晶片。

8. 发明授权

US09418940B2 Structures and methods for stack type semiconductor packaging 有权
标题翻译：堆叠式半导体封装的结构和方法
公开(公告)号：US09418940B2
公开(公告)日：2016-08-16
申请号：US12110181
申请日：2008-04-25
申请人： Masataka Hoshino , Masahiko Harayama , Koji Taya , Naomi Masuda , Masanori Onodera , Ryota Fukuyama
发明人： Masataka Hoshino , Masahiko Harayama , Koji Taya , Naomi Masuda , Masanori Onodera , Ryota Fukuyama
IPC分类号： H01L23/02 , H01L23/538 , H01L25/10 , H01L25/00 , H01L23/31 , H01L23/00
CPC分类号： H01L23/5389 , H01L23/3128 , H01L24/48 , H01L24/73 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01079 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Methods and structures for stack type semiconductor packaging are disclosed. In one embodiment, a semiconductor device includes a semiconductor chip mounted onto a substrate, a first resin molding portion formed on the substrate for sealing the semiconductor chip, and a through metal mounted on the substrate so as to pierce the first resin molding portion around the semiconductor chip. The semiconductor device further comprises an upper metal electrically coupled with the through metal and mounted on the first resin molding portion to extend from the through metal toward the semiconductor chip along an upper surface of the first resin molding portion, where the through metal and the upper metal are formed into an integral structure.
摘要翻译：公开了堆叠型半导体封装的方法和结构。在一个实施例中，半导体器件包括安装在基板上的半导体芯片，形成在用于密封半导体芯片的基板上的第一树脂模塑部分和安装在基板上的贯穿金属，以便穿过第一树脂模制部分半导体芯片所述半导体器件还包括与所述贯通金属电耦合并且安装在所述第一树脂模制部分上的上金属，以沿着所述第一树脂模塑部分的上表面从所述贯穿金属向所述半导体芯片延伸，其中所述通孔金属和所述上部金属形成为一体结构。

9. 发明授权

US07605457B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07605457B2
公开(公告)日：2009-10-20
申请号：US11636155
申请日：2006-12-07
申请人： Masataka Hoshino , Junichi Kasai , Kouichi Meguro , Ryota Fukuyama , Yasuhiro Shinma , Koji Taya , Masanori Onodera , Naomi Masuda
发明人： Masataka Hoshino , Junichi Kasai , Kouichi Meguro , Ryota Fukuyama , Yasuhiro Shinma , Koji Taya , Masanori Onodera , Naomi Masuda
IPC分类号： H01L23/02 , H01L23/48
CPC分类号： H01L25/0657 , H01L23/3128 , H01L23/49575 , H01L25/50 , H01L2224/02371 , H01L2224/05548 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2225/06506 , H01L2225/06513 , H01L2225/06551 , H01L2225/06555 , H01L2924/01004 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.
摘要翻译：本发明提供一种半导体器件，其包括堆叠的半导体芯片，每个半导体芯片包括半导体衬底和设置在半导体衬底的侧面上且在其侧面上形成有凹部的第一绝缘层; 设置在凹部的内侧面的中心部的第一金属层; 以及第二金属层，其设置在凹部中并连接到形成在每个半导体芯片上的第一金属层。本发明还提供一种半导体器件的制造方法。

10. 发明授权

US06734084B1 Method of manufacturing a semiconductor device with recesses using anodic oxide 有权
标题翻译：使用阳极氧化物制造具有凹槽的半导体器件的方法
公开(公告)号：US06734084B1
公开(公告)日：2004-05-11
申请号：US10603982
申请日：2003-06-26
申请人： Yoshihiko Nemoto , Masataka Hoshino , Hitoshi Yonemura
发明人： Yoshihiko Nemoto , Masataka Hoshino , Hitoshi Yonemura
IPC分类号： H01L21326
CPC分类号： H01L21/76898 , Y10S438/928 , Y10S438/977
摘要： A method for manufacturing a semiconductor device is capable of controlling amounts of protrusion of penetration electrodes (5) from a rear surface of a semiconductor substrate (4) in a easy and accurate manner. Recesses (7) are formed in a substrate proper (6) that has a semiconductor circuit (2) formed on one surface thereof, and an insulation film (8) is formed on an inner wall surface of each of the recesses (7). A conductive material is filled into the recesses (7) through the insulation films (8) to form embedded electrodes (15) that constitute the penetration electrodes (5). A rear side of the substrate proper (6) is re moved until one end face of each of the embedded electrodes (15) is exposed, thereby to form the penetration electrodes (5). The rear surface of the substrate proper (6) is anodized to form an anodic oxide film (9), which is then removed by etching to form the semiconductor substrate (4).
摘要翻译：半导体器件的制造方法能够容易且准确地控制从半导体衬底（4）的后表面突出的穿透电极（5）的量。凹部（7）形成在其一面形成有半导体电路（2）的基板（6）上，在各凹部（7）的内壁面上形成有绝缘膜（8）。通过绝缘膜（8）将导电材料填充到凹部（7）中，以形成构成穿透电极（5）的嵌入式电极（15）。衬底本体（6）的后侧被移动直到每个嵌入电极（15）的一个端面露出，从而形成穿透电极（5）。衬底本体（6）的后表面被阳极化以形成阳极氧化膜（9），然后通过蚀刻去除以形成半导体衬底（4）。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式