会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Semiconductor device with tapered gate and insulating film
    • 具有锥形栅极和绝缘膜的半导体器件
    • US06646287B1
    • 2003-11-11
    • US09714891
    • 2000-11-17
    • Koji OnoHideomi SuzawaTatsuya Arao
    • Koji OnoHideomi SuzawaTatsuya Arao
    • H01L29786
    • H01L27/1222G02F1/13624H01L27/12H01L27/1214H01L27/124H01L27/127H01L29/42384H01L29/4908H01L29/66757H01L29/78621H01L29/78627H01L33/08H01L33/62H01L2029/7863H01L2924/0002H01L2924/00
    • In a semiconductor device, typically an active matrix display device, the structure of TFTs arranged in the respective circuits are made suitable in accordance with the function of the circuit, and along with improving the operating characteristics and the reliability of the semiconductor device, the manufacturing cost is reduced and the yield is increased by reducing the number of process steps. A semiconductor device has a semiconductor layer, an insulating film formed contacting the semiconductor layer, and a gate electrode having a tapered portion on the insulating film, in the semiconductor device, the semiconductor layer has a channel forming region, a first impurity region for forming a source region or a drain region and containing a single conductivity type impurity element, and a second impurity region for forming an LDD region contacting the channel forming region, a portion of the second impurity region is formed overlapping a gate electrode, and the concentration of the single conductivity type impurity element contained in the second impurity region becomes larger with distance from the channel forming region.
    • 在半导体器件(通常为有源矩阵显示器件)中,根据电路的功能,布置在各个电路中的TFT的结构是合适的,并且随着半导体器件的工作特性和可靠性的提高,制造 降低成本,并通过减少工艺步骤的数量来提高产量。 半导体器件具有半导体层,与半导体层接触形成的绝缘膜和在绝缘膜上具有锥形部分的栅电极,在半导体器件中,半导体层具有沟道形成区,形成第一杂质区 源极区域或漏极区域,并且包含单一导电型杂质元素,以及用于形成与沟道形成区域接触的LDD区域的第二杂质区域,第二杂质区域的一部分与栅电极重叠,并且浓度 包含在第二杂质区域中的单一导电型杂质元素随着与沟道形成区域的距离而变大。
    • 9. 发明授权
    • Semiconductor device and manufacturing method thereof
    • 半导体装置及其制造方法
    • US07560734B2
    • 2009-07-14
    • US11305212
    • 2005-12-19
    • Koji OnoHideomi SuzawaTatsuya Arao
    • Koji OnoHideomi SuzawaTatsuya Arao
    • H01L27/14
    • H01L27/1222G02F1/13624H01L27/12H01L27/1214H01L27/124H01L27/127H01L29/42384H01L29/4908H01L29/66757H01L29/78621H01L29/78627H01L33/08H01L33/62H01L2029/7863H01L2924/0002H01L2924/00
    • In a semiconductor device, typically an active matrix display device, the structure of TFTs arranged in the respective circuits are made suitable in accordance with the function of the circuit, and along with improving the operating characteristics and the reliability of the semiconductor device, the manufacturing cost is reduced and the yield is increased by reducing the number of process steps. A semiconductor device has a semiconductor layer, an insulating film formed contacting the semiconductor layer, and a gate electrode having a tapered portion on the insulating film, in the semiconductor device, the semiconductor layer has a channel forming region, a first impurity region for forming a source region or a drain region and containing a single conductivity type impurity element, and a second impurity region for forming an LDD region contacting the channel forming region, a portion of the second impurity region is formed overlapping a gate electrode, and the concentration of the single conductivity type impurity element contained in the second impurity region becomes larger with distance from the channel forming region.
    • 在半导体器件(通常为有源矩阵显示器件)中,根据电路的功能,布置在各个电路中的TFT的结构是合适的,并且随着半导体器件的工作特性和可靠性的提高,制造 降低成本,并通过减少工艺步骤的数量来提高产量。 半导体器件具有半导体层,与半导体层接触形成的绝缘膜和在绝缘膜上具有锥形部分的栅电极,在半导体器件中,半导体层具有沟道形成区,形成第一杂质区 源极区域或漏极区域,并且包含单一导电型杂质元素,以及用于形成与沟道形成区域接触的LDD区域的第二杂质区域,第二杂质区域的一部分与栅电极重叠,并且浓度 包含在第二杂质区域中的单一导电型杂质元素随着与沟道形成区域的距离而变大。