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1. 发明授权

US06589336B1 Production method for silicon epitaxial wafer and silicon epitaxial wafer 失效
标题翻译：硅外延晶片和硅外延晶片的生产方法
公开(公告)号：US06589336B1
公开(公告)日：2003-07-08
申请号：US09889020
申请日：2001-07-10
申请人： Koji Ebara , Hiroki Ose , Yasuo Kasahara
发明人： Koji Ebara , Hiroki Ose , Yasuo Kasahara
IPC分类号： C30B2522
CPC分类号： H01L21/26513 , H01L21/324 , H01L21/3247 , H01L21/743 , H01L29/0821 , H01L29/66272 , H01L29/66712 , H01L29/732 , H01L29/7809
摘要： Performing the post-implantation annealing for recovering crystallinity in a hydrogen atmosphere can successfully suppress the surface roughening on the ion-implanted layers without pre-implantation oxidation. This allows omission of the pre-implantation oxidation and allows ion implantation using only a photoresist film as a mask in a method for producing an epitaxial wafer having buried ion-implanted layers. Since an intentional formation of an oxide film, including such pre-implantation oxidation, on an epitaxial layer is omitted, the number of repetition of the thermal history exerted to the buried ion-implanted layers can be reduced, which effectively suppresses lateral diffusion of implanted ions. Since the formation and removal of the oxide film is thus no more necessary, the number of process steps in the production of the epitaxial wafer can dramatically be reduced.
摘要翻译：在氢气氛中进行回收结晶度的注入后退火可以成功地抑制离子注入层上的表面粗糙化而无需预植入氧化。这允许省略预植入氧化，并且允许在用于制造具有埋入的离子注入层的外延晶片的方法中仅使用光致抗蚀剂膜作为掩模的离子注入。由于省略了在外延层上有意形成包括这种预植入氧化的氧化膜，所以能够减少施加到掩埋离子注入层的热历程重复次数，这有效地抑制了植入物的横向扩散离子。由于不需要氧化膜的形成和去除，因此可以显着地减少外延晶片生产中的工艺步骤数量。

2. 发明授权

US07270708B2 Susceptor, vapor phase growth apparatus, epitaxial wafer manufacturing apparatus, epitaxial wafer manufacturing method, and epitaxial wafer 有权
标题翻译：副产物，气相生长装置，外延晶片制造装置，外延晶片制造方法和外延晶片
公开(公告)号：US07270708B2
公开(公告)日：2007-09-18
申请号：US10493144
申请日：2002-11-27
申请人： Tomosuke Yoshida , Takeshi Arai , Kenji Akiyama , Hiroki Ose
发明人： Tomosuke Yoshida , Takeshi Arai , Kenji Akiyama , Hiroki Ose
IPC分类号： C30B25/12
CPC分类号： C30B25/12 , C23C16/4405 , C23C16/4583
摘要： A susceptor (10) supporting a semiconductor substrate (W) in a vapor phase growth, wherein a pocket (11) is formed on an upper surface of the susceptor to arrange the semiconductor substrate (W) inside thereof. The pocket (11) has a two-stage structure having an upper stage pocket (11a) for supporting an outer peripheral edge portion of the semiconductor substrate (W) and a lower stage pocket (11b) formed on a lower stage of a center side from the upper stage pocket (11a). A hole (12) penetrated to a rear surface of the susceptor and opened in the vapor phase growth is formed in the lower stage pocket (11b).
摘要翻译：一种在气相生长中支撑半导体衬底（W）的感受体（10），其中，在所述基座的上表面上形成有凹穴（11），以将半导体衬底（W）布置在其内部。袋（11）具有两级结构，其具有用于支撑半导体衬底（W）的外周边缘部分的上级槽口（11a）和形成在半导体衬底（W）的下级上的下级槽口中心侧的上侧袋（11a）。贯穿底座后表面的孔（12）形成在下层袋（11b）中。

3. 发明授权

US06814811B2 Semiconductor wafer and vapor phase growth apparatus 有权
标题翻译：半导体晶片和气相生长装置
公开(公告)号：US06814811B2
公开(公告)日：2004-11-09
申请号：US10263662
申请日：2002-10-04
申请人： Hiroki Ose
发明人： Hiroki Ose
IPC分类号： C23C1600
CPC分类号： C23C16/45563 , C23C16/45561 , C23C16/45574 , C30B25/14 , C30B29/06 , H01L21/02381 , H01L21/02532 , H01L21/02579 , H01L21/0262 , Y10T428/12528 , Y10T428/21 , Y10T428/31
摘要： It is an object of the present invention to provide not only a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity and substantially no slip dislocation on a main surface of a semiconductor single crystal substrate having a relatively low dopant concentration, as large as 300 mm or more in diameter but also a vapor phase growth apparatus by means of which such a semiconductor wafer can be produced. A dopant gas is supplied into a reaction chamber 10 through all of the inlet ports 18a to 18f disposed in a width direction of the reaction chamber 10 from a common gas pipe 22a functioning as a main dopant gas pipe. Further, the dopant gas is additionally supplied through inner inlet ports 18a and 18b, and middle inlet ports 18c and 18d, as specific gas inlet ports, into the reaction chamber 10 from first and second auxiliary dopant gas pipes 22b and 22c.
摘要翻译：本发明的目的不仅在于提供一种半导体晶片，该半导体晶片通过在具有相对低的掺杂浓度的半导体单晶衬底的主表面上形成具有均匀电阻率并且基本上没有滑移位错的半导体薄膜，直径为300mm以上的气相生长装置，通过该气相生长装置，可以制造这样的半导体晶片。通过设置在宽度方向上的所有入口端口18a〜18f将掺杂剂气体供给到反应室10内来自用作主要掺杂剂气体管道的公共气体管道22a的反应室10。此外，掺杂剂气体通过内部入口端口18a和18b以及作为特定气体入口的中间入口端口18c和18d另外从第一和第二辅助掺杂剂气体管道22b和22c供入反应室10。

4. 发明申请

US20060281326A1 Washing apparatus, washing stystem, and washing method 审中-公开
标题翻译：洗衣机，洗涤系统和洗涤方法
公开(公告)号：US20060281326A1
公开(公告)日：2006-12-14
申请号：US10554265
申请日：2004-04-06
申请人： Hiroki Ose , Shuji Yokota
发明人： Hiroki Ose , Shuji Yokota
IPC分类号： H01L21/00 , H01L21/302
CPC分类号： H01L21/67051 , B08B3/022
摘要： The present invention provides a cleaning apparatus, a cleaning system and a cleaning method for a member used in the semiconductor field, excellent in cleaning capability and good in operation efficiency. The present invention is directed to a cleaning apparatus for cleaning the member used in the semiconductor field, which comprises: one nozzle or plural nozzles; and a jet mechanism for jetting a mist-like cleaning liquid (L1) with a high pressure from the one nozzle or the plural nozzles (52a) to the member (T) to be cleaned. The present invention is also directed to a cleaning system (30) for cleaning members used in the semiconductor field, which comprises: a loader section (40) for setting a member to be cleaned; an unloader section (70) for collecting the members; and a transport stage (80) for continuously transporting the member from the loader section to the unloader section, wherein a cleaning section (50) for cleaning the member with a mist-like cleaning liquid is provided on the transport stage, and the member is transported by the transport stage and is also cleaned in the cleaning section.
摘要翻译：本发明提供一种清洁装置，清洁系统以及用于半导体场合的部件的清洗方法，清洗能力优良，操作效率好。本发明涉及一种用于清洁半导体领域中使用的部件的清洁装置，其包括：一个喷嘴或多个喷嘴; 以及喷射机构，用于从一个喷嘴或多个喷嘴（52a）向要清洁的部件（T）喷射高压的雾状清洗液（L 1）。本发明还涉及一种用于清洁在半导体领域中使用的构件的清洁系统（30），其包括：装载部分（40），用于设置待清洁的构件; 用于收集所述构件的卸载器部分（70）; 以及用于将所述构件从所述装载部分连续输送到所述卸载部的输送台（80），其中，在所述运送台上设置有用于将所述构件用雾状清洗液清扫的清扫部（50），所述构件在运输阶段运输，并在清洁部分清洗。

5. 发明授权

US5882401A Method for manufacturing silicon single crystal substrate for use of epitaxial layer growth 失效
标题翻译：制造用于外延层生长的硅单晶衬底的方法
公开(公告)号：US5882401A
公开(公告)日：1999-03-16
申请号：US908963
申请日：1997-08-08
申请人： Tamotsu Maruyama , Hiroki Ose
发明人： Tamotsu Maruyama , Hiroki Ose
IPC分类号： H01L21/205 , C30B33/00 , H01L21/02 , H01L21/20 , H01L21/304 , H01L21/31 , H01L29/06 , C30B25/02
CPC分类号： H01L21/2205 , C30B29/06 , C30B33/00 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L29/0657
摘要： A method for manufacturing a silicon single crystal substrate for use of an epitaxial layer growth. The method comprises the steps of: growing a CVD film on a rear surface and a peripheral side portion, of the silicon single crystal substrate; removing a portion of the CVD film on the peripheral side portion in the vicinity of a main surface of the silicon single crystal substrate, which was grown over an end of the peripheral side portion, by an abrasive tape grinding; and thereafter mirror-polishing the main surface of the silicon single crystal substrate.
摘要翻译：一种用于制造用于外延层生长的硅单晶衬底的方法。该方法包括以下步骤：在硅单晶衬底的后表面和周边部分上生长CVD膜; 通过研磨带研磨去除在周边侧部分的一端生长的硅单晶衬底的主表面附近的周边侧部分的CVD膜的一部分; 然后对硅单晶衬底的主表面进行镜面抛光。

6. 发明授权

US07060944B2 Heat treatment device and heat treatment method 有权
标题翻译：热处理装置及热处理方法
公开(公告)号：US07060944B2
公开(公告)日：2006-06-13
申请号：US10500122
申请日：2003-01-22
申请人： Hiroki Ose
发明人： Hiroki Ose
IPC分类号： H05B3/68
CPC分类号： H01L21/68735 , H01L21/67103 , H01L21/67109 , H01L21/67115
摘要： A heat treatment apparatus (100) having: a susceptor (2) rotatably provided in a heat treatment vessel (1), on which a wafer (W) is placed; a preheat ring (3) surrounding a periphery of the susceptor (2) to be close to and in non-contact with the susceptor, which is supported by a base (4) provided in the heat treatment vessel (1); and a heating apparatus (8) for heating a wafer (W) placed on the susceptor (2), wherein the preheat ring (3) is formed such that an inner peripheral center (31a) is eccentric to an outer periphery (32). The preheat ring (3) is moved around the susceptor (2); the preheat ring (3) is positioned to minimize a distance between the inner peripheral center (31a) of the preheat ring (3) and the center (2b) of the susceptor (2); and thereafter a heat treatment is performed to a wafer (W).
摘要翻译：一种热处理设备（100），具有：可旋转地设置在其上放置有晶片（W）的热处理容器（1）中的基座（2）围绕所述基座的周边的预热环（3），所述预热环围绕由设置在所述热处理容器（1）中的基座（4）支撑的所述基座接近和不接触; 以及加热设置在所述基座（2）上的晶片（W）的加热装置（8），其中，所述预热环（3）形成为使得内周中心（31a）与外周（32）偏心，。预热环（3）围绕基座（2）移动; 定位预热环（3）使得预热环（3）的内周中心（31a）和基座（2）的中心（2b）之间的距离最小化; 然后对晶片（W）进行热处理。

7. 发明授权

US06454854B1 Semiconductor wafer and production method therefor 有权
标题翻译：半导体晶片及其制造方法
公开(公告)号：US06454854B1
公开(公告)日：2002-09-24
申请号：US09582408
申请日：2000-06-26
申请人： Hiroki Ose
发明人： Hiroki Ose
IPC分类号： C30B2303
CPC分类号： C23C16/45561 , C23C16/455 , C30B25/14 , C30B29/06 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/2205 , Y10T29/41
摘要： It is an object of the invention to provide a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity on a main surface of a semiconductor single crystal substrate of 300 mm or more in diameter. When a process gas is supplied to over a main surface of a silicon single crystal substrate 12 in rotation in almost parallel to the main surface thereof in one direction in a reaction chamber 10 through six inlet ports 18a to 18f disposed in width direction of the reaction chamber 10, H2 gas, a semiconductor raw material gas and a dopant gas are supplied onto an area in the vicinity of the center of the main surface of the silicon single crystal substrate 12 and an intermediate area thereof through the inner inlet ports 18a and 18b and the middle inlet ports 18c and 18d, and only H2 gas and the semiconductor raw material gas without the dopant gas are supplied onto an area in the vicinity of the outer periphery thereof from the outer inlet ports 18e and 18f. In such arrangement, a dopant gas produced by the auto-doping phenomenon is supplied onto the area in the vicinity of the outer periphery of the main surface of the silicon single crystal substrate 12. For this reason, the dopant gases from both sources are combined, thereby a concentration of the dopant gas supplied over all the main surface of the silicon single crystal substrate 12 is almost uniform.
摘要翻译：本发明的目的是提供通过在直径为300mm以上的半导体单晶基板的主表面上形成具有均匀电阻率的半导体薄膜而获得的半导体晶片。当处理气体在反应室10中通过在反应的宽度方向上布置的六个入口18a至18f在一个方向上以大致平行于其主表面的方式大致平行于硅单晶衬底12的主表面供应到超过主单面室10，H2气体，半导体原料气体和掺杂剂气体通过内部入口18a和18b被供应到硅单晶衬底12的主表面的中心附近的区域及其中间区域并且中间入口端口18c和18d仅将H2气体和没有掺杂剂气体的半导体原料气体从外部入口端口18e和18f供应到其外周边附近的区域。在这种布置中，通过自动掺杂现象产生的掺杂气体被提供到硅单晶衬底12的主表面的外周附近的区域上。因此，来自两个源的掺杂气体被组合从而在硅单晶衬底12的全部主表面上供给的掺杂剂气体的浓度几乎均匀。

8. 发明申请

US20050106524A1 Heat treatment device and heat treatment method 有权
标题翻译：热处理装置及热处理方法
公开(公告)号：US20050106524A1
公开(公告)日：2005-05-19
申请号：US10500122
申请日：2003-01-22
申请人： Hiroki Ose
发明人： Hiroki Ose
IPC分类号： C23C16/458 , H01L21/00 , H01L21/205 , H01L21/687 , F27B5/14
CPC分类号： H01L21/68735 , H01L21/67103 , H01L21/67109 , H01L21/67115
摘要： A heat treatment apparatus (100) having: a susceptor (2) rotatably provided in a heat treatment vessel (1), on which a wafer (W) is placed; a preheat ring (3) surrounding a periphery of the susceptor (2) to be close to and in non-contact with the susceptor, which is supported by a base (4) provided in the heat treatment vessel (1); and a heating apparatus (8) for heating a wafer (W) placed on the susceptor (2), wherein the preheat ring (3) is formed such that an inner peripheral center (31a) is eccentric to an outer periphery (32). The preheat ring (3) is moved around the susceptor (2); the preheat ring (3) is positioned to minimize a distance between the inner peripheral center (31a) of the preheat ring (3) and the center (2b) of the susceptor (2); and thereafter a heat treatment is performed to a wafer (W).
摘要翻译：一种热处理设备（100），具有：可旋转地设置在其上放置有晶片（W）的热处理容器（1）中的基座（2）围绕所述基座的周边的预热环（3），所述预热环围绕由设置在所述热处理容器（1）中的基座（4）支撑的所述基座接近和不接触; 以及加热设置在所述基座（2）上的晶片（W）的加热装置（8），其中，所述预热环（3）形成为使得内周中心（31a）与外周（32）偏心，。预热环（3）围绕基座（2）移动; 定位预热环（3）使得预热环（3）的内周中心（31a）和基座（2）的中心（2b）之间的距离最小化; 然后对晶片（W）进行热处理。

9. 发明授权

US06746941B2 Semiconductor wafer and production method therefor 有权
标题翻译：半导体晶片及其制造方法
公开(公告)号：US06746941B2
公开(公告)日：2004-06-08
申请号：US10226122
申请日：2002-08-23
申请人： Hiroki Ose
发明人： Hiroki Ose
IPC分类号： H01L2136
CPC分类号： C23C16/45561 , C23C16/455 , C30B25/14 , C30B29/06 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/2205 , Y10T29/41
摘要： It is an object of the invention to provide a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity on a main surface of a semiconductor single crystal substrate of 300 mm or more in diameter. When a process gas is supplied to over a main surface of a silicon single crystal substrate 12 in rotation in almost parallel to the main surface thereof in one direction in a reaction chamber 10 through six inlet ports 18a to 18f disposed in width direction of the reaction chamber 10, H2 gas, a semiconductor raw material gas and a dopant gas are supplied onto an area in the vicinity of the center of the main surface of the silicon single crystal substrate 12 and an intermediate area thereof through the inner inlet ports 18a and 18b and the middle inlet ports 18c and 18d, and only H2 gas and the semiconductor raw material gas without the dopant gas are supplied onto an area in the vicinity of the outer periphery thereof from the outer inlet ports 18e and 18f. In such arrangement, a dopant gas produced by the auto-doping phenomenon is supplied onto the area in the vicinity of the outer periphery of the main surface of the silicon single crystal substrate 12. For this reason, the dopant gases from both sources are combined, thereby a concentration of the dopant gas supplied over all the main surface of the silicon single crystal substrate 12 is almost uniform.
摘要翻译：本发明的目的是提供一种通过在直径为300mm以上的半导体单晶基板的主表面上形成具有均匀电阻率的半导体薄膜而获得的半导体晶片。当将工艺气体供给到主体通过沿反应室10的宽度方向设置的6个入口18a〜18f，在反应室10中沿一个方向大致平行于其主表面旋转的硅单晶基板12的表面，H2气体，半导体原料气体和掺杂剂气体通过内部入口18a和18b以及中间入口端口18c和18d供应到硅单晶衬底12的主表面中心附近的区域及其中间区域，以及只有H2气体和没有掺杂剂气体的半导体原料气体从外部入口端口18e和18f供应到其外周边附近的区域。在这种布置中，通过自动掺杂现象产生的掺杂气体被提供到硅单晶衬底12的主表面的外周附近的区域上。因此，来自两个源的掺杂气体被组合从而在硅单晶衬底12的全部主表面上供给的掺杂剂气体的浓度几乎均匀。

10. 发明授权

US06475627B1 Semiconductor wafer and vapor growth apparatus 有权
标题翻译：半导体晶片和气相生长装置
公开(公告)号：US06475627B1
公开(公告)日：2002-11-05
申请号：US09582415
申请日：2000-06-26
申请人： Hiroki Ose
发明人： Hiroki Ose
IPC分类号： C30B2906
CPC分类号： C23C16/45563 , C23C16/45561 , C23C16/45574 , C30B25/14 , C30B29/06 , H01L21/02381 , H01L21/02532 , H01L21/02579 , H01L21/0262 , Y10T428/12528 , Y10T428/21 , Y10T428/31
摘要： It is the object of the present invention to provide not only a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity and substantially no slip dislocation on a main surface of a semiconductor single crystal substrate having a relatively low dopant concentration, as large as 300 mm or more in diameter but also a vapor phase growth apparatus by means of which such a semiconductor wafer can be produced. A dopant gas is supplied into a reaction chamber 10 through all of the inlet ports 18a to 18f disposed in a width direction of the reaction chamber 10 from a common gas pipe 22a functioning as a main dopant gas pipe. Further, the dopant gas is additionally supplied through inner inlet ports 18a and 18b, and middle inlet ports 18c and 18d, as specific gas inlet ports, into the reaction chamber 10 from first and second auxiliary dopant gas pipes 22b and 22c.
摘要翻译：本发明的目的不仅在半导体单晶衬底的主表面上形成具有均匀电阻率并且基本上没有滑移位错的半导体薄膜获得的半导体晶片，该半导体薄膜的掺杂浓度相对较低，直径为300mm以上的气相生长装置，可以制造这样的半导体晶片。通过从作为主要掺杂剂气体管的公用气体管22a向反应室10的宽度方向设置的所有入口端口18a〜18f向反应室10供给掺杂气体。此外，掺杂剂气体通过内部入口端口18a和18b以及作为特定气体入口的中间入口端口18c和18d另外从第一和第二辅助掺杂剂气体管道22b和22c供入反应室10。

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