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1. 发明申请

US20100171420A1 PLASMA DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：等离子体显示面板及其制造方法
公开(公告)号：US20100171420A1
公开(公告)日：2010-07-08
申请号：US12663938
申请日：2009-03-25
申请人： Koji Akiyama , Koji Aoto , Masaki Nishimura , Masaki Nishinaka
发明人： Koji Akiyama , Koji Aoto , Masaki Nishimura , Masaki Nishinaka
IPC分类号： H01J17/49 , H01J9/26
CPC分类号： H01J11/40 , H01J9/02 , H01J11/12
摘要： A plasma display panel has a plurality of pairs of display electrodes, dielectric layer, and protective layer disposed on front glass substrate. Protective layer is formed of nano crystal particles, and the average particle diameter of the nano crystal particles is in the range of 10 nm to 100 nm. With this structure, in the plasma display panel, front glass substrate has a sufficient strength and occurrence of panel cracks is reduced.
摘要翻译：等离子体显示面板具有多对显示电极，电介质层和设置在前玻璃基板上的保护层。保护层由纳米结晶粒子形成，纳米结晶粒子的平均粒径在10nm〜100nm的范围内。利用这种结构，在等离子体显示面板中，前玻璃基板具有足够的强度并且减少了板裂纹的发生。

2. 发明申请

US20100187992A1 PLASMA DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：等离子体显示面板及其制造方法
公开(公告)号：US20100187992A1
公开(公告)日：2010-07-29
申请号：US12677603
申请日：2009-03-17
申请人： Koji Akiyama , Masaki Nishinaka , Koji Aoto
发明人： Koji Akiyama , Masaki Nishinaka , Koji Aoto
IPC分类号： H01J17/49 , H01J9/24
CPC分类号： H01J9/241 , C03C17/36 , C03C23/007 , H01J11/12 , H01J11/34
摘要： The invention is plasma display panel (1) with a plurality of pairs of display electrodes (6) and dielectric layers (8) disposed on front glass substrate (3), and it is intended to realize plasma display panel (1), wherein the stress at a surface where dielectric layer (8) of front glass substrate (3) is not disposed is a compressive stress ranging from 0.8 MPa to 2.4 MPa, the glass substrate is sufficient in strength, and the panel is almost free from breakage.
摘要翻译：本发明是等离子体显示面板（1），其具有多个显示电极对（6）和设置在前玻璃基板（3）上的电介质层（8），并且旨在实现等离子体显示面板（1），其中，不设置前玻璃基板（3）的电介质层（8）的表面的应力为0.8MPa〜2.4MPa的压缩应力，玻璃基板的强度足够，面板几乎没有破损。

3. 发明授权

US07175493B2 Plasma display panel and its manufacturing method 失效
标题翻译：等离子显示面板及其制造方法
公开(公告)号：US07175493B2
公开(公告)日：2007-02-13
申请号：US11092755
申请日：2005-03-30
申请人： Masaki Nishimura , Koji Akiyama , Kanako Miyashita , Koji Aoto , Keiji Horikawa , Masaaki Yamauchi
发明人： Masaki Nishimura , Koji Akiyama , Kanako Miyashita , Koji Aoto , Keiji Horikawa , Masaaki Yamauchi
IPC分类号： H01J9/00
CPC分类号： H01J9/38 , H01J9/261 , H01J9/395 , H01J11/12 , H01J11/42 , H01J11/52
摘要： A plasma display panel capable of realizing improvement in the characteristics thereof, such as lower discharge voltage, more stable discharge, higher luminance, higher efficiency, and longer life. During a step of sealing the periphery of substrates or before this sealing step, impurity gas other then inert gas is adsorbed by phosphor layers. The impurity gas is released into discharge gas and the impurity is added to the discharge gas in a controlled manner while the panel is lit. This method can realize improvement in characteristics, such as lower discharge voltage, higher luminance, higher efficiency, and longer life.
摘要翻译：能够实现其特性的提高的等离子体显示面板，例如放电电压较低，放电更稳定，亮度更高，效率更高，寿命更长。在密封基板的周边或在该密封步骤之前，除了惰性气体之外的杂质气体被磷光体层吸附。杂质气体释放到放电气体中，并且当面板点亮时，以受控的方式将杂质添加到放电气体中。该方法可以实现诸如放电电压更低，亮度更高，效率更高，寿命更长等特性的改进。

4. 发明授权

US07037156B2 Method of manufacturing a plasma display panel with adsorbing an impurity gas 失效
标题翻译：制造具有吸附杂质气体的等离子体显示面板的方法
公开(公告)号：US07037156B2
公开(公告)日：2006-05-02
申请号：US10469767
申请日：2002-12-20
申请人： Masaki Nishimura , Koji Akiyama , Kanako Miyashita , Koji Aoto , Keiji Horikawa , Masaaki Yamauchi
发明人： Masaki Nishimura , Koji Akiyama , Kanako Miyashita , Koji Aoto , Keiji Horikawa , Masaaki Yamauchi
IPC分类号： H01J9/00
CPC分类号： H01J9/38 , H01J9/261 , H01J9/395 , H01J11/12 , H01J11/42 , H01J11/52
摘要： A plasma display panel capable of realizing improvement in the characteristics thereof, such as lower discharge voltage, more stable discharge, higher luminance, higher efficiency, and longer life. Before a step of sealing the periphery of substrates, impurity gas containing CO2, H2O and CH4 is other then inert gas is adsorbed by phosphor layers. The impurity gas is released into discharge gas and while the panel is lit. This method can realize improvement in characteristics, such as lower discharge voltage, higher luminance, higher efficiency, and longer life.
摘要翻译：能够实现其特性的提高的等离子体显示面板，例如放电电压较低，放电更稳定，亮度更高，效率更高，寿命更长。在密封基板周边的步骤之前，含有CO 2，H 2 O和CH 4的杂质气体是另外的惰性气体被吸附通过磷光体层。杂质气体释放到放电气体中，同时面板点亮。该方法可以实现诸如放电电压更低，亮度更高，效率更高，寿命更长等特性的改进。

5. 发明申请

US20050168126A1 Plasma display panel and its manufacturing method 失效
标题翻译：等离子显示面板及其制造方法
公开(公告)号：US20050168126A1
公开(公告)日：2005-08-04
申请号：US11092755
申请日：2005-03-30
申请人： Masaki Nishimura , Koji Akiyama , Kanako Miyashita , Koji Aoto , Keiji Horikawa , Masaaki Yamauchi
发明人： Masaki Nishimura , Koji Akiyama , Kanako Miyashita , Koji Aoto , Keiji Horikawa , Masaaki Yamauchi
IPC分类号： H01J11/42 , H01J9/02 , H01J9/24 , H01J9/38 , H01J9/39 , H01J11/50 , H01J17/20 , H01J17/24 , H01J17/26 , H01J17/49 , H01J1/62
CPC分类号： H01J9/38 , H01J9/261 , H01J9/395 , H01J11/12 , H01J11/42 , H01J11/52
摘要： A plasma display panel capable of realizing improvement in the characteristics thereof, such as lower discharge voltage, more stable discharge, higher luminance, higher efficiency, and longer life. During a step of sealing the periphery of substrates or before this sealing step, impurity gas other then inert gas is adsorbed by phosphor layers. The impurity gas is released into discharge gas and the impurity is added to the discharge gas in a controlled manner while the panel is lit. This method can realize improvement in characteristics, such as lower discharge voltage, higher luminance, higher efficiency, and longer life.
摘要翻译：能够实现其特性的提高的等离子体显示面板，例如放电电压较低，放电更稳定，亮度更高，效率更高，寿命更长。在密封基板的周边或在该密封步骤之前，除了惰性气体之外的杂质气体被磷光体层吸附。杂质气体释放到放电气体中，并且当面板点亮时，以受控的方式将杂质添加到放电气体中。该方法可以实现诸如放电电压更低，亮度更高，效率更高，寿命更长等特性的改进。

6. 发明申请

US20100181908A1 FLAT DISPLAY 审中-公开
标题翻译：平面显示
公开(公告)号：US20100181908A1
公开(公告)日：2010-07-22
申请号：US12063051
申请日：2007-02-26
申请人： Koji Akiyama , Masaki Nishinaka , Akinobu Miyazaki
发明人： Koji Akiyama , Masaki Nishinaka , Akinobu Miyazaki
IPC分类号： H01J17/49 , H01J61/35
CPC分类号： H01J11/48 , H01J2211/34 , H01J2211/48
摘要： Disclosed here is a flat display having a pair of glass substrates and a sealing member applied on the periphery of the glass substrates. The glass substrates are oppositely disposed to each other at intervals therebetween. The glass substrates contain silicon as a component, while the sealing member contains bismuth. A protection layer and an insulating layer as an intermediate layer, which has a silicon-content lower than the glass substrates, are formed on the interface between the glass substrates and the sealing member. The structure above reinforces bonding strength of the sealing section, providing a highly reliable flat display.
摘要翻译：这里公开了一种平板显示器，其具有一对玻璃基板和施加在玻璃基板的周边上的密封构件。玻璃基板间隔开地相对设置。玻璃基板含有硅作为组分，而密封构件包含铋。在玻璃基板和密封部件之间的界面上形成作为中间层的保护层和绝缘层，其具有比玻璃基板低的硅含量。上述结构增强了密封部分的粘结强度，提供了高度可靠的平面显示。

7. 发明申请

US20060284795A1 Plasma display panel aging method 失效
标题翻译：等离子显示屏老化方法
公开(公告)号：US20060284795A1
公开(公告)日：2006-12-21
申请号：US10566156
申请日：2005-05-24
申请人： Koji Akiyama , Masaaki Yamauchi , Takashi Aoki , Koji Aoto
发明人： Koji Akiyama , Masaaki Yamauchi , Takashi Aoki , Koji Aoto
IPC分类号： G09G3/28
CPC分类号： H01J9/445
摘要： Disclosed here is a method of aging a plasma display panel. The aging method of the present invention contains a first aging period and a second aging period. In the first aging period, applying voltage Vd1 to at least any one of the scan electrodes, the sustain electrodes, and the address electrodes suppress self-erase discharge that occurs in the wake of aging voltage generated by application of voltage in which the scan electrodes take a voltage level higher than the sustain electrodes. In the second aging period, applying voltage Vd2 to at least any one of the scan electrodes, the sustain electrodes, and the address electrodes suppress self-erase discharge that occurs in the wake of aging voltage generated by application of voltage in which the sustain electrodes take a voltage level higher than the scan electrodes. The above aging method offers a power-efficient aging process with the aging time accelerated.
摘要翻译：这里公开了使等离子体显示面板老化的方法。本发明的老化方法包含第一老化期和第二老化期。在第一老化期间，对扫描电极，维持电极和寻址电极中的至少一个施加电压Vd1，抑制在通过施加电压而产生的老化电压的后期发生的自擦除放电电极取高于维持电极的电压电平。在第二老化期间，对扫描电极，维持电极和寻址电极中的至少任一个施加电压Vd 2，抑制在通过施加电压而产生的老化电压的后期发生的自擦除放电，电极的电压高于扫描电极。上述老化方法提供了老化时间加快的功率老化过程。

8. 发明授权

US07629947B2 Plasma display panel aging method 失效
标题翻译：等离子显示屏老化方法
公开(公告)号：US07629947B2
公开(公告)日：2009-12-08
申请号：US10566156
申请日：2005-05-24
申请人： Koji Akiyama , Masaaki Yamauchi , Takashi Aoki , Koji Aoto
发明人： Koji Akiyama , Masaaki Yamauchi , Takashi Aoki , Koji Aoto
IPC分类号： G09G3/28
CPC分类号： H01J9/445
摘要： Disclosed here is a method of aging a plasma display panel. The aging method of the present invention contains a first aging period and a second aging period. In the first aging period, applying voltage Vd1 to at least any one of the scan electrodes, the sustain electrodes, and the address electrodes suppress self-erase discharge that occurs in the wake of aging voltage generated by application of voltage in which the scan electrodes take a voltage level higher than the sustain electrodes. In the second aging period, applying voltage Vd2 to at least any one of the scan electrodes, the sustain electrodes, and the address electrodes suppress self-erase discharge that occurs in the wake of aging voltage generated by application of voltage in which the sustain electrodes take a voltage level higher than the scan electrodes.The above aging method offers a power-efficient aging process with the aging time accelerated.
摘要翻译：这里公开了使等离子体显示面板老化的方法。本发明的老化方法包含第一老化期和第二老化期。在第一老化期间，向扫描电极，维持电极和寻址电极中的至少一个施加电压Vd1，抑制在通过施加电压而产生的老化电压的后期发生的自擦除放电，其中扫描电极取高于维持电极的电压电平。在第二老化期间，向扫描电极，维持电极和寻址电极中的至少任一个施加电压Vd2，抑制在通过施加电压而产生的老化电压的后期发生的自擦除放电，其中维持电极取高于扫描电极的电压电平。上述老化方法提供了老化时间加快的功率老化过程。

9. 发明申请

US20060166585A1 Method of manufacturing plasma display panel 失效
标题翻译：等离子体显示面板的制造方法
公开(公告)号：US20060166585A1
公开(公告)日：2006-07-27
申请号：US10533138
申请日：2004-06-17
申请人： Koji Akiyama , Koji Aoto , Masaaki Yamauchi , Takashi Aoki , Akihiro Matsuda
发明人： Koji Akiyama , Koji Aoto , Masaaki Yamauchi , Takashi Aoki , Akihiro Matsuda
IPC分类号： H01J9/24 , H01J9/00
CPC分类号： H01J9/445 , G09G3/298 , G09G2320/0228
摘要： In a plasma display panel including scan electrodes, sustain electrodes, and address electrodes, first pulse voltage for the address electrodes or second pulse voltage for the address electrodes is applied to the address electrodes, in an aging step in which aging discharge is performed by alternately applying pulse voltage for the scan electrodes and pulse voltage for the sustain electrodes at least across the scan electrodes and the sustain electrodes. The first pulse voltage has rising edge timing synchronizing with rising edge timing of the pulse voltage for the scan electrodes and a pulse width smaller than that of the pulse voltage for the scan electrodes. The second pulse voltage has rising edge timing synchronizing with rising edge timing of the pulse voltage for the sustain electrodes and a pulse width smaller than that of the pulse voltage for the sustain electrodes.
摘要翻译：在包括扫描电极，维持电极和寻址电极的等离子体显示面板中，在寻址电极中施加用于寻址电极的第一脉冲电压或寻址电极的第二脉冲电压，在老化步骤中，通过交替地进行老化放电至少对扫描电极和维持电极两端施加用于扫描电极的脉冲电压和维持电极的脉冲电压。第一脉冲电压具有与扫描电极的脉冲电压的上升沿定时同步的上升沿定时，并且具有小于扫描电极的脉冲电压的脉冲宽度的脉冲宽度。第二脉冲电压具有与维持电极的脉冲电压的上升沿定时同步的上升沿定时，并且具有小于维持电极的脉冲电压的脉冲宽度的脉冲宽度。

10. 发明授权

US07288012B2 Method of manufacturing plasma display panel 失效
标题翻译：等离子体显示面板的制造方法
公开(公告)号：US07288012B2
公开(公告)日：2007-10-30
申请号：US10533138
申请日：2004-06-17
申请人： Koji Akiyama , Koji Aoto , Masaaki Yamauchi , Takashi Aoki , Akihiro Matsuda
发明人： Koji Akiyama , Koji Aoto , Masaaki Yamauchi , Takashi Aoki , Akihiro Matsuda
IPC分类号： H01J9/00 , H01J9/44
CPC分类号： H01J9/445 , G09G3/298 , G09G2320/0228
摘要： A plasma display panel is provided that includes scan electrodes, sustain electrodes, and address electrodes. A first pulse voltage for the address electrodes or a second pulse voltage for the address electrodes is applied to the address electrodes in an aging step in which aging discharge is performed by alternately applying pulse voltage for the scan electrodes and pulse voltage for the sustain electrodes at least across the scan electrodes and the sustain electrodes. The first pulse voltage has a rising edge timing synchronized with a rising edge timing of the pulse voltage for the scan electrodes and a pulse width smaller than that of the pulse voltage for the scan electrodes. The second pulse voltage has a rising edge timing synchronized with a rising edge timing of the pulse voltage for the sustain electrodes and a pulse width smaller than that of the pulse voltage for the sustain electrodes.
摘要翻译：提供了包括扫描电极，维持电极和寻址电极的等离子体显示面板。用于寻址电极的第一脉冲电压或寻址电极的第二脉冲电压在老化步骤中被施加到寻址电极，在老化步骤中，通过交替地对扫描电极施加脉冲电压和维持电极的脉冲电压来进行老化放电至少跨越扫描电极和维持电极。第一脉冲电压具有与扫描电极的脉冲电压的上升沿定时同步的上升沿定时，并且脉冲宽度小于扫描电极的脉冲电压的脉冲宽度。第二脉冲电压具有与维持电极的脉冲电压的上升沿定时同步的上升沿定时以及比维持电极的脉冲电压的脉冲宽度小的脉冲宽度。

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