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1. 发明申请

US20110101417A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110101417A1
公开(公告)日：2011-05-05
申请号：US13005589
申请日：2011-01-13
申请人： Tsuneo OGURA , Masakazu Yamaguchi , Tomoki Inoue , Hideaki Ninomiya , Koichi Sugiyama
发明人： Tsuneo OGURA , Masakazu Yamaguchi , Tomoki Inoue , Hideaki Ninomiya , Koichi Sugiyama
IPC分类号： H01L29/739
CPC分类号： H01L29/1095 , H01L29/0834 , H01L29/7397
摘要： A semiconductor device comprises a first base layer of a first conductivity type; a plurality of second base layers of a second conductivity type, provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers, and formed to be deeper than the second base layers; an emitter layer formed along the trench on a surface of the second base layers; a collector layer of the second conductivity type, provided on a second surface of the first base layer opposite to the first surface; an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated from the second base layers and the emitter layer by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being deeper than the second base layers and being electrically isolated from the emitter layer and the second base layers.
摘要翻译：半导体器件包括第一导电类型的第一基极层; 多个第二导电类型的第二基层，设置在所述第一基底层的第一表面的一部分上; 沟槽形成在第二基底层的每一侧上，并且形成为比第二基底层更深; 在所述第二基底层的表面上沿着所述沟槽形成的发射极层; 设置在与第一表面相对的第一基底层的第二表面上的第二导电类型的集电极层; 形成在所述沟槽的内壁上的绝缘膜，所述绝缘膜在所述沟槽的底部比在所述沟槽的侧表面上更厚; 形成在所述沟槽内并与所述第二基极层和所述发射极层通过所述绝缘膜隔离的栅电极; 以及设置在彼此相邻的第二基底层之间的空间部分，空间部分比第二基底层更深，并且与发射极层和第二基底层电隔离。

2. 发明申请

US20060202308A1 Semiconductor device 有权
公开(公告)号：US20060202308A1
公开(公告)日：2006-09-14
申请号：US11434185
申请日：2006-05-16
申请人： Koichi Sugiyama , Tomoki Inoue , Hideaki Ninomiya , Masakazu Yamaguchi
发明人： Koichi Sugiyama , Tomoki Inoue , Hideaki Ninomiya , Masakazu Yamaguchi
IPC分类号： H01L27/082
CPC分类号： H01L29/7397 , H01L29/4232 , H01L29/42372 , H01L29/7395
摘要： A semiconductor device comprises a first base layer of a first conductive type which has a first surface and a second surface; a second base layer of a second conductive type which is formed on the first surface; first and second gate electrodes which are formed by embedding an electrically conductive material into a plurality of trenches via gate insulating films, the plurality of trenches being formed such that bottoms of the trenches reach the first base layer; source layers of the first conductive type which are formed on a surface area of the second base layer so as to be adjacent to both side walls of the trench provided with the first gate electrode and one side wall of the trench provided with the second gate electrode, respectively; an emitter layer of the second conductive type which is formed on the second surface; emitter electrodes which are formed on the second base layer and the source layers; a collector electrode which is formed on the emitter layer; and first and second terminals which are electrically connected to the first and second gate electrodes, respectively.

3. 发明授权

US07492031B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07492031B2
公开(公告)日：2009-02-17
申请号：US11434185
申请日：2006-05-16
申请人： Koichi Sugiyama , Tomoki Inoue , Hideaki Ninomiya , Masakazu Yamaguchi
发明人： Koichi Sugiyama , Tomoki Inoue , Hideaki Ninomiya , Masakazu Yamaguchi
IPC分类号： H01L29/00
CPC分类号： H01L29/7397 , H01L29/4232 , H01L29/42372 , H01L29/7395
摘要： A semiconductor device comprises a first base layer of a first conductive type which has a first surface and a second surface; a second base layer of a second conductive type which is formed on the first surface; first and second gate electrodes which are formed by embedding an electrically conductive material into a plurality of trenches via gate insulating films, the plurality of trenches being formed such that bottoms of the trenches reach the first base layer; source layers of the first conductive type which are formed on a surface area of the second base layer so as to be adjacent to both side walls of the trench provided with the first gate electrode and one side wall of the trench provided with the second gate electrode, respectively; an emitter layer of the second conductive type which is formed on the second surface; emitter electrodes which are formed on the second base layer and the source layers; a collector electrode which is formed on the emitter layer; and first and second terminals which are electrically connected to the first and second gate electrodes, respectively.
摘要翻译：半导体器件包括具有第一表面和第二表面的第一导电类型的第一基底层; 形成在第一表面上的第二导电类型的第二基层; 通过经由栅极绝缘膜将导电材料嵌入多个沟槽而形成的第一和第二栅电极，所述多个沟槽形成为使得沟槽的底部到达第一基底层; 源极层，其形成在第二基极层的表面区域上，以与设置有第一栅电极的沟槽的两个侧壁相邻，并且设置有第二栅电极的沟槽的一个侧壁，分别; 形成在第二表面上的第二导电类型的发射极层; 在第二基极层和源极层上形成的发射极; 在发射极层上形成的集电极; 以及分别电连接到第一和第二栅电极的第一和第二端子。

4. 发明申请

US20090039386A1 Semiconductor Device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20090039386A1
公开(公告)日：2009-02-12
申请号：US12249573
申请日：2008-10-10
申请人： Tsuneo OGURA , Masakazu Yamaguchi , Tomoki Inoue , Hideaki Ninomiya , Koichi Sugiyama
发明人： Tsuneo OGURA , Masakazu Yamaguchi , Tomoki Inoue , Hideaki Ninomiya , Koichi Sugiyama
IPC分类号： H01L29/739
CPC分类号： H01L29/1095 , H01L29/0834 , H01L29/7397
摘要： A semiconductor device comprises a first base layer of a first conductivity type; a plurality of second base layers of a second conductivity type, provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers, and formed to be deeper than the second base layers; an emitter layer formed along the trench on a surface of the second base layers; a collector layer of the second conductivity type, provided on a second surface of the first base layer opposite to the first surface; an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated from the second base layers and the emitter layer by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being deeper than the second base layers and being electrically isolated from the emitter layer and the second base layers.
摘要翻译：半导体器件包括第一导电类型的第一基极层; 多个第二导电类型的第二基层，设置在所述第一基底层的第一表面的一部分上; 沟槽形成在第二基底层的每一侧上，并且形成为比第二基底层更深; 在所述第二基底层的表面上沿着所述沟槽形成的发射极层; 设置在与第一表面相对的第一基底层的第二表面上的第二导电类型的集电极层; 形成在所述沟槽的内壁上的绝缘膜，所述绝缘膜在所述沟槽的底部比在所述沟槽的侧表面上更厚; 形成在所述沟槽内并与所述第二基极层和所述发射极层通过所述绝缘膜隔离的栅电极; 以及设置在彼此相邻的第二基底层之间的空间部分，空间部分比第二基底层更深，并且与发射极层和第二基底层电隔离。

5. 发明授权

US08319314B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08319314B2
公开(公告)日：2012-11-27
申请号：US13005589
申请日：2011-01-13
申请人： Tsuneo Ogura , Masakazu Yamaguchi , Tomoki Inoue , Hideaki Ninomiya , Koichi Sugiyama
发明人： Tsuneo Ogura , Masakazu Yamaguchi , Tomoki Inoue , Hideaki Ninomiya , Koichi Sugiyama
IPC分类号： H01L29/739 , H01L27/082 , H01L29/00 , H01L21/02
CPC分类号： H01L29/1095 , H01L29/0834 , H01L29/7397
摘要： A semiconductor device comprises a first base layer of a first conductivity type; a plurality of second base layers of a second conductivity type, provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers, and formed to be deeper than the second base layers; an emitter layer formed along the trench on a surface of the second base layers; a collector layer of the second conductivity type, provided on a second surface of the first base layer opposite to the first surface; an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated from the second base layers and the emitter layer by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being deeper than the second base layers and being electrically isolated from the emitter layer and the second base layers.
摘要翻译：半导体器件包括第一导电类型的第一基极层; 多个第二导电类型的第二基层，设置在所述第一基底层的第一表面的一部分上; 沟槽形成在第二基底层的每一侧上，并且形成为比第二基底层更深; 在所述第二基底层的表面上沿着所述沟槽形成的发射极层; 设置在与第一表面相对的第一基底层的第二表面上的第二导电类型的集电极层; 形成在所述沟槽的内壁上的绝缘膜，所述绝缘膜在所述沟槽的底部比在所述沟槽的侧表面上更厚; 形成在所述沟槽内并与所述第二基极层和所述发射极层通过所述绝缘膜隔离的栅电极; 以及设置在彼此相邻的第二基底层之间的空间部分，空间部分比第二基底层更深，并且与发射极层和第二基底层电隔离。

6. 发明授权

US07456487B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07456487B2
公开(公告)日：2008-11-25
申请号：US10974810
申请日：2004-10-28
申请人： Tsuneo Ogura , Masakazu Yamaguchi , Tomoki Inoue , Hideaki Ninomiya , Koichi Sugiyama
发明人： Tsuneo Ogura , Masakazu Yamaguchi , Tomoki Inoue , Hideaki Ninomiya , Koichi Sugiyama
IPC分类号： H01L29/739
CPC分类号： H01L29/1095 , H01L29/0834 , H01L29/7397
摘要： This disclosure concerns a semiconductor device that includes a first base layer; second base layers provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers; an emitter layer formed on a surface of the second base layers; a collector layer provided below a second surface of the first base layer, an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being electrically isolated from the emitter layer and the second base layers, wherein the space section includes a semiconductor layer being deeper than the second base layers.
摘要翻译：本公开涉及包括第一基底层的半导体器件; 设置在所述第一基底层的第一表面的一部分上的第二基底层; 形成在第二基层的每侧的沟槽; 形成在所述第二基底层的表面上的发射极层; 设置在所述第一基底层的第二表面下方的集电极层，形成在所述沟槽的内壁上的绝缘膜，所述绝缘膜在所述沟槽的底部比在所述沟槽的侧表面上更厚; 形成在沟槽内并由绝缘膜隔离的栅电极; 以及设置在彼此相邻的第二基底层之间的空间部分，所述空间部分与发射极层和第二基底层电隔离，其中所述空间部分包括比所述第二基底层更深的半导体层。

7. 发明授权

US07075168B2 Semiconductor device 有权
公开(公告)号：US07075168B2
公开(公告)日：2006-07-11
申请号：US11016810
申请日：2004-12-21
申请人： Koichi Sugiyama , Tomoki Inoue , Hideaki Ninomiya , Masakazu Yamaguchi
发明人： Koichi Sugiyama , Tomoki Inoue , Hideaki Ninomiya , Masakazu Yamaguchi
IPC分类号： H01L27/102
CPC分类号： H01L29/7397 , H01L29/4232 , H01L29/42372 , H01L29/7395
摘要： A semiconductor device comprises a first base layer of a first conductive type which has a first surface and a second surface; a second base layer of a second conductive type which is formed on the first surface; first and second gate electrodes which are formed by embedding an electrically conductive material into a plurality of trenches via gate insulating films, the plurality of trenches being formed such that bottoms of the trenches reach the first base layer; source layers of the first conductive type which are formed on a surface area of the second base layer so as to be adjacent to both side walls of the trench provided with the first gate electrode and one side wall of the trench provided with the second gate electrode, respectively; an emitter layer of the second conductive type which is formed on the second surface; emitter electrodes which are formed on the second base layer and the source layers; a collector electrode which is formed on the emitter layer; and first and second terminals which are electrically connected to the first and second gate electrodes, respectively.

8. 发明申请

US20050263852A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050263852A1
公开(公告)日：2005-12-01
申请号：US10974810
申请日：2004-10-28
申请人： Tsuneo Ogura , Masakazu Yamaguchi , Tomoki Inoue , Hideaki Ninomiya , Koichi Sugiyama
发明人： Tsuneo Ogura , Masakazu Yamaguchi , Tomoki Inoue , Hideaki Ninomiya , Koichi Sugiyama
IPC分类号： H01L29/78 , H01L27/082 , H01L29/08 , H01L29/10 , H01L29/423 , H01L29/739
CPC分类号： H01L29/1095 , H01L29/0834 , H01L29/7397
摘要： A semiconductor device comprises a first base layer of a first conductivity type; a plurality of second base layers of a second conductivity type, provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers, and formed to be deeper than the second base layers; an emitter layer formed along the trench on a surface of the second base layers; a collector layer of the second conductivity type, provided on a second surface of the first base layer opposite to the first surface; an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated from the second base layers and the emitter layer by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being deeper than the second base layers and being electrically isolated from the emitter layer and the second base layers.
摘要翻译：半导体器件包括第一导电类型的第一基极层; 多个第二导电类型的第二基层，设置在所述第一基底层的第一表面的一部分上; 沟槽形成在第二基底层的每一侧上，并且形成为比第二基底层更深; 在所述第二基底层的表面上沿着所述沟槽形成的发射极层; 设置在与第一表面相对的第一基底层的第二表面上的第二导电类型的集电极层; 形成在所述沟槽的内壁上的绝缘膜，所述绝缘膜在所述沟槽的底部比在所述沟槽的侧表面上更厚; 形成在所述沟槽内并与所述第二基极层和所述发射极层通过所述绝缘膜隔离的栅电极; 以及设置在彼此相邻的第二基底层之间的空间部分，空间部分比第二基底层更深，并且与发射极层和第二基底层电隔离。

9. 发明申请

US20050161768A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050161768A1
公开(公告)日：2005-07-28
申请号：US11016810
申请日：2004-12-21
申请人： Koichi Sugiyama , Tomoki Inoue , Hideaki Ninomiya , Masakazu Yamaguchi
发明人： Koichi Sugiyama , Tomoki Inoue , Hideaki Ninomiya , Masakazu Yamaguchi
IPC分类号： H01L29/78 , H01L27/04 , H01L27/088 , H01L29/423 , H01L29/739 , H01L31/113
CPC分类号： H01L29/7397 , H01L29/4232 , H01L29/42372 , H01L29/7395
摘要： A semiconductor device comprises a first base layer of a first conductive type which has a first surface and a second surface; a second base layer of a second conductive type which is formed on the first surface; first and second gate electrodes which are formed by embedding an electrically conductive material into a plurality of trenches via gate insulating films, the plurality of trenches being formed such that bottoms of the trenches reach the first base layer; source layers of the first conductive type which are formed on a surface area of the second base layer so as to be adjacent to both side walls of the trench provided with the first gate electrode and one side wall of the trench provided with the second gate electrode, respectively; an emitter layer of the second conductive type which is formed on the second surface; emitter electrodes which are formed on the second base layer and the source layers; a collector electrode which is formed on the emitter layer; and first and second terminals which are electrically connected to the first and second gate electrodes, respectively.
摘要翻译：半导体器件包括具有第一表面和第二表面的第一导电类型的第一基底层; 形成在第一表面上的第二导电类型的第二基层; 通过经由栅极绝缘膜将导电材料嵌入多个沟槽而形成的第一和第二栅电极，所述多个沟槽形成为使得沟槽的底部到达第一基底层; 源极层，其形成在第二基极层的表面区域上，以与设置有第一栅电极的沟槽的两个侧壁相邻，并且设置有第二栅电极的沟槽的一个侧壁，分别; 形成在第二表面上的第二导电类型的发射极层; 在第二基极层和源极层上形成的发射极; 在发射极层上形成的集电极; 以及分别电连接到第一和第二栅电极的第一和第二端子。

10. 发明授权

US07781869B2 Semiconductor device having rectifying action 有权
标题翻译：具有整流作用的半导体装置
公开(公告)号：US07781869B2
公开(公告)日：2010-08-24
申请号：US11498793
申请日：2006-08-04
申请人： Tomoki Inoue , Koichi Sugiyama , Hideaki Ninomiya , Tsuneo Ogura
发明人： Tomoki Inoue , Koichi Sugiyama , Hideaki Ninomiya , Tsuneo Ogura
IPC分类号： H01L31/075 , H01L27/095
CPC分类号： H01L29/868 , H01L29/0623 , H01L29/861 , H01L29/872 , H01L29/8725
摘要： A semiconductor device including a base layer of a first conductivity type having a first main surface and a second main surface opposite the first main surface, a first main electrode layer connected to the first main surface, control regions arranged inside grooves penetrating the first main electrode layer and reach inside the base layer, and a second main electrode layer of the first conductivity type and connected to the second main surface.
摘要翻译：一种半导体器件，包括具有第一主表面和与第一主表面相对的第二主表面的第一导电类型的基底层，连接到第一主表面的第一主电极层，布置在穿过第一主电极的沟槽内的控制区域并且到达基底层内部，并且具有第一导电类型并连接到第二主表面的第二主电极层。

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