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1. 发明授权

US09106213B2 Bit generation apparatus and bit generation method 有权
标题翻译：位产生装置和位生成方法
公开(公告)号：US09106213B2
公开(公告)日：2015-08-11
申请号：US13978598
申请日：2011-01-13
申请人： Koichi Shimizu , Daisuke Suzuki , Tomomi Kasuya
发明人： Koichi Shimizu , Daisuke Suzuki , Tomomi Kasuya
IPC分类号： H03K9/08 , H03K3/02 , H03K5/1252 , H04L9/32 , H03K19/003
CPC分类号： H03K3/02 , G09C1/00 , H03K5/1252 , H03K19/003 , H03K19/00361 , H04L9/3278
摘要： A bit generation apparatus includes a glitch generation circuit that generates glitch signals which include a plurality of pulses, and T-FF bit generation circuits which input the glitch signals, and based on either rising edges or falling edges of the plurality of pulses included in the glitch signals, generate a bit value of either 0 or 1. Each of the T-FF bit generation circuits generates a respective bit value based on either the parity of the number of rising edges or the parity of the number of falling edges of the plurality of pulses. As a result of employment of the T-FF bit generation circuits, circuits that are conventionally required but not essential for the glitch become unnecessary. This serves to prevent expansion in circuit scale and increase in processing time of bit generation for the bit generation circuit.
摘要翻译：位产生装置包括产生包括多个脉冲的毛刺信号的毛刺产生电路和输入毛刺信号的T-FF位产生电路，并且基于包括在多个脉冲中的多个脉冲的上升沿或下降沿毛刺信号，产生0或1的位值.T-FF位产生电路中的每一个基于上升沿的奇偶性或多个下降沿的奇偶校验产生相应的位值的脉冲。作为使用T-FF位产生电路的结果，不需要通常需要但不是毛刺所必需的电路。这用于防止电路规模的扩展，并增加位产生电路的位产生的处理时间。

2. 发明申请

US20130293274A1 BIT GENERATION APPARATUS AND BIT GENERATION METHOD 有权
标题翻译：位生成装置和位生成方法
公开(公告)号：US20130293274A1
公开(公告)日：2013-11-07
申请号：US13978598
申请日：2011-01-13
申请人： Koichi Shimizu , Daisuke Suzuki , Tomomi Kasuya
发明人： Koichi Shimizu , Daisuke Suzuki , Tomomi Kasuya
IPC分类号： H03K3/02 , H03K19/003
CPC分类号： H03K3/02 , G09C1/00 , H03K5/1252 , H03K19/003 , H03K19/00361 , H04L9/3278
摘要： A bit generation apparatus includes a glitch generation circuit that generates glitch signals which include a plurality of pulses, and T-FF bit generation circuits which input the glitch signals, and based on either rising edges or falling edges of the plurality of pulses included in the glitch signals, generate a bit value of either 0 or 1. Each of the T-FF bit generation circuits generates a respective bit value based on either the parity of the number of rising edges or the parity of the number of falling edges of the plurality of pulses. As a result of employment of the T-FF bit generation circuits, circuits that are conventionally required but not essential for the glitch become unnecessary. This serves to prevent expansion in circuit scale and increase in processing time of bit generation for the bit generation circuit.
摘要翻译：位产生装置包括产生包括多个脉冲的毛刺信号的毛刺产生电路和输入毛刺信号的T-FF位产生电路，并且基于包括在多个脉冲中的多个脉冲的上升沿或下降沿毛刺信号，产生0或1的位值.T-FF位产生电路中的每一个基于上升沿的奇偶性或多个下降沿的奇偶校验产生相应的位值的脉冲。作为使用T-FF位产生电路的结果，不需要通常需要但不是毛刺所必需的电路。这用于防止电路规模的扩展，并增加位产生电路的位产生的处理时间。

3. 发明授权

US10965145B2 Charge control device, charging system, and charge control method 有权
公开(公告)号：US10965145B2
公开(公告)日：2021-03-30
申请号：US16213026
申请日：2018-12-07
申请人： Daisuke Suzuki , Takafumi Goto , Kensuke Kuroda
发明人： Daisuke Suzuki , Takafumi Goto , Kensuke Kuroda
IPC分类号： H02J7/06 , H02J7/04 , H02J7/02
摘要： A charge control device for controlling charging of a secondary battery by using a current limit function of an external power supply includes: a charge control element arranged to be connected in series between the external power supply and the secondary battery; a constant current control unit configured to control an output current of the charge control element to be constant; a constant voltage control unit configured to control an output voltage of the charge control element to be constant; and an ON state setting unit configured to set the charge control element to an ON state, wherein the charge control element includes a control terminal to which a control signal for controlling the output current and the output voltage is input, and is composed of a single output element.

4. 发明授权

US09391772B2 Key information generation device and key information generation method 有权
标题翻译：关键信息生成装置及关键信息生成方法
公开(公告)号：US09391772B2
公开(公告)日：2016-07-12
申请号：US14115251
申请日：2011-06-02
申请人： Daisuke Suzuki
发明人： Daisuke Suzuki
IPC分类号： H04L9/10 , H04L9/08 , H04L9/32 , G06F12/14 , G11B20/00 , G06F21/50 , G06F21/70
CPC分类号： H04L9/0866 , G06F12/14 , G06F21/50 , G06F21/70 , G06F2221/21 , G11B20/00086 , H04L9/3278
摘要： In initial generation (for example, shipping from the factory), a security device generates an identifier w specific to the security device, with the PUF technology, generates key information k (k=HF(k)) from the identifier w, generates encrypted confidential information x by encrypting (x=Enc(mk, k)) confidential information mk with the key information k, and stores the encrypted confidential information x and an authentication code h (h=HF′(k)) of the key information k, in a nonvolatile memory. In operation, the security device generates the identifier w with the PUF technology, generates the key information k from the identifier w, and decrypts the encrypted confidential information x with the key information k. At a timing where the identifier w is generated in the operation, the security device checks whether the current operating environment has largely changed from the initial generation (S311). If a change in operating environment is detected (S311→S312), the security device conducts a reset-up process (S312 to S315) of an authentication code h which is confidential information, and the encrypted confidential information x.
摘要翻译：在初始阶段（例如，出厂时），安全设备生成特定于安全设备的标识符w，利用PUF技术，从标识符w生成密钥信息k（k = HF（k）），生成加密机密信息x通过用密钥信息k加密（x = Enc（mk，k））机密信息mk，并且将加密的机密信息x和密钥信息k的认证码h（h = HF'（k））存储，在非易失性存储器中。在操作中，安全设备利用PUF技术生成标识符w，从标识符w生成密钥信息k，并用密钥信息k对加密的机密信息进行解密。在操作中生成标识符w的定时，安全装置检查当前的操作环境是否从初始生成发生了很大的变化（S311）。如果检测到操作环境发生变化（S311→S312），则安全装置进行作为机密信息的认证码h的复位处理（S312〜S315）和加密的机密信息x。

5. 发明授权

US09197084B2 Charge controller with protective function and battery pack 有权
公开(公告)号：US09197084B2
公开(公告)日：2015-11-24
申请号：US13748174
申请日：2013-01-23
申请人： Gentaro Kurokawa , Daisuke Suzuki , Junji Takeshita
发明人： Gentaro Kurokawa , Daisuke Suzuki , Junji Takeshita
IPC分类号： H02J7/00
摘要： A charge controller includes a charge control circuit that, when detecting that a charging power supply is connected, controls the charging transistor to apply the charge current; a first and second control switch element connected in series between one terminal of a secondary battery and an external terminal; and a protection circuit that, when the secondary battery is over-discharged, turns off the first control switch element to stop discharge current and when deeply discharged, turns off the second control switch element. The protection circuit sends a charge inhibit signal to the charge control circuit when the secondary battery is deeply discharged, and while receiving the charge inhibit signal, the charge control circuit keeps the charging transistor off to prevent the charge current from flowing even if detecting that the charging power supply is connected.

6. 发明授权

US09091198B2 Insulator and exhaust system of internal-combustion engine 有权
标题翻译：内燃机绝缘子和排气系统
公开(公告)号：US09091198B2
公开(公告)日：2015-07-28
申请号：US13005662
申请日：2011-01-13
申请人： Daisuke Suzuki
发明人： Daisuke Suzuki
IPC分类号： B32B3/06 , B32B3/10 , B32B15/00 , B32B17/06 , F16L9/14 , F01N13/14 , F16L59/02
CPC分类号： F01N13/14 , F16L59/028 , Y10T428/24612 , Y10T428/249921
摘要： An insulator having an inner surface for covering an exhaust system of an internal-combustion engine includes a cover member having a surface, a joint member formed on the surface of the cover member, and a mat member made of material including at least one of ceramic fibers and glass fibers, the mat member being attached to the cover member through binding of the fibers to the joint member, and the mat member being exposed to form the inner surface.
摘要翻译：具有用于覆盖内燃机的排气系统的内表面的绝缘体包括具有表面的盖构件，形成在盖构件的表面上的接合构件以及由材料制成的垫构件，所述垫构件包括至少一个陶瓷纤维和玻璃纤维，垫构件通过将纤维粘合到接合构件而附接到覆盖构件，并且垫构件被暴露以形成内表面。

7. 发明授权

US09031232B2 Bit sequence generation apparatus and bit sequence generation method 有权
标题翻译：比特序列生成装置和比特序列生成方法
公开(公告)号：US09031232B2
公开(公告)日：2015-05-12
申请号：US13522439
申请日：2010-01-15
申请人： Daisuke Suzuki
发明人： Daisuke Suzuki
IPC分类号： G06F21/00 , H03K3/84 , H04L9/08 , G06F7/58
CPC分类号： H03K3/84 , G06F7/58 , G06F7/588 , H04L9/0866 , H04L9/0869
摘要： A bit sequence generation apparatus includes a glitch generating circuit that generates a glitch, a sampling circuit that samples the glitch waveform generated by the glitch generating circuit, and a glitch shape determination circuit that generates 1-bit data indicating either 1 or 0, based on the glitch waveform sampled by the sampling circuit, and generates a bit sequence composed of a plurality of generated 1-bit data. The bit sequence generation apparatus can provide a PUF circuit that is able to generate highly randomized secret information even in a device with a low degree of freedom of alignment and wiring and that does not violate the design rules.
摘要翻译：比特序列产生装置包括产生毛刺的毛刺产生电路，对由毛刺产生电路产生的毛刺波形进行采样的采样电路和产生指示1或0的1比特数据的毛刺形状确定电路，基于由采样电路采样的毛刺波形，并产生由多个生成的1比特数据组成的比特序列。比特序列生成装置可以提供即使在具有低对准和布线自由度的设备中也能够生成高度随机化的秘密信息的PUF电路，并且不违反设计规则。

8. 发明申请

US20150016722A1 IMAGE PROCESSING DEVICE AND METHOD 有权
标题翻译：图像处理装置和方法
公开(公告)号：US20150016722A1
公开(公告)日：2015-01-15
申请号：US14380629
申请日：2013-02-21
申请人： Tsubasa Onda , Yoshitaka Toyoda , Daisuke Suzuki , Koichi Yamashita , Narihiro Matoba
发明人： Tsubasa Onda , Yoshitaka Toyoda , Daisuke Suzuki , Koichi Yamashita , Narihiro Matoba
IPC分类号： G06T5/00 , H04N9/73 , H04N9/77
CPC分类号： G06T5/009 , G06T5/008 , G06T2207/10024 , G06T2207/20012 , H04N1/6027 , H04N5/235 , H04N5/2355 , H04N9/3179 , H04N9/73 , H04N9/77
摘要： A region determination circuit (60) determines whether or not each of the pixels in an image is within a region subject to correction, in which pixels having at most a predetermined brightness level appear with a frequency equal to or less than a predetermined value. An offset level generation circuit (10) generates an offset level (Offset) on the basis of the brightness of the pixels determined to be within the region subject to correction. An offset subtraction circuit (1) subtracts the offset level (Offset) from the image signal (Yi) to generate an offset image signal (Yofst). A gain generation circuit (20) generates a gain for the offset image signal (Yofst). A gain multiplication circuit (2) multiplies the offset image signal (Yofst) by the gain to generate a corrected image signal (Ya).
摘要翻译：区域确定电路（60）确定图像中的每个像素是否在经过校正的区域内，其中出现具有等于或小于预定值的频率的具有至多预定亮度级的像素。偏移电平生成电路（10）根据确定为在校正区域内的像素的亮度产生偏移电平（Offset）。偏移减法电路（1）从图像信号（Yi）中减去偏移电平（Offset），产生偏移图像信号（Yofst）。增益生成电路（20）产生偏移图像信号（Yofst）的增益。增益乘法电路（2）将偏移图像信号（Yofst）乘以增益以产生校正图像信号（Ya）。

9. 发明授权

US08647650B2 Composition for external use and method for producing the same 有权
标题翻译：外用组合物及其制造方法
公开(公告)号：US08647650B2
公开(公告)日：2014-02-11
申请号：US13514623
申请日：2010-12-03
申请人： Masayoshi Miyamoto , Tomomi Kuromiya , Daisuke Suzuki
发明人： Masayoshi Miyamoto , Tomomi Kuromiya , Daisuke Suzuki
IPC分类号： A61K8/02 , A61K9/14
CPC分类号： A61K8/044 , A61K8/0241 , A61K8/44 , A61K2800/412 , A61K2800/652 , A61Q19/02 , C07C227/42 , C07C2601/14 , Y10T428/2982 , C07C229/46
摘要： A method for producing a composition for external use containing a physiologically acceptable salt of a tranexamate as an active ingredient, which is dispersed in the composition in the state of fine particles, includes dissolving a physiologically acceptable salt of the tranexamate in a solvent to prepare a solution, to which a salting-out agent is added to precipitate the salt. Such salt is so dispersed in a composition for external use in the state of fine particles, that the tranexamate salt can be mixed without using a large amount of an oil component to obtain a composition for external use affording excellent feel of use and stability.
摘要翻译：包含以细颗粒状态分散在组合物中的含有作为活性成分的作为有效成分的氨基甲酸酯的生理学上可接受的盐的外用组合物的制造方法包括将溶剂中的生理上可接受的盐酸盐溶解在溶剂中，溶液，加入盐析剂以沉淀盐。这样的盐分散在细粒状态的外用组合物中，可以在不使用大量油性成分的情况下混合氨甲磺酸盐，得到外用的使用感和稳定性的组合物。

10. 发明申请

US20130302391A1 OIL-IN-WATER EMULSION COMPOSITION AND METHOD FOR PRODUCING THE SAME 有权
标题翻译：油包水乳液组合物及其生产方法
公开(公告)号：US20130302391A1
公开(公告)日：2013-11-14
申请号：US13981170
申请日：2012-01-24
申请人： Tomomi Kuromiya , Daisuke Suzuki , Masayoshi Miyamoto
发明人： Tomomi Kuromiya , Daisuke Suzuki , Masayoshi Miyamoto
IPC分类号： A61K8/44 , A61K8/06 , A61Q19/02
CPC分类号： A61K8/44 , A61K8/062 , A61K2800/21 , A61Q19/02
摘要： Disclosed is an oil-in-water type emulsion composition containing a physiologically acceptable salt of a tranexamate ester and a method for producing the same. An oil-in-water type emulsion composition containing a physiologically acceptable salt of a tranexamate ester can be obtained by preparing an oil phase including: A) a physiologically acceptable salt of a tranexamate ester; B) an amphiphilic substance; C) an oily substance; and D) water, a water-soluble organic solvent or a mixture thereof wherein the weight ratio of the ingredients A:B is in the range of 1:0.5 to 1:2.5, the weight ratio of the ingredients A:C is in the range of 1:1 to 1:5.0, and the weight ratio of the ingredients A:D is 1:0.2 to 1:5.0, and adding the oil phase to a water phase including E) water, a water-soluble organic solvent or a mixture thereof.
摘要翻译：本发明公开了一种含有氨基甲酸酯酯的生理学上可接受的盐的水包油型乳剂组合物及其制造方法。含有氨甲酯酯的生理学上可接受的盐的水包油型乳剂组合物可以通过制备油相得到，该油相包括：A）氨基甲酸酯的生理学上可接受的盐; B）两亲物质; C）油性物质; 和D）水，水溶性有机溶剂或其混合物，其中成分A:B的重量比在1:0.5至1:2.5的范围内，成分A：C的重量比在范围为1：1至1：5.0，成分A：D的重量比为1:0.2至1:5.0，并将油相加入到包含E）水，水溶性有机溶剂或它们的混合物。

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