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1. 发明授权

US5733458A Material interface changing method 失效
标题翻译：材料界面改变方法
公开(公告)号：US5733458A
公开(公告)日：1998-03-31
申请号：US621094
申请日：1996-03-22
申请人： Koichi Kitazawa , Hiroharu Sugawara , Noriyuki Hirota , Takuro Homma , Satoshi Maruyama , Shinichi Yamashita , Jun Nakagawa
发明人： Koichi Kitazawa , Hiroharu Sugawara , Noriyuki Hirota , Takuro Homma , Satoshi Maruyama , Shinichi Yamashita , Jun Nakagawa
IPC分类号： B01D17/00 , B01D11/04 , B01D17/06 , B01J19/08 , B03C1/00 , G02B3/14 , C02F1/48 , B01D35/06
CPC分类号： G02B3/14 , B01D11/0419 , B03C1/00
摘要： The interface between two nonmagnetic fluids, typically liquid layers, in contact with each other is changed by applying a magnetic field thereto. The interface is raised or depressed into an upward or downward convex shape.
摘要翻译：通过向其施加磁场来改变彼此接触的两个非磁性流体（通常为液体层）之间的界面。界面被升高或压下成向上或向下凸出的形状。

2. 发明授权

US08513808B2 Semiconductor device having trench-isolated element formation region 有权
标题翻译：具有沟槽隔离元件形成区域的半导体器件
公开(公告)号：US08513808B2
公开(公告)日：2013-08-20
申请号：US13095735
申请日：2011-04-27
申请人： Katsuhiko Hotta , Takeshi Furusawa , Toshikazu Matsui , Takuro Homma
发明人： Katsuhiko Hotta , Takeshi Furusawa , Toshikazu Matsui , Takuro Homma
IPC分类号： H01L23/522 , H01L21/768 , H01L23/525
CPC分类号： H01L24/03 , H01L23/522 , H01L23/53223 , H01L23/585 , H01L24/05 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05073 , H01L2224/05093 , H01L2224/05096 , H01L2224/05166 , H01L2224/05187 , H01L2224/05554 , H01L2224/05567 , H01L2224/05571 , H01L2224/05624 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01021 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/04941 , H01L2924/1306 , H01L2924/14 , H01L2924/04953 , H01L2924/00014 , H01L2924/00 , H01L2224/05552
摘要： Provided is a technique capable of improving the reliability of a semiconductor device having a slit made over a main surface of a semiconductor substrate, so as to surround each element formation region. In the technique, a second passivation film covers the side surface of an opening made to make the upper surface of a sixth-layer interconnection M6 used for bonding pads naked, and the inner walls (the side surfaces and the bottom surface) of a slit made to surround the circumference of a guard ring and made in a first passivation film, an insulating film for bonding, and an interlayer dielectric, so as to cause the bottom thereof not to penetrate through a barrier insulating film.
摘要翻译：提供了一种能够提高半导体器件的半导体器件的可靠性的技术，该半导体器件具有在半导体衬底的主表面上形成的狭缝，以便围绕每个元件形成区域。在该技术中，第二钝化膜覆盖开口的侧表面，使得用于接合焊盘的第六层互连M6的上表面裸露，狭缝的内壁（侧表面和底表面）围绕保护环的周围并制成第一钝化膜，用于接合的绝缘膜和层间电介质，以使其底部不穿透阻挡绝缘膜。

3. 发明授权

US08373270B2 Semiconductor integrated circuit device and method of manufacturing same 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US08373270B2
公开(公告)日：2013-02-12
申请号：US12761350
申请日：2010-04-15
申请人： Takuro Homma , Katsuhiko Hotta , Takashi Moriyama
发明人： Takuro Homma , Katsuhiko Hotta , Takashi Moriyama
IPC分类号： H01L23/48 , H01L23/485
CPC分类号： H01L23/50 , H01L22/32 , H01L23/3192 , H01L23/4827 , H01L24/03 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/02166 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05552 , H01L2224/05553 , H01L2224/05567 , H01L2224/05571 , H01L2224/05624 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48624 , H01L2224/73265 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01045 , H01L2924/01047 , H01L2924/01051 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/05042 , H01L2924/10253 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： In the current manufacturing process of LSI, or semiconductor integrated circuit device, the step of assembling device (such as resin sealing step) is normally followed by the voltage-application test (high-temperature and high-humidity test) in an environment of high temperature (such as an approximate range from 85 to 130° C.) and high humidity (such as about 80% RH). For that test, the inventors of the present invention found the phenomenon of occurrence of separation of titanium nitride film as the anti-reflection film from upper film and of generation of cracks in the titanium nitride film at an edge part of upper surface of the aluminum-based bonding pad applied with a positive voltage during the high-temperature and high-humidity test caused by an electrochemical reaction due to moisture incoming through the sealing resin and the like to generate oxidation and bulging of the titanium nitride film. An invention of the present application is to remove the titanium nitride film over the pad in a ring or slit shape at peripheral area of the aluminum-based bonding pad.
摘要翻译：在目前的LSI或半导体集成电路装置的制造工序中，组装装置（树脂密封工序）的步骤通常在高温环境下进行电压施加试验（高温高湿试验）温度（例如约85〜130℃的大致范围）和高湿度（例如约80％RH）。对于该试验，本发明的发明人发现，作为防反射膜从上部膜分离出氮化钛膜的发生现象，并且在铝的上表面的边缘部分产生氮化钛膜中的裂纹在由于通过密封树脂等的水分引起的电化学反应引起的高温高湿试验期间施加正电压的氧化钛基焊盘产生氮化钛膜的氧化和膨胀。本申请的发明是在铝基焊盘的周边区域以环或狭缝形状除去焊盘上的氮化钛膜。

4. 发明授权

US09048200B2 Semiconductor integrated circuit device and method of manufacturing same 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US09048200B2
公开(公告)日：2015-06-02
申请号：US13610850
申请日：2012-09-11
申请人： Takuro Homma , Katsuhiko Hotta , Takashi Moriyama
发明人： Takuro Homma , Katsuhiko Hotta , Takashi Moriyama
IPC分类号： H01L23/48 , H01L23/31 , H01L21/66 , H01L23/00
CPC分类号： H01L23/50 , H01L22/32 , H01L23/3192 , H01L23/4827 , H01L24/03 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/02166 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05552 , H01L2224/05553 , H01L2224/05567 , H01L2224/05571 , H01L2224/05624 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48624 , H01L2224/73265 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01045 , H01L2924/01047 , H01L2924/01051 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/05042 , H01L2924/10253 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： In manufacturing an LSI, or semiconductor integrated circuit device, the step of assembling device (such as resin sealing step) is normally followed by a voltage-application test in an environment of high temperature (e.g., from 85 to 130° C.) and high humidity (e.g., about 80% RH). It has been found that separation of a titanium nitride anti-reflection film from an upper film and generation of cracks in the titanium nitride film at an upper surface edge part of the aluminum-based bonding pad applied with a positive voltage in the test is caused by an electrochemical reaction due to moisture incoming through the sealing resin and the like to generate oxidation and bulging of the titanium nitride film. These problems are addressed by removing the titanium nitride film over the pad in a ring or slit shape at peripheral area of the aluminum-based bonding pad.
摘要翻译：在制造LSI或半导体集成电路器件时，组装器件（如树脂密封步骤）的步骤通常在高温（例如85〜130℃）的环境中进行电压施加试验，高湿度（例如约80％RH）。已经发现，在测试中施加正电压的铝基焊盘的上表面边缘部分处，从上膜分离氮化钛抗反射膜和在氮化钛膜中产生裂纹通过由于通过密封树脂等的水分引起的电化学反应，以产生氮化钛膜的氧化和膨胀。这些问题通过在铝基焊盘的周边区域以环或狭缝形状移除焊盘上的氮化钛膜来解决。

5. 发明授权

US08461642B2 Semiconductor device having a nonvolatile memory cell with field effect transistors 有权
标题翻译：具有具有场效应晶体管的非易失性存储单元的半导体器件
公开(公告)号：US08461642B2
公开(公告)日：2013-06-11
申请号：US12534140
申请日：2009-08-02
申请人： Takuro Homma , Yasushi Ishii , Kota Funayama
发明人： Takuro Homma , Yasushi Ishii , Kota Funayama
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L27/11573 , H01L27/11 , H01L27/1104
摘要： The present invention can realize a highly-integrated semiconductor device having a MONOS type nonvolatile memory cell equipped with a split gate structure without deteriorating the reliability of the device. A memory gate electrode of a memory nMIS has a height greater by from 20 to 100 nm than that of a select gate electrode of a select nMIS so that the width of a sidewall formed over one (side surface on the side of a source region) of the side surfaces of the memory gate electrode is adjusted to a width necessary for achieving desired disturb characteristics. In addition, a gate electrode of a peripheral second nMIS has a height not greater than the height of a select gate electrode of a select nMIS to reduce the width of a sidewall formed over the side surface of the gate electrode of the peripheral second nMIS so that a shared contact hole is prevented from being filled with the sidewall.
摘要翻译：本发明可以实现具有配备有分离栅极结构的MONOS型非易失性存储单元的高度集成的半导体器件，而不会降低器件的可靠性。存储器nMIS的存储栅电极具有比选择nMIS的选择栅电极高20至100nm的高度，使得形成在一个侧面（源区侧面上的侧表面）的侧壁的宽度将存储栅电极的侧表面调节到实现所需干扰特性所需的宽度。此外，外围第二nMIS的栅电极具有不大于选择nMIS的选择栅电极的高度的高度，以减小形成在周边第二nMIS的栅电极的侧表面上的侧壁的宽度，所以防止共享的接触孔被侧壁填充。

6. 发明授权

US08390134B2 Semiconductor device having surface protective films on bond pad 有权
标题翻译：半导体器件在接合焊盘上具有表面保护膜
公开(公告)号：US08390134B2
公开(公告)日：2013-03-05
申请号：US12782784
申请日：2010-05-19
申请人： Takuro Homma , Yoshifumi Takata
发明人： Takuro Homma , Yoshifumi Takata
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L23/29
CPC分类号： H01L21/02697 , H01L22/32 , H01L23/293 , H01L23/3128 , H01L23/3135 , H01L23/562 , H01L23/564 , H01L24/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/02166 , H01L2224/0392 , H01L2224/04042 , H01L2224/05073 , H01L2224/05093 , H01L2224/05166 , H01L2224/05187 , H01L2224/05553 , H01L2224/05567 , H01L2224/05571 , H01L2224/05624 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/4807 , H01L2224/48091 , H01L2224/48227 , H01L2224/48453 , H01L2224/48465 , H01L2224/48624 , H01L2224/48724 , H01L2224/73265 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01064 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10161 , H01L2924/1306 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2224/85 , H01L2924/00012 , H01L2924/00
摘要： To provide: a technique capable of suppressing a titanium nitride film that is exposed at the side surface of an opening from turning into a titanium oxide film even when water permeates the opening over a pad from outside a semiconductor device and thus improving the reliability of the semiconductor device; and a technique capable of suppressing a crack from occurring in a surface protective film of a pad and improving the reliability of a semiconductor device. An opening is formed so that the diameter of the opening is smaller than the diameter of another opening and the opening is included in the other opening. Due to this, it is possible to cover the side surface of an antireflection film that is exposed at the side surface of the other opening with a surface protective film in which the opening is formed. As a result of this, it is possible to form a pad without exposing the side surface of the antireflection film.
摘要翻译：提供：即使当水从半导体器件的外部渗透到焊盘上的开口时，即使在开口的侧面露出的氮化钛膜也能够转变成氧化钛膜，因此能够提高其可靠性半导体器件; 以及能够抑制在焊盘的表面保护膜中发生裂纹的技术，并提高半导体器件的可靠性。形成开口，使得开口的直径小于另一开口的直径，并且开口包括在另一个开口中。由此，可以用形成有开口的表面保护膜覆盖在另一开口的侧面露出的防反射膜的侧面。作为其结果，可以形成垫而不使抗反射膜的侧表面暴露。

7. 发明申请

US20110266679A1 SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US20110266679A1
公开(公告)日：2011-11-03
申请号：US13095735
申请日：2011-04-27
申请人： Katsuhiko Hotta , Takeshi Furusawa , Toshikazu Matsui , Takuro Homma
发明人： Katsuhiko Hotta , Takeshi Furusawa , Toshikazu Matsui , Takuro Homma
IPC分类号： H01L23/522 , H01L21/768
CPC分类号： H01L24/03 , H01L23/522 , H01L23/53223 , H01L23/585 , H01L24/05 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05073 , H01L2224/05093 , H01L2224/05096 , H01L2224/05166 , H01L2224/05187 , H01L2224/05554 , H01L2224/05567 , H01L2224/05571 , H01L2224/05624 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01021 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/04941 , H01L2924/1306 , H01L2924/14 , H01L2924/04953 , H01L2924/00014 , H01L2924/00 , H01L2224/05552
摘要： Provided is a technique capable of improving the reliability of a semiconductor device having a slit made over a main surface of a semiconductor substrate, so as to surround each element formation region. In the technique, a second passivation film covers the side surface of an opening made to make the upper surface of a sixth-layer interconnection M6 used for bonding pads naked, and the inner walls (the side surfaces and the bottom surface) of a slit made to surround the circumference of a guard ring and made in a first passivation film, an insulating film for bonding, and an interlayer dielectric, so as to cause the bottom thereof not to penetrate through a barrier insulating film.
摘要翻译：提供了一种能够提高半导体器件的半导体器件的可靠性的技术，该半导体器件具有在半导体衬底的主表面上形成的狭缝，以便围绕每个元件形成区域。在该技术中，第二钝化膜覆盖开口的侧表面，使得用于接合焊盘的第六层互连M6的上表面裸露，并且狭缝的内壁（侧表面和底表面）围绕保护环的周围并制成第一钝化膜，用于接合的绝缘膜和层间电介质，以使其底部不穿透阻挡绝缘膜。

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