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1. 发明申请

US20080159367A1 Signal Processing Device and Method 有权
标题翻译：信号处理装置及方法
公开(公告)号：US20080159367A1
公开(公告)日：2008-07-03
申请号：US11993259
申请日：2006-06-20
申请人： Kiyoshi Yanagisawa , Noriaki Matsuno
发明人： Kiyoshi Yanagisawa , Noriaki Matsuno
IPC分类号： H04B17/00 , H04Q1/20
CPC分类号： H04L27/368 , H04B1/0475 , H04L1/24 , H04L1/244
摘要： A test signal, the amplitudes of which are equal in the positive and negative directions, is generated and supplied to a signal processing circuit that performs a frequency conversion. Signals outputted from the signal processing circuit are detected to provide detected signals, which comprise a detected positive signal corresponding to a positive signal of the test signal and a detected negative signal corresponding to a negative signal of the test signal. The level of the detected positive signal is compared with the level of the detected negative signal to output a comparison result that indicates which level is higher. Additionally, an offset correction signal, which causes the level difference between the detected positive signal and the detected negative signal to be within a predetermined range of tolerance, is generated based on the comparison result. Then, an offset correction of the test signal and an externally supplied modulated signal is performed in accordance with the offset correction signal.
摘要翻译：其正弦和负方向的幅度相等的测试信号被产生并提供给进行频率转换的信号处理电路。检测从信号处理电路输出的信号，以提供检测信号，该检测信号包括对应于测试信号的正信号的检测到的正信号和对应于测试信号的负信号的检测到的负信号。将检测到的正信号的电平与检测到的负信号的电平进行比较，以输出指示哪个电平较高的比较结果。另外，基于该比较结果，产生使检测出的正信号和检测到的负信号之间的电平差处于预定的容差范围内的偏移校正信号。然后，根据偏移校正信号执行测试信号和外部提供的调制信号的偏移校正。

2. 发明申请

US20100198540A1 SIGNAL PROCESSING APPARATUS AND SIGNAL PROCESSING METHOD 有权
标题翻译：信号处理装置和信号处理方法
公开(公告)号：US20100198540A1
公开(公告)日：2010-08-05
申请号：US12668626
申请日：2008-07-09
申请人： Kiyoshi Yanagisawa , Noriaki Matsuno
发明人： Kiyoshi Yanagisawa , Noriaki Matsuno
IPC分类号： G06F19/00 , G01R29/00
CPC分类号： H04L27/364 , H04L25/06
摘要： An apparatus includes a test signal generation unit supplying test signals to an orthogonal modulator and a control unit that based on a result of decision by comparison and decision of detection results of a detector detecting envelopes of modulated signals output from the orthogonal modulator responsive to the test signals, derives adjustment values and a compensation value. An estimation means estimates a DC offset and an IQ mismatch of the orthogonal modulator, based on the derived compensation value. The test signals includes a first set including a first test signal (I1, Q1) and a second test signal (I2, Q2) having a predetermined relationship with the first test signal, and a second set of which in-phase and quadrature components have predetermined relationships respectively with in-phase and quadrature components of the first set.
摘要翻译：一种装置，包括：测试信号生成单元，向正交调制器提供测试信号;以及控制单元，其基于通过比较判定结果判断结果，并且响应于该测试，检测器检测从正交调制器输出的调制信号的包络检测结果信号，导出调整值和补偿值。估计装置基于导出的补偿值估计正交调制器的DC偏移和IQ失配。测试信号包括第一组，其包括与第一测试信号具有预定关系的第一测试信号（I1，Q1）和第二测试信号（I2，Q2），以及第二组，其中同相和正交分量具有分别与第一组的同相和正交分量的预定关系。

3. 发明申请

US20100195706A1 SIGNAL PROCESSING CIRCUIT AND SIGNAL PROCESSING METHOD 有权
标题翻译：信号处理电路和信号处理方法
公开(公告)号：US20100195706A1
公开(公告)日：2010-08-05
申请号：US12376415
申请日：2007-07-11
申请人： Kiyoshi Yanagisawa , Noriaki Matsuno
发明人： Kiyoshi Yanagisawa , Noriaki Matsuno
IPC分类号： H04B17/00
CPC分类号： H04L27/364 , H04L27/2627 , H04L27/2647
摘要： A signal processing circuit for compensating for an I/Q amplitude mismatch in which the amplitudes of I- and Q-components of output signals of a quadrature modulator are unequal to or for compensating for an I/Q phase mismatch in which the phase difference between the I- and the Q-components of output signals of the quadrature modulator deviates from 90 degrees. The signal processing circuit comprises an I/Q mismatch compensating part that corrects the amplitude or phase of an input signal based on the compensation amount for compensating for an I/Q amplitude mismatch or an I/Q phase mismatch and that inputs the corrected signal into a quadrature modulator; a test signal generating part that sequentially generates and inputs two sets of combined I- and Q-components of a test signal, which is an AC signal, to the I/O mismatch compensating part; a detector that determines an amplitude of the envelope of an output signal of the quadrature modulator; a filter that passes those ones of output signals of the detector which have frequencies equal to or lower than a cutoff frequency; and a control part that derives an amplitude or phase compensation amount of the I/Q mismatch compensating part such that the output values of the filter at the time of generating the two respective sets of test signals are equal to each other, the control part then inputting the derived amplitude or phase compensation amount into the I/Q mismatch compensating part.
摘要翻译：一种用于补偿I / Q幅度失配的信号处理电路，其中正交调制器的输出信号的I分量和Q分量的幅度不等于或用于补偿I / Q相位失配，其中，正交调制器的输出信号的I分量和Q分量偏离90度。信号处理电路包括：I / Q失配补偿部，其基于用于补偿I / Q幅度失配或I / Q相位失配的补偿量来校正输入信号的幅度或相位，并将校正后的信号输入正交调制器一个测试信号产生部分，其顺序地产生并输入作为AC信号的测试信号的组合I和Q分量的两组到I / O失配补偿部分; 确定正交调制器的输出信号的包络的幅度的检测器; 滤波器，其通过具有等于或低于截止频率的频率的检测器的输出信号的滤波器; 以及控制部分，其导出I / Q失配补偿部分的幅度或相位补偿量，使得在产生两组相应的测试信号时滤波器的输出值彼此相等，然后控制部分将导出的幅度或相位补偿量输入到I / Q失配补偿部分。

4. 发明申请

US20090174456A1 DC Offset Correcting Device And DC Offset Correcting Method 有权
标题翻译：直流偏移校正装置和直流偏移校正方法
公开(公告)号：US20090174456A1
公开(公告)日：2009-07-09
申请号：US12297905
申请日：2007-02-15
申请人： Kiyoshi Yanagisawa , Noriaki Matsuno
发明人： Kiyoshi Yanagisawa , Noriaki Matsuno
IPC分类号： H03L5/00
CPC分类号： H04B1/30 , H04B1/0475 , H04L25/06 , H04L25/063
摘要： A signal generator generates a test signal including a positive signal and a negative signal which have the same amplitude. The signal generator corrects a DC level of the test signal based on a DC offset correcting signal supplied thereto, and supplies the corrected test signal to a frequency converter. An amplitude detector detects the amplitudes of the positive and negative signals of the test signal processed by the frequency converter. A level compressor converts in level the amplitudes of the positive and negative signals which are detected by the amplitude detector, with a gain variable depending on an input level thereto. A comparator compares the amplitudes of the positive and negative signals which are converted in level by the level compressor, with each other. An offset adjuster supplies the DC offset correcting signal depending on a compared result from the comparator to the signal generator.
摘要翻译：信号发生器产生包括具有相同振幅的正信号和负信号的测试信号。信号发生器基于提供给其的DC偏移校正信号校正测试信号的直流电平，并将校正的测试信号提供给变频器。振幅检测器检测由变频器处理的测试信号的正和负信号的幅度。电平压缩器将由幅度检测器检测到的正和负信号的幅度进行电平转换，其增益随其输入电平而变化。比较器将由电平压缩器转换成电平的正信号和负信号的幅度彼此进行比较。偏移调整器根据从比较器到信号发生器的比较结果来提供DC偏移校正信号。

5. 发明授权

US08385458B2 Signal processing circuit and signal processing method 有权
标题翻译：信号处理电路及信号处理方法
公开(公告)号：US08385458B2
公开(公告)日：2013-02-26
申请号：US12376415
申请日：2007-07-11
申请人： Kiyoshi Yanagisawa , Noriaki Matsuno
发明人： Kiyoshi Yanagisawa , Noriaki Matsuno
IPC分类号： H04L27/00
CPC分类号： H04L27/364 , H04L27/2627 , H04L27/2647
摘要： A signal processing circuit for compensating for an I/Q amplitude mismatch in which the amplitudes of I- and Q-components of output signals of a quadrature modulator are unequal to or for compensating for an I/Q phase mismatch in which the phase difference between the I- and the Q-components of output signals of the quadrature modulator deviates from 90 degrees. The signal processing circuit comprises an I/Q mismatch compensating part that corrects the amplitude or phase of an input signal based on the compensation amount for compensating for an I/Q amplitude mismatch or an I/Q phase mismatch and that inputs the corrected signal into a quadrature modulator; a test signal generating part that sequentially generates and inputs two sets of combined I- and Q-components of a test signal, which is an AC signal, to the I/Q mismatch compensating part; a detector that determines an amplitude of the envelope of an output signal of the quadrature modulator; a filter that passes those ones of output signals of the detector which have frequencies equal to or lower than a cutoff frequency; and a control part that derives an amplitude or phase compensation amount of the I/Q mismatch compensating part such that the output values of the filter at the time of generating the two respective sets of test signals are equal to each other, the control part then inputting the derived amplitude or phase compensation amount into the I/Q mismatch compensating part.
摘要翻译：一种用于补偿I / Q幅度失配的信号处理电路，其中正交调制器的输出信号的I分量和Q分量的幅度不等于或用于补偿I / Q相位失配，其中，正交调制器的输出信号的I分量和Q分量偏离90度。信号处理电路包括：I / Q失配补偿部，其基于用于补偿I / Q幅度失配或I / Q相位失配的补偿量来校正输入信号的幅度或相位，并将校正后的信号输入正交调制器测试信号产生部分，其顺序地生成并输入作为AC信号的测试信号的组合I和Q分量的两组到I / Q失配补偿部分; 确定正交调制器的输出信号的包络的幅度的检测器; 滤波器，其通过具有等于或低于截止频率的频率的检测器的输出信号的滤波器; 以及控制部分，其导出I / Q失配补偿部分的幅度或相位补偿量，使得在产生两组相应的测试信号时滤波器的输出值彼此相等，然后控制部分将导出的幅度或相位补偿量输入到I / Q失配补偿部分。

6. 发明授权

US08285508B2 Signal processing apparatus and signal processing method 有权
标题翻译：信号处理装置及信号处理方法
公开(公告)号：US08285508B2
公开(公告)日：2012-10-09
申请号：US12668626
申请日：2008-07-09
申请人： Kiyoshi Yanagisawa , Noriaki Matsuno
发明人： Kiyoshi Yanagisawa , Noriaki Matsuno
IPC分类号： G01R35/00
CPC分类号： H04L27/364 , H04L25/06
摘要： An apparatus includes a test signal generation unit supplying test signals to an orthogonal modulator and a control unit that based on a result of decision by comparison and decision of detection results of a detector detecting envelopes of modulated signals output from the orthogonal modulator responsive to the test signals, derives adjustment values and a compensation value. An estimation means estimates a DC offset and an IQ mismatch of the orthogonal modulator, based on the derived compensation value. The test signals includes a first set including a first test signal (I1, Q1) and a second test signal (I2, Q2) having a predetermined relationship with the first test signal, and a second set of which in-phase and quadrature components have predetermined relationships respectively with in-phase and quadrature components of the first set.
摘要翻译：一种装置，包括：测试信号生成单元，向正交调制器提供测试信号;以及控制单元，其基于通过比较判定结果判断结果，并且响应于该测试，检测器检测从正交调制器输出的调制信号的包络检测结果信号，导出调整值和补偿值。估计装置基于导出的补偿值估计正交调制器的DC偏移和IQ失配。测试信号包括第一组，其包括与第一测试信号具有预定关系的第一测试信号（I1，Q1）和第二测试信号（I2，Q2），以及第二组，其中同相和正交分量具有分别与第一组的同相和正交分量的预定关系。

7. 发明授权

US07791395B2 DC offset correcting device and DC offset correcting method 有权
标题翻译： DC偏移校正装置和DC偏移校正方法
公开(公告)号：US07791395B2
公开(公告)日：2010-09-07
申请号：US12297905
申请日：2007-02-15
申请人： Kiyoshi Yanagisawa , Noriaki Matsuno
发明人： Kiyoshi Yanagisawa , Noriaki Matsuno
IPC分类号： H03L5/00
CPC分类号： H04B1/30 , H04B1/0475 , H04L25/06 , H04L25/063
摘要： A signal generator generates a test signal including a positive signal and a negative signal which have the same amplitude. The signal generator corrects a DC level of the test signal based on a DC offset correcting signal supplied thereto, and supplies the corrected test signal to a frequency converter. An amplitude detector detects the amplitudes of the positive and negative signals of the test signal processed by the frequency converter. A level compressor converts in level the amplitudes of the positive and negative signals which are detected by the amplitude detector, with a gain variable depending on an input level thereto. A comparator compares the amplitudes of the positive and negative signals which are converted in level by the level compressor, with each other. An offset adjuster supplies the DC offset correcting signal depending on a compared result from the comparator to the signal generator.
摘要翻译：信号发生器产生包括具有相同振幅的正信号和负信号的测试信号。信号发生器基于提供给其的DC偏移校正信号校正测试信号的直流电平，并将校正的测试信号提供给变频器。振幅检测器检测由变频器处理的测试信号的正和负信号的幅度。电平压缩器将由幅度检测器检测到的正和负信号的幅度进行电平转换，其增益随其输入电平而变化。比较器将由电平压缩器转换成电平的正信号和负信号的幅度彼此进行比较。偏移调整器根据从比较器到信号发生器的比较结果来提供DC偏移校正信号。

8. 发明授权

US08184740B2 Signal processing circuit 有权
标题翻译：信号处理电路
公开(公告)号：US08184740B2
公开(公告)日：2012-05-22
申请号：US12297912
申请日：2007-03-06
申请人： Noriaki Matsuno , Kiyoshi Yanagisawa
发明人： Noriaki Matsuno , Kiyoshi Yanagisawa
IPC分类号： H03C3/00
CPC分类号： H04L27/364
摘要： Test signal generator (3) generates test signals represented, by four points, which comprise two sets of two points positioned in point symmetry with respect to the origin of an I/Q orthogonal coordinate system. Envelope detector (8) detects the amplitude of an envelope of the output signal from an orthogonal modulator when the test signals represented by four points are generated, and outputs a signal proportional to the square of the amplitude. Comparing unit (9) calculates an average value of output signals from envelope detector ( ) when the test signals represented by the two points of each set are generated. Controller (10) adjusts the amplitudes and/or phases of the test signals so that the average values produced when the test signals represented by the two sets of the two points are generated are equal to each other, and calculates an I/Q mismatch quantity based on the adjusted results.
摘要翻译：测试信号发生器（3）产生由四个点表示的测试信号，它们包括相对于I / Q正交坐标系的原点定位成点对称的两组两个点。当由四点表示的测试信号产生时，包络检测器（8）检测来自正交调制器的输出信号的包络的幅度，并输出与幅度平方成正比的信号。比较单元（9）在生成由每组两点表示的测试信号时，计算来自包络检测器（）的输出信号的平均值。控制器（10）调整测试信号的幅度和/或相位，使得当由两组两点表示的测试信号产生时产生的平均值彼此相等，并且计算I / Q失配量根据调整后的结果。

9. 发明授权

US08059757B2 Signal processing device and method 有权
标题翻译：信号处理装置及方法
公开(公告)号：US08059757B2
公开(公告)日：2011-11-15
申请号：US11993259
申请日：2006-06-20
申请人： Kiyoshi Yanagisawa , Noriaki Matsuno
发明人： Kiyoshi Yanagisawa , Noriaki Matsuno
IPC分类号： H04L25/06
CPC分类号： H04L27/368 , H04B1/0475 , H04L1/24 , H04L1/244
摘要： A test signal is generated and supplied to a signal processing circuit for making frequency conversion. A signal outputted from the signal processing circuit is detected to generate a detected signal including a detected positive signal corresponding to the positive signal of the test signal and a detected negative signal corresponding to the negative signal. And the level of the detected positive signal and the level of the detected negative signal are compared to output the comparison result indicating which level is higher. Further, an offset correction signal for making a level difference between the detected positive signal and the detected negative signal within a preset permissible range is generated, based on the comparison result, and offset correction of the test signal or modulated signal supplied from the outside is made in accordance with the offset correction signal.
摘要翻译：生成测试信号并提供给用于进行频率转换的信号处理电路。检测从信号处理电路输出的信号，生成检测信号，该检测信号包括与检测信号的正信号对应的检测到的正信号和与负信号对应的检测到的负信号。并且将检测到的正信号的电平和检测到的负信号的电平进行比较，以输出指示哪个电平较高的比较结果。此外，基于比较结果，产生用于使检测到的正信号和检测到的负信号之间的电平差在预设允许范围内的偏移校正信号，并且从外部提供的测试信号或调制信号的偏移校正是根据偏移校正信号进行制作。

10. 发明申请

US20100239056A1 SIGNAL PROCESSING CIRCUIT 有权
标题翻译：信号处理电路
公开(公告)号：US20100239056A1
公开(公告)日：2010-09-23
申请号：US12297912
申请日：2007-03-06
申请人： Noriaki Matsuno , Kiyoshi Yanagisawa
发明人： Noriaki Matsuno , Kiyoshi Yanagisawa
IPC分类号： H04L25/08
CPC分类号： H04L27/364
摘要： A test signal generating part (3) generates test signals of four points where two pairs of points each consist of two points that are point symmetric about the origin point on an I/Q rectangular coordinate system. An envelope determining part (8) determines the amplitudes of output signals of a quadrature modulator at the generation of the four-point test signals, and outputs signals that are proportional to the respective squares of those amplitudes. A comparing part (9) calculates the average value of the output signals from the envelope determining part (8) for each pair of test signals when that pair of test signals are generated. A control part (10) adjusts the amplitudes and/or phases of the test signals in such a mariner that the average values are equal to each other at the generation of two pairs of test signals, and calculates, based on the adjustment result, an I/Q mismatch amount.
摘要翻译：测试信号产生部分（3）产生四个点的测试信号，其中两对点各自包括在I / Q直角坐标系上关于原点点对称的两个点。包络确定部分（8）在生成四点测试信号时确定正交调制器的输出信号的幅度，并且输出与那些幅度的各个平方成比例的信号。比较部分（9）当生成该对测试信号时，计算每对测试信号的包络确定部分（8）的输出信号的平均值。控制部分（10）在这样的水手中调整测试信号的幅度和/或相位，使平均值在生成两对测试信号时彼此相等，并且基于调整结果计算出 I / Q不匹配量。

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