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1. 发明申请

US20090014795A1 Substrate for field effect transistor, field effect transistor and method for production thereof 审中-公开
标题翻译：场效应晶体管用基板，场效应晶体管及其制造方法
公开(公告)号：US20090014795A1
公开(公告)日：2009-01-15
申请号：US11658564
申请日：2005-07-14
申请人： Risho Koh , Katsuhiko Tanaka , Shigeharu Yamagami , Koichi Terashima , Hitoshi Wakabayashi , Kiyoshi Takeuchi , Masayasu Tanaka , Masahiro Nomura , Koichi Takeda
发明人： Risho Koh , Katsuhiko Tanaka , Shigeharu Yamagami , Koichi Terashima , Hitoshi Wakabayashi , Kiyoshi Takeuchi , Masayasu Tanaka , Masahiro Nomura , Koichi Takeda
IPC分类号： H01L29/786 , H01L27/12 , H01L21/336
CPC分类号： H01L29/785 , H01L29/66795
摘要： A π gate FinFET structure having reduced variations in off-current and parasitic capacitance and a method for production thereof are provided. The structure of an element is improved so that an off-current suppressing capability can be exhibited more strongly. A field effect transistor, wherein a first insulating film and a semiconductor region are provided so as to protrude upward with respect to the flat surface of a base, the field effect transistor has a gate electrode, a gate insulating film and a source/drain region, and a channel is formed at least on the side surface of the semiconductor region, wherein that the first insulating film is provided on an etch stopper layer composed of a material having an etching rate lower than at least the lowermost layer of the first insulating film for etching under a predetermined condition.
摘要翻译：提供了一种具有减小的截止电流和寄生电容的变化的p型门FinFET结构及其制造方法。改善了元件的结构，使得能够更强烈地显示出截止电流的能力。一种场效应晶体管，其中第一绝缘膜和半导体区域设置成相对于基底的平坦表面向上突出，所述场效应晶体管具有栅极电极，栅极绝缘膜和源极/漏极区域并且至少在所述半导体区域的侧表面上形成沟道，其中所述第一绝缘膜设置在由蚀刻速率低于所述第一绝缘膜的最下层的蚀刻速率的材料构成的蚀刻停止层上用于在预定条件下蚀刻。

2. 发明授权

US07719043B2 Semiconductor device with fin-type field effect transistor and manufacturing method thereof. 失效
标题翻译：具有鳍式场效应晶体管的半导体器件及其制造方法。
公开(公告)号：US07719043B2
公开(公告)日：2010-05-18
申请号：US11632352
申请日：2005-07-04
申请人： Shigeharu Yamagami , Hitoshi Wakabayashi , Risho Koh , Kiyoshi Takeuchi , Masahiro Nomura , Koichi Takeda , Koichi Terashima , Masayasu Tanaka , Katsuhiko Tanaka
发明人： Shigeharu Yamagami , Hitoshi Wakabayashi , Risho Koh , Kiyoshi Takeuchi , Masahiro Nomura , Koichi Takeda , Koichi Terashima , Masayasu Tanaka , Katsuhiko Tanaka
IPC分类号： H01L27/108 , H01L29/94
CPC分类号： H01L21/84 , H01L21/823807 , H01L21/823821 , H01L21/823828 , H01L21/823878 , H01L27/1203 , H01L29/7851
摘要： The present invention relates to a semiconductor device including a Fin type field effect transistor (FET) having a protrusive semiconductor layer protruding from a substrate plane, a gate electrode formed so as to straddle the protrusive semiconductor layer, a gate insulating film between the gate electrode and the protrusive semiconductor layer, and source and drain regions provided in the protrusive semiconductor layer, wherein the semiconductor device has on a semiconductor substrate an element forming region having a Fin type FET, a trench provided on the semiconductor substrate for separating the element forming region from another element forming region, and an element isolation insulating film in the trench; the element forming region has a shallow substrate flat surface formed by digging to a depth shallower than the bottom surface of the trench and deeper than the upper surface of the semiconductor substrate, a semiconductor raised portion protruding from the substrate flat surface and formed of a part of the semiconductor substrate, and an insulating film on the shallow substrate flat surface; and the protrusive semiconductor layer of the Fin type FET is formed of a portion protruding from the insulating film of the semiconductor raised portion.
摘要翻译：本发明涉及一种半导体器件，其包括具有从衬底平面突出的突出半导体层的鳍型场效应晶体管（FET），形成为跨越突出半导体层的栅极电极，栅极电极所述突出半导体层以及设置在所述突出半导体层中的源极和漏极区域，其中所述半导体器件在半导体衬底上具有具有鳍型FET的元件形成区域，设置在所述半导体衬底上的沟槽，用于将所述元件形成区域来自另一个元件形成区域，以及沟槽中的元件隔离绝缘膜; 元件形成区域具有通过挖掘到比沟槽的底表面浅的深度而比半导体衬底的上表面更深的深浅的衬底平坦表面，从衬底平坦表面突出并形成的半导体凸起部分的半导体衬底，以及在浅衬底平面上的绝缘膜; 并且鳍式FET的突出半导体层由从半导体凸起部分的绝缘膜突出的部分形成。

3. 发明申请

US20090134454A1 Fin-type field effect transistor, semiconductor device and manufacturing process therefor 有权
标题翻译：鳍型场效应晶体管，半导体器件及其制造工艺
公开(公告)号：US20090134454A1
公开(公告)日：2009-05-28
申请号：US11921685
申请日：2006-06-05
申请人： Kiyoshi Takeuchi , Katsuhiko Tanaka
发明人： Kiyoshi Takeuchi , Katsuhiko Tanaka
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L21/84 , H01L27/1203 , H01L29/42384 , H01L29/66795 , H01L29/785
摘要： A constant distance can be maintained between source/drain regions without providing a gate side wall by forming a gate electrode comprising an eaves structure, and a uniform dopant concentration is kept within a semiconductor by ion implantation. As a result, a FinFET excellent in element properties and operation properties can be obtained. A field effect transistor, wherein a gate structure body is a protrusion that protrudes toward source and drain regions sides in a channel length direction and has a channel length direction width larger than that of the part adjacent to the insulating film in a gate electrode, and the protrusion comprises an eaves structure formed by the protrusion that extends in a gate electrode extending direction on the top surface of the semiconductor layer.
摘要翻译：通过形成包括檐结构的栅电极，通过离子注入将均匀的掺杂剂浓度保持在半导体内，可以在源极/漏极区之间保持恒定的距离而不提供栅极侧壁。结果，可以获得元件性能和操作性能优异的FinFET。一种场效应晶体管，其中栅极结构体是在沟道长度方向上朝向源极和漏极区域侧突出的突起，并且沟道长度方向宽度大于栅电极中与绝缘膜相邻的部分的沟道长度方向宽度;以及突起包括由在半导体层的顶表面上沿栅电极延伸方向延伸的突起形成的檐结构。

4. 发明申请

US20070158700A1 Field effect transistor and method for producing the same 审中-公开
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US20070158700A1
公开(公告)日：2007-07-12
申请号：US10587845
申请日：2005-01-28
申请人： Risho Koh , Katsuhiko Tanaka , Kiyoshi Takeuchi
发明人： Risho Koh , Katsuhiko Tanaka , Kiyoshi Takeuchi
IPC分类号： H01L29/76
CPC分类号： H01L29/785 , H01L29/66795 , H01L29/66803 , H01L29/7854 , H01L29/78609
摘要： A field effect transistor comprising: a semiconductor layer projecting from the plane of a base; a gate electrode provided on opposite side surfaces of the semiconductor layer; a gate insulating film interposed between the gate electrode and the side surface of the semiconductor layer; and source/drain regions where a first conductivity type impurity is introduced, wherein the semiconductor layer has a channel forming region in a portion sandwiched between the source/drain regions, and has in the upper part of the semiconductor layer in the channel forming region a channel impurity concentration adjusting region of which the concentration of a second conductivity type impurity is higher than that in the lower part of the semiconductor layer, and in the channel impurity concentration adjusting region, a channel is formed in a side surface portion facing the gate insulating film of the semiconductor layer in the channel impurity concentration adjusting region in a state of operation in which a signal voltage is applied to the gate electrode.
摘要翻译：一种场效应晶体管，包括：从基底的平面突出的半导体层; 设置在所述半导体层的相对侧表面上的栅电极; 介于栅电极和半导体层的侧表面之间的栅极绝缘膜; 以及引入第一导电型杂质的源极/漏极区域，其中半导体层在夹在源极/漏极区域之间的部分中具有沟道形成区域，并且在沟道形成区域a中的半导体层的上部沟道杂质浓度调整区域，其中第二导电类型杂质的浓度高于半导体层的下部，并且在沟道杂质浓度调节区域中，在面向栅极绝缘体的侧表面部分中形成沟道在对栅电极施加信号电压的工作状态下的沟道杂质浓度调整区域中的半导体层的膜。

5. 发明申请

US20080029821A1 Semiconductor Device and Method for Production Thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080029821A1
公开(公告)日：2008-02-07
申请号：US11632352
申请日：2005-07-04
申请人： Shigeharu Yamagami , Hitoshi Wakabayashi , Risho Koh , Kiyoshi Takeuchi , Masahiro Nomura , Koichi Takeda , Koichi Terashima , Masayasu Tanaka , Katsuhiko Tanaka
发明人： Shigeharu Yamagami , Hitoshi Wakabayashi , Risho Koh , Kiyoshi Takeuchi , Masahiro Nomura , Koichi Takeda , Koichi Terashima , Masayasu Tanaka , Katsuhiko Tanaka
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L21/84 , H01L21/823807 , H01L21/823821 , H01L21/823828 , H01L21/823878 , H01L27/1203 , H01L29/7851
摘要： The present invention relates to a semiconductor device including a Fin type field effect transistor (FET) having a protrusive semiconductor layer protruding from a substrate plane, a gate electrode formed so as to straddle the protrusive semiconductor layer, a gate insulating film between the gate electrode and the protrusive semiconductor layer, and source and drain regions provided in the protrusive semiconductor layer, wherein the semiconductor device has on a semiconductor substrate an element forming region having a Fin type FET, a trench provided on the semiconductor substrate for separating the element forming region from another element forming region, and an element isolation insulating film in the trench; the element forming region has a shallow substrate flat surface formed by digging to a depth shallower than the bottom surface of the trench and deeper than the upper surface of the semiconductor substrate, a semiconductor raised portion protruding from the substrate flat surface and formed of a part of the semiconductor substrate, and an insulating film on the shallow substrate flat surface; and the protrusive semiconductor layer of the Fin type FET is formed of a portion protruding from the insulating film of the semiconductor raised portion.
摘要翻译：本发明涉及一种半导体器件，其包括具有从衬底平面突出的突出半导体层的鳍型场效应晶体管（FET），形成为跨越突出半导体层的栅极电极，栅极电极所述突出半导体层以及设置在所述突出半导体层中的源极和漏极区域，其中所述半导体器件在半导体衬底上具有具有鳍型FET的元件形成区域，设置在所述半导体衬底上的沟槽，用于将所述元件形成区域来自另一个元件形成区域，以及沟槽中的元件隔离绝缘膜; 元件形成区域具有通过挖掘到比沟槽的底表面浅的深度而比半导体衬底的上表面更深的深浅的衬底平坦表面，从衬底平坦表面突出并形成的半导体凸起部分的半导体衬底，以及在浅衬底平面上的绝缘膜; 并且鳍式FET的突出半导体层由从半导体凸起部分的绝缘膜突出的部分形成。

6. 发明申请

US20070257277A1 Semiconductor Device and Method for Manufacturing the Same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070257277A1
公开(公告)日：2007-11-08
申请号：US11570025
申请日：2005-05-07
申请人： Koichi Takeda , Hitoshi Wakabayashi , Kiyoshi Takeuchi , Shigeharu Yamagami , Masahiro Nomura , Masayasu Tanaka , Koichi Terashima , Risho Koh , Katsuhiko Tanaka
发明人： Koichi Takeda , Hitoshi Wakabayashi , Kiyoshi Takeuchi , Shigeharu Yamagami , Masahiro Nomura , Masayasu Tanaka , Koichi Terashima , Risho Koh , Katsuhiko Tanaka
IPC分类号： H01L21/8244 , H01L21/82
CPC分类号： H01L27/11 , H01L21/84 , H01L21/86 , H01L27/1104 , H01L27/1108 , H01L27/1203 , H01L29/785
摘要： A semiconductor device having SRAM cell units each comprising a pair of driving transistors, a pair of load transistors and a pair of access transistors, in which each of the transistors has a semiconductor layer projecting upward from a substrate plane, a gate electrode extending on opposite sides of the semiconductor layer so as to stride over a top of the semiconductor layer, a gate insulting film interposed between the gate electrode and the semiconductor layer, and a pair of source/drain areas formed in the semiconductor layer; a longitudinal direction of each semiconductor layer extends along a first direction; and between the adjacent SRAM cell units in the first direction, the semiconductor layer in one of the corresponding transistors is located on a center line of the semiconductor layer in the other transistor which center line extends along the first direction.
摘要翻译：一种具有SRAM单元单元的半导体器件，每个单元包括一对驱动晶体管，一对负载晶体管和一对存取晶体管，其中每个晶体管具有从衬底平面向上突出的半导体层，相对延伸的栅电极半导体层的侧面，跨越半导体层的顶部，插入在栅极电极和半导体层之间的栅极绝缘膜，以及形成在半导体层中的一对源极/漏极区域; 每个半导体层的纵向方向沿第一方向延伸; 并且在第一方向上的相邻SRAM单元单元之间，一个对应的晶体管中的半导体层位于另一个晶体管的半导体层的中心线上，该中心线沿第一方向延伸。

7. 发明授权

US07859065B2 Fin-type field effect transistor and semiconductor device 有权
标题翻译：鳍型场效应晶体管和半导体器件
公开(公告)号：US07859065B2
公开(公告)日：2010-12-28
申请号：US11921685
申请日：2006-06-05
申请人： Kiyoshi Takeuchi , Katsuhiko Tanaka
发明人： Kiyoshi Takeuchi , Katsuhiko Tanaka
IPC分类号： H01L27/088
CPC分类号： H01L21/84 , H01L27/1203 , H01L29/42384 , H01L29/66795 , H01L29/785
摘要： A constant distance can be maintained between source/drain regions without providing a gate side wall by forming a gate electrode comprising an eaves structure, and a uniform dopant concentration is kept within a semiconductor by ion implantation. As a result, a FinFET excellent in element properties and operation properties can be obtained. A field effect transistor, wherein a gate structure body is a protrusion that protrudes toward source and drain regions sides in a channel length direction and has a channel length direction width larger than that of the part adjacent to the insulating film in a gate electrode, and the protrusion comprises an eaves structure formed by the protrusion that extends in a gate electrode extending direction on the top surface of the semiconductor layer.
摘要翻译：通过形成包括檐结构的栅电极，通过离子注入将均匀的掺杂剂浓度保持在半导体内，可以在源极/漏极区之间保持恒定的距离而不提供栅极侧壁。结果，可以获得元件性能和操作性能优异的FinFET。一种场效应晶体管，其中栅极结构体是在沟道长度方向上朝向源极和漏极区域侧突出的突起，并且沟道长度方向宽度大于栅电极中与绝缘膜相邻的部分的沟道长度方向宽度;以及突起包括由在半导体层的顶表面上沿栅电极延伸方向延伸的突起形成的檐结构。

8. 发明授权

US07830703B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07830703B2
公开(公告)日：2010-11-09
申请号：US11570037
申请日：2005-05-25
申请人： Koichi Takeda , Masahiro Nomura , Kiyoshi Takeuchi , Hitoshi Wakabayashi , Shigeharu Yamagami , Risho Koh , Koichi Terashima , Katsuhiko Tanaka , Masayasu Tanaka
发明人： Koichi Takeda , Masahiro Nomura , Kiyoshi Takeuchi , Hitoshi Wakabayashi , Shigeharu Yamagami , Risho Koh , Koichi Terashima , Katsuhiko Tanaka , Masayasu Tanaka
IPC分类号： G11C11/00
CPC分类号： H01L27/11 , H01L27/1104 , H01L27/1108 , H01L29/785 , Y10S257/903
摘要： A semiconductor device having SRAM cell units each comprising a pair of a first driving transistor and a second driving transistor, a pair of a first load transistor and a second load transistor, and a pair of a first access transistor and a second access transistor, wherein each of the transistors comprises a semiconductor layer projecting upward from a substrate plane, a gate electrode extending on opposite sides of the semiconductor layer so as to stride over a top of the semiconductor layer, a gate insulating film interposed between the gate electrode and the semiconductor layer, and a pair of source/drain areas formed in the semiconductor layer; and the first and second driving transistors each have a channel width larger than that of at least either each of the load transistors or each of the access transistors.
摘要翻译：一种具有SRAM单元单元的半导体器件，每个SRAM单元包括一对第一驱动晶体管和第二驱动晶体管，一对第一负载晶体管和第二负载晶体管，以及一对第一存取晶体管和第二存取晶体管，其中每个晶体管包括从衬底平面向上突出的半导体层，在半导体层的相对侧上延伸以跨越半导体层的顶部的栅极电极，插入在栅极电极和半导体之间的栅极绝缘膜层，以及形成在半导体层中的一对源极/漏极区域; 并且第一和第二驱动晶体管的沟道宽度均大于至少任一个负载晶体管或每个存取晶体管的沟道宽度。

9. 发明申请

US20080079077A1 Semiconductor Device And Manufacturing Method Thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080079077A1
公开(公告)日：2008-04-03
申请号：US11570037
申请日：2005-05-25
申请人： Koichi Takeda , Masahiro Nomura , Kiyoshi Takeuchi , Hitoshi Wakabayashi , Shigeharu Yamagami , Risho Koh , Koichi Terashima , Katsuhiko Tanaka , Masayasu Tanaka
发明人： Koichi Takeda , Masahiro Nomura , Kiyoshi Takeuchi , Hitoshi Wakabayashi , Shigeharu Yamagami , Risho Koh , Koichi Terashima , Katsuhiko Tanaka , Masayasu Tanaka
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： H01L27/11 , H01L27/1104 , H01L27/1108 , H01L29/785 , Y10S257/903
摘要： A semiconductor device having SRAM cell units each comprising a pair of a first driving transistor and a second driving transistor, a pair of a first load transistor and a second load transistor, and a pair of a first access transistor and a second access transistor, wherein each of the transistors comprises a semiconductor layer projecting upward from a substrate plane, a gate electrode extending on opposite sides of the semiconductor layer so as to stride over a top of the semiconductor layer, a gate insulating film interposed between the gate electrode and the semiconductor layer, and a pair of source/drain areas formed in the semiconductor layer; and the first and second driving transistors each have a channel width larger than that of at least either each of the load transistors or each of the access transistors.
摘要翻译：一种具有SRAM单元单元的半导体器件，每个SRAM单元包括一对第一驱动晶体管和第二驱动晶体管，一对第一负载晶体管和第二负载晶体管，以及一对第一存取晶体管和第二存取晶体管，其中每个晶体管包括从衬底平面向上突出的半导体层，在半导体层的相对侧上延伸以跨越半导体层的顶部的栅极电极，插入在栅极电极和半导体之间的栅极绝缘膜层，以及形成在半导体层中的一对源极/漏极区域; 并且第一和第二驱动晶体管的沟道宽度均大于至少任一个负载晶体管或每个存取晶体管的沟道宽度。

10. 发明授权

US08247294B2 Manufacturing process of fin-type field effect transistor and semiconductor 失效
标题翻译：鳍型场效应晶体管和半导体的制造工艺
公开(公告)号：US08247294B2
公开(公告)日：2012-08-21
申请号：US12946034
申请日：2010-11-15
申请人： Kiyoshi Takeuchi , Katsuhiko Tanaka
发明人： Kiyoshi Takeuchi , Katsuhiko Tanaka
IPC分类号： H01L21/336
CPC分类号： H01L21/84 , H01L27/1203 , H01L29/42384 , H01L29/66795 , H01L29/785
摘要： A constant distance can be maintained between source/drain regions without providing a gate side wall by forming a gate electrode including an eaves structure, and a uniform dopant concentration is kept within a semiconductor by ion implantation. As a result, a FinFET excellent in element properties and operation properties can be obtained. A field effect transistor, wherein a gate structure body is a protrusion that protrudes toward source and drain regions sides in a channel length direction and has a channel length direction width larger than that of the part adjacent to the insulating film in a gate electrode, and the protrusion includes an eaves structure formed by the protrusion that extends in a gate electrode extending direction on the top surface of the semiconductor layer.
摘要翻译：通过形成包括屋顶结构的栅极电极，可以在源/漏区之间保持恒定的距离，而不需要提供栅极侧壁，并且通过离子注入将均匀的掺杂剂浓度保持在半导体内。结果，可以获得元件性能和操作性能优异的FinFET。一种场效应晶体管，其中栅极结构体是在沟道长度方向上朝向源极和漏极区域侧突出的突起，并且沟道长度方向宽度大于栅电极中与绝缘膜相邻的部分的沟道长度方向宽度;以及突起包括由半导体层的顶表面上沿栅电极延伸方向延伸的突起形成的檐结构。

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