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1. 发明申请

US20070160507A1 Semiconductor processing apparatus with lift pin structure 有权
标题翻译：具有升降销结构的半导体处理装置
公开(公告)号：US20070160507A1
公开(公告)日：2007-07-12
申请号：US11330662
申请日：2006-01-12
申请人： Kiyoshi Satoh , Takayuki Yamagishi
发明人： Kiyoshi Satoh , Takayuki Yamagishi
IPC分类号： B01J19/18
CPC分类号： C23C16/4586
摘要： A semiconductor processing apparatus includes: a reaction chamber; a susceptor disposed in the reaction chamber for placing a substrate thereon and having through-holes in an axial direction of the susceptor; lift pins slidably disposed in the respective through-holes for lifting the substrate over the susceptor; and a means for reducing contact resistance between the lift pins and the respective through-holes.
摘要翻译：半导体处理装置包括：反应室; 设置在所述反应室中的基座，用于在其上放置基板并在所述基座的轴向方向上具有通孔; 可滑动地设置在各个通孔中的提升销，用于将基板提升到基座上; 以及用于降低提升销和各个通孔之间的接触电阻的装置。

2. 发明授权

US07520244B2 Plasma treatment apparatus 有权
标题翻译：等离子体处理装置
公开(公告)号：US07520244B2
公开(公告)日：2009-04-21
申请号：US10807528
申请日：2004-03-23
申请人： Takayuki Yamagishi , Hiroki Arai , Kiyoshi Satoh
发明人： Takayuki Yamagishi , Hiroki Arai , Kiyoshi Satoh
IPC分类号： C23C16/00 , C23F1/00 , H01L21/306 , H01J7/24 , H05B31/26
CPC分类号： C23C16/5096 , C23C16/36 , C23C16/401 , C23C16/45565 , H01J37/32082 , H01J37/32183
摘要： A plasma treatment apparatus for thin-film deposition includes a reactor chamber; a pair of parallel-plate electrodes disposed inside the chamber; and a radio-frequency power supply system used for transmitting radio-frequency power to one of the parallel-plate electrodes via multiple supply points provided on the one of the parallel-electrodes. The radio-frequency power supply system includes a radio-frequency transmission unit which includes an inlet transmission path and multiple branches branched off from the inlet transmission path multiple times. Each branch is connected to the supply point and has a substantially equal characteristic impedance value.
摘要翻译：用于薄膜沉积的等离子体处理装置包括反应室; 设置在所述室内的一对平行板电极; 以及用于经由设置在所述平行电极中的一个上的多个供给点将射频功率发送到平行板电极中的一个的射频电源系统。射频电源系统包括射频传输单元，其包括入口传输路径和从入口传输路径多次分支的多个分支。每个分支连接到供电点并且具有基本相等的特征阻抗值。

3. 发明授权

US07638003B2 Semiconductor processing apparatus with lift pin structure 有权
标题翻译：具有升降销结构的半导体处理装置
公开(公告)号：US07638003B2
公开(公告)日：2009-12-29
申请号：US11330662
申请日：2006-01-12
申请人： Kiyoshi Satoh , Takayuki Yamagishi
发明人： Kiyoshi Satoh , Takayuki Yamagishi
IPC分类号： C23C16/00 , C23F1/00 , H01L21/306
CPC分类号： C23C16/4586
摘要： A semiconductor processing apparatus includes: a reaction chamber; a susceptor disposed in the reaction chamber for placing a substrate thereon and having through-holes in an axial direction of the susceptor; lift pins slidably disposed in the respective through-holes for lifting the substrate over the susceptor; and a means for reducing contact resistance between the lift pins and the respective through-holes.
摘要翻译：半导体处理装置包括：反应室; 设置在所述反应室中的基座，用于在其上放置基板并在所述基座的轴向方向上具有通孔; 可滑动地设置在各个通孔中的提升销，用于将基板提升到基座上; 以及用于降低提升销和各个通孔之间的接触电阻的装置。

4. 发明授权

US09312155B2 High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules 有权
标题翻译：配有多个双室模块的高通量半导体处理设备
公开(公告)号：US09312155B2
公开(公告)日：2016-04-12
申请号：US13154271
申请日：2011-06-06
申请人： Yukihiro Mori , Takayuki Yamagishi
发明人： Yukihiro Mori , Takayuki Yamagishi
IPC分类号： B05C11/10 , B32B41/00 , H01L21/683 , H01L21/67 , G05B19/418 , H01L21/677
CPC分类号： H01L21/6719 , C23C16/50 , C23C16/52 , G05B19/41865 , G05B2219/32265 , G05B2219/45031 , H01L21/67167 , H01L21/67201 , H01L21/67742
摘要： A wafer-processing apparatus includes: eight or ten reactors with identical capacity for processing wafers on the same plane, constituting four or five discrete units, each unit having two reactors arranged side by side with their fronts aligned in a line; a wafer-handling chamber including two wafer-handling robot arms each having at least two end-effectors; a load lock chamber; and a sequencer for performing, using the two wafer-handling robot arms, steps of unloading/loading processed/unprocessed wafers from/to any one of the units, and steps of unloading/loading processed/unprocessed wafers from/to all the other respective units in sequence while the wafers are in the one of the units.
摘要翻译：晶片处理装置包括：8个或10个具有相同容量的反应器，用于在相同的平面上处理晶片，构成四个或五个分立单元，每个单元具有并排排列的两个反应器，它们的前沿排成一行; 晶片处理室包括两个具有至少两个端部执行器的晶片处理机器人臂; 负载锁定室; 以及用于使用两个晶片处理机器人臂执行从/从任何一个单元卸载/加载处理/未处理的晶片的步骤的顺序器，以及从处理/未加工的晶片卸载/加载到所有其他相应的晶片的步骤单元在晶片处于单元之一中的顺序。

5. 发明申请

US20120305196A1 High-Throughput Semiconductor-Processing Apparatus Equipped with Multiple Dual-Chamber Modules 有权
标题翻译：配有多个双腔模块的高通量半导体处理装置
公开(公告)号：US20120305196A1
公开(公告)日：2012-12-06
申请号：US13154271
申请日：2011-06-06
申请人： Yukihiro Mori , Takayuki Yamagishi
发明人： Yukihiro Mori , Takayuki Yamagishi
IPC分类号： B05C11/10 , B32B41/00 , H01L21/683 , B25J15/00
CPC分类号： H01L21/6719 , C23C16/50 , C23C16/52 , G05B19/41865 , G05B2219/32265 , G05B2219/45031 , H01L21/67167 , H01L21/67201 , H01L21/67742
摘要： A wafer-processing apparatus includes: eight or ten reactors with identical capacity for processing wafers on the same plane, constituting four or five discrete units, each unit having two reactors arranged side by side with their fronts aligned in a line; a wafer-handling chamber including two wafer-handling robot arms each having at least two end-effectors; a load lock chamber; and a sequencer for performing, using the two wafer-handling robot arms, steps of unloading/loading processed/unprocessed wafers from/to any one of the units, and steps of unloading/loading processed/unprocessed wafers from/to all the other respective units in sequence while the wafers are in the one of the units.
摘要翻译：晶片处理装置包括：8个或10个具有相同容量的反应器，用于在相同的平面上处理晶片，构成四个或五个分立单元，每个单元具有并排排列的两个反应器，它们的前沿排成一行; 晶片处理室包括两个具有至少两个端部执行器的晶片处理机器人臂; 负载锁定室; 以及用于使用两个晶片处理机器人臂执行从/从任何一个单元卸载/加载处理/未处理的晶片的步骤的顺序器，以及从处理/未加工的晶片卸载/加载到所有其他相应的晶片的步骤单元在晶片处于单元之一中的顺序。

6. 发明申请

US20090162170A1 TANDEM TYPE SEMICONDUCTOR-PROCESSING APPARATUS 审中-公开
标题翻译： TANDEM型半导体加工设备
公开(公告)号：US20090162170A1
公开(公告)日：2009-06-25
申请号：US11960252
申请日：2007-12-19
申请人： Takayuki Yamagishi , Hiroki Kanayama , Noboru Shigeyama , Hideaki Fukuda
发明人： Takayuki Yamagishi , Hiroki Kanayama , Noboru Shigeyama , Hideaki Fukuda
IPC分类号： H01L21/677
CPC分类号： H01L21/67201 , H01L21/67196
摘要： A tandem type semiconductor-processing apparatus includes: a processing section including multiple units arranged in tandem, each of which unit includes a reaction chamber and a load lock chamber with an load lock interface; a FOUP section including at least one FOUP having a wafer cassette and a front opening interface; and a mini-environment section having a single interior connected to the processing section via each load lock interface on one side of the mini-environment section and connected to the FOUP section via each front opening interface on another side of the mini-environment section opposite to the one side.
摘要翻译：串联型半导体处理装置包括：处理部，包括串联布置的多个部件，每个部件包括反应室和具有负载锁定接口的负载锁定室; FOUP部分，其包括具有晶片盒和前开口界面的至少一个FOUP; 以及微型环境部分，其具有通过微环境部分一侧上的每个负载锁定接口连接到处理部分的单个内部，并且经由微型环境部分的另一侧上的每个前开口接口相对于FOUP部分相对到一边

7. 发明申请

US20080056854A1 Substrate-processing apparatus with buffer mechanism and substrate-transferring apparatus 有权
标题翻译：具有缓冲机构和基板转印装置的基板处理装置
公开(公告)号：US20080056854A1
公开(公告)日：2008-03-06
申请号：US11512637
申请日：2006-08-30
申请人： Takayuki Yamagishi , Tamihiro Kobayashi , Akira Watanabe , Kunihiro Kaneuchi
发明人： Takayuki Yamagishi , Tamihiro Kobayashi , Akira Watanabe , Kunihiro Kaneuchi
IPC分类号： H01L21/677
CPC分类号： H01L21/67745 , H01L21/67196 , H01L21/67201 , H01L21/68707 , Y10S294/902 , Y10S414/141
摘要： A substrate transfer apparatus for loading and unloading substrates in a reaction chamber, includes: an arm having a distal end which is laterally movable in a straight line direction; and end-effectors for loading and unloading substrates in a reaction chamber, which include a lower end-effector and an upper end-effector. One of the lower end-effector or the upper end-effector is movably coupled to the arm at a distal end of the arm, and the other end-effector is fixed to the movably coupled end-effector. The fixed end-effector is fixed to the movably coupled end-effector.
摘要翻译：一种用于在反应室中装载和卸载基板的基板传送装置，包括：臂，其具有可在直线方向上横向移动的远端; 以及用于在包括下端部执行器和上端部执行器的反应室中装载和卸载基板的端部执行器。下端部执行器或上端部执行器中的一个在臂的远端可移动地联接到臂上，而另一端部执行器固定到可移动地连接的端部执行器。固定的末端执行器被固定到可移动地联接的末端执行器。

8. 发明申请

US20050022737A1 Semiconductor-processing apparatus provided with susceptor and placing block 有权
标题翻译：设有基座和放置块的半导体处理设备
公开(公告)号：US20050022737A1
公开(公告)日：2005-02-03
申请号：US10897061
申请日：2004-07-22
申请人： Akira Shimizu , Hideaki Fukuda , Hiroki Arai , Baiei Kawano , Takayuki Yamagishi
发明人： Akira Shimizu , Hideaki Fukuda , Hiroki Arai , Baiei Kawano , Takayuki Yamagishi
IPC分类号： H01L21/683 , C23C16/00 , C23C16/458 , H01L21/205 , H01L21/677 , H01L21/68
CPC分类号： C23C16/4585
摘要： A semiconductor-processing apparatus comprises a susceptor and removable placing blocks detachably placed at a periphery of the susceptor for transferring a substrate. Retractable supporting members are provided for detaching/attaching the placing blocks from/to the susceptor.
摘要翻译：半导体处理装置包括基座和可拆卸地放置在基座周边的可拆卸放置块，用于传送基板。提供可伸缩的支撑构件用于将放置块从基座分离/附接到基座。

9. 发明授权

US10364496B2 Dual section module having shared and unshared mass flow controllers 有权
公开(公告)号：US10364496B2
公开(公告)日：2019-07-30
申请号：US13169951
申请日：2011-06-27
申请人： Takayuki Yamagishi
发明人： Takayuki Yamagishi
IPC分类号： C23C16/455 , B05C11/10 , G05D7/06
摘要： A dual section module with mass flow controllers, for processing wafers, includes: dual process sections integrated together; at least one mass flow controller (MFC) each shared by the dual process sections and provided in a gas line branching into two gas lines, at a branching point, connected to the respective interiors of the dual process sections and arranged symmetrically between the dual process sections; and at least one mass flow controller (MFC) each unshared by the dual process sections and provided in a gas line connected to the interior of each dual process section.

10. 发明授权

US06899507B2 Semiconductor processing apparatus comprising chamber partitioned into reaction and transfer sections 有权
标题翻译：半导体处理设备包括分隔成反应和转移段的腔室
公开(公告)号：US06899507B2
公开(公告)日：2005-05-31
申请号：US10072620
申请日：2002-02-08
申请人： Takayuki Yamagishi , Masaei Suwada , Takeshi Watanabe
发明人： Takayuki Yamagishi , Masaei Suwada , Takeshi Watanabe
IPC分类号： C23C16/44 , B65G49/07 , H01L21/677
CPC分类号： H01L21/67742 , H01L21/67748 , Y10S414/139
摘要： Semiconductor processing equipment that has increased efficiency, throughput, and stability, as well as reduced operating cost, footprint, and faceprint is provided. Other than during deposition, the atmosphere of both the reaction chamber and the transfer chamber are evacuated using the transfer chamber exhaust port, which is located below the surface of the semiconductor wafer. This configuration prevents particles generated during wafer transfer or during deposition from adhering to the surface of the semiconductor wafer. Additionally, by introducing a purge gas into the transfer chamber during deposition, and by using an insulation separating plate 34, the atmospheres of the transfer and reaction chambers can be effectively isolated from each other, thereby preventing deposition on the walls and components of the transfer chamber. Finally, the configuration described herein permits a wafer buffer mechanism to be used with the semiconductor processing equipment, thereby further increasing throughput and efficiency.
摘要翻译：提供了提高效率，吞吐量和稳定性以及降低运营成本，占地面积和面部印刷的半导体处理设备。除了沉积之外，使用位于半导体晶片表面下方的转移室排气口将反应室和转移室的气氛抽真空。这种构造防止在晶片转移期间或在沉积期间产生的颗粒粘附到半导体晶片的表面。此外，通过在沉积期间将吹扫气体引入转移室，并且通过使用绝缘分隔板34，可以有效地将转移室和反应室的气氛彼此隔离，从而防止沉积在转移的壁和组分上房间。最后，本文描述的配置允许晶片缓冲机构与半导体处理设备一起使用，从而进一步提高吞吐量和效率。

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