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1. 发明授权

US4503599A Method of fabricating field effect transistors 失效
标题翻译：制造场效应晶体管的方法
公开(公告)号：US4503599A
公开(公告)日：1985-03-12
申请号：US462014
申请日：1983-01-28
申请人： Kiichi Ueyanagi , Susumu Takahashi , Yasunari Umemoto , Michiharu Nakamura
发明人： Kiichi Ueyanagi , Susumu Takahashi , Yasunari Umemoto , Michiharu Nakamura
IPC分类号： H01L29/78 , H01L21/033 , H01L21/336 , H01L21/338 , H01L29/417 , H01L29/80 , H01L29/812 , H01L21/265
CPC分类号： H01L29/66522 , H01L21/033 , H01L29/66871 , H01L29/80 , H01L29/812
摘要： Herein disclosed is a field effect transistor fabricating method comprising: the step of forming a surface portion of a semiconductor substrate with an impurity region for a channel; the step of forming a first material layer, which has a width substantially equal to that of a gate electrode, in such a position on said semiconductor substrate and is to be formed with said gate electrode, a second material layer, which has a width larger than that of said first material layer, above said first material layer, and source and drain regions by an ion implantation using said first and second material layers thus formed as a mask; the step of forming source and drain electrodes in contact with said source and drain regions; the step of forming a third material layer, which has a selectivity with said first material layer in its etched characteristics, on the semiconductor body thus far prepared by the foregoing steps; the step of forming at least an aperture by removing said first material layer in a state using said third material layer as a mask; and the step of forming said gate electrode in said aperture.
摘要翻译：本文公开了一种场效应晶体管制造方法，包括：形成具有沟道杂质区的半导体衬底的表面部分的步骤; 在所述半导体衬底上形成具有与栅电极的宽度基本相等的第一材料层的步骤，并形成所述栅电极，第二材料层的宽度较大比所述第一材料层的上述第一材料层的上述第一材料层和通过使用由此形成的掩模的所述第一和第二材料层的离子注入的源极和漏极区域; 形成与所述源极和漏极区域接触的源极和漏极的步骤; 在上述步骤制备的半导体本体上形成第三材料层的步骤，该第三材料层具有其蚀刻特性中的所述第一材料层的选择性; 通过以使用所述第三材料层作为掩模的状态除去所述第一材料层来形成至少一个孔的步骤; 以及在所述孔中形成所述栅电极的步骤。

2. 发明授权

US4546540A Self-aligned manufacture of FET 失效
标题翻译： FET的自校准制造
公开(公告)号：US4546540A
公开(公告)日：1985-10-15
申请号：US531709
申请日：1983-09-13
申请人： Kiichi Ueyanagi , Yasunari Umemoto , Susumu Takahashi , Michiharu Nakamura
发明人： Kiichi Ueyanagi , Yasunari Umemoto , Susumu Takahashi , Michiharu Nakamura
IPC分类号： H01L21/265 , H01L21/311 , H01L21/338 , H01L29/417 , H01L29/80 , H01L29/812 , H01L29/48 , H01L21/308
CPC分类号： H01L29/66878 , H01L21/26546 , H01L21/31116 , H01L29/80 , H01L29/812 , Y10S148/083 , Y10S148/143
摘要： This specification discloses a self-aligned manufacturing method of a Schottky gate FET. This method comprises the steps: forming a gate metallic layer on a semiconductor substrate and a mask overhanged on the metallic layer; ion-implanting impurity ions into the semiconductor substrate using the mask to form a source/drain region; depositing an insulator on the gate metallic layer side surface and the other surface below the mask; directionally etching said deposited insulator using the mask to expose the source/drain region; depositing a source/drain electrode using the mask; and removing the mask.
摘要翻译：本说明书公开了肖特基栅极FET的自对准制造方法。该方法包括以下步骤：在半导体衬底上形成栅极金属层和在金属层上突出的掩模; 使用掩模将杂质离子注入到半导体衬底中以形成源/漏区; 在栅极金属层侧表面和掩模下方的另一表面上沉积绝缘体; 使用掩模定向蚀刻所述沉积的绝缘体以暴露源极/漏极区域; 使用掩模沉积源极/漏极; 并取下面罩。

3. 发明授权

US4683487A Heterojunction bipolar transistor 失效
标题翻译：异质结双极晶体管
公开(公告)号：US4683487A
公开(公告)日：1987-07-28
申请号：US795465
申请日：1985-11-06
申请人： Kiichi Ueyanagi , Susumu Takahashi , Toshiyuki Usagawa , Yasunari Umemoto , Toshihisa Tsukada
发明人： Kiichi Ueyanagi , Susumu Takahashi , Toshiyuki Usagawa , Yasunari Umemoto , Toshihisa Tsukada
IPC分类号： H01L21/331 , H01L29/06 , H01L29/20 , H01L29/417 , H01L29/423 , H01L29/73 , H01L29/737 , H01L29/72
CPC分类号： H01L29/0642 , H01L29/41708 , H01L29/42304 , H01L29/73 , H01L29/7371
摘要： A collector lead-out portion and a base lead-out portion are formed so as to oppose to each other in such a manner that active regions including a collector, a base and an emitter are sandwiched therebetween. The collector lead-out portion and the base lead-out portion are formed by ion implantation or selective epitaxial growth. Thus, a planar type heterojunction bipolar transistor capable of a high density of integration is formed.
摘要翻译：以这样的方式形成集电体引出部分和基极引出部分，以便将包括集电极，基极和发射极的有源区夹在其间的方式彼此相对。集电极引出部分和基极引出部分通过离子注入或选择性外延生长形成。因此，形成了具有高密度集成度的平面型异质结双极晶体管。

4. 发明授权

US5132752A Field effect transistor 失效
标题翻译：场效应晶体管
公开(公告)号：US5132752A
公开(公告)日：1992-07-21
申请号：US658463
申请日：1991-02-22
申请人： Yasunari Umemoto , Nobuo Kotera , Kiichi Ueyanagi , Norikazu Hashimoto , Nobutoshi Matsunaga , Yasuo Wada , Shoji Shukuri , Noboru Masuda , Takehisa Hayashi , Hirotoshi Tanaka
发明人： Yasunari Umemoto , Nobuo Kotera , Kiichi Ueyanagi , Norikazu Hashimoto , Nobutoshi Matsunaga , Yasuo Wada , Shoji Shukuri , Noboru Masuda , Takehisa Hayashi , Hirotoshi Tanaka
IPC分类号： H01L29/10 , H01L29/812
CPC分类号： H01L29/1075 , H01L29/812 , Y10S257/903
摘要： A field effect transistor formed on a semi-insulator or compound semiconductor substrate comprises a first semiconductor layer forming a source region, a drain region and a channel layer, and a second semiconductor layer having a reverse conduction type to that of the first semiconductor layer. The second semiconductor layer is doped so that it will be totally depleted. Therefore, a portion of the second semiconductor layer adjacent to the substrate will remain conductive. The field effect transistor with this structure prevents the short channel effect and the soft error due to .alpha.-particles. A threshold voltage control arrangement is also provided using the feature of a control electrode coupled to the second semiconductor layer and a feedback arrangement.
摘要翻译：形成在半绝缘体或化合物半导体衬底上的场效应晶体管包括形成源极区，漏极区和沟道层的第一半导体层以及具有与第一半导体层相反的导通型的第二半导体层。第二半导体层被掺杂以使其完全耗尽。因此，与衬底相邻的第二半导体层的一部分将保持导电。具有这种结构的场效应晶体管防止短沟道效应和由于α-粒子引起的软误差。还使用耦合到第二半导体层的控制电极的特征和反馈装置来提供阈值电压控制装置。

5. 发明授权

US5124770A Field effect transistor with alpha particle protection 失效
标题翻译：具有α粒子保护的场效应晶体管
公开(公告)号：US5124770A
公开(公告)日：1992-06-23
申请号：US512501
申请日：1990-04-20
申请人： Yasunari Umemoto , Kiichi Ueyanagi , Junji Shigeta , Norikazu Hashimoto
发明人： Yasunari Umemoto , Kiichi Ueyanagi , Junji Shigeta , Norikazu Hashimoto
IPC分类号： H01L29/812 , H01L21/338 , H01L29/10
CPC分类号： H01L29/1075 , Y10S257/903
摘要： An FET structure with improved .alpha.-particle immunity or soft error immunity particularly provided in a semi-insulating substrate. This structure includes some layer which can prevent both electrons and holes generated in a substrate by the incidence of .alpha.-particles from being injected into the FET.
摘要翻译：特别是在半绝缘衬底中提供了具有改进的α-粒子抗扰度或软错误抗扰性的FET结构。该结构包括一些层，其可以通过注入到FET中的α粒子的入射来防止在衬底中产生的电子和空穴。

6. 发明授权

US4561169A Method of manufacturing semiconductor device utilizing multilayer mask 失效
标题翻译：利用多层掩模制造半导体器件的方法
公开(公告)号：US4561169A
公开(公告)日：1985-12-31
申请号：US517409
申请日：1983-07-26
申请人： Masaru Miyazaki , Susumu Takahashi , Takahiro Kohashi , Kiichi Ueyanagi
发明人： Masaru Miyazaki , Susumu Takahashi , Takahiro Kohashi , Kiichi Ueyanagi
IPC分类号： H01L21/027 , H01L21/338 , H01L21/441
CPC分类号： H01L29/66871 , H01L21/0272
摘要： In manufacturing a field effect transistor, a pattern which has a wider upper layer and a narrower lower layer is formed at a gate electrode position. Using the pattern as a mask, first and second impurity regions are formed on both the sides of a gate region by ion implantation. Subsequently, at least the lower layer is buried in a material, such as an organic high polymer material, having a selectivity in etching characteristics with respect to the pattern material. After removing the lower layer, an electrode material is embedded in the resulting hole so as to form a gate electrode.
摘要翻译：在制造场效应晶体管时，在栅电极位置形成具有更宽的上层和更窄的下层的图案。使用图案作为掩模，通过离子注入在栅极区域的两侧形成第一和第二杂质区。随后，至少下层被埋在诸如有机高分子材料的材料中，其具有相对于图案材料的蚀刻特性的选择性。在去除下层之后，将电极材料嵌入所形成的孔中以形成栅电极。

7. 发明授权

US07099096B2 Heat-assisted magnetic recording head and heat-assisted magnetic recording apparatus 失效
标题翻译：热辅助磁记录头和热辅助磁记录装置
公开(公告)号：US07099096B2
公开(公告)日：2006-08-29
申请号：US10780570
申请日：2004-02-19
申请人： Kiichi Ueyanagi
发明人： Kiichi Ueyanagi
IPC分类号： G11B5/02
CPC分类号： B82Y25/00 , B82Y10/00 , G11B5/00 , G11B5/012 , G11B5/127 , G11B5/1278 , G11B5/3103 , G11B5/3903 , G11B5/3967 , G11B2005/0002 , G11B2005/0005 , G11B2005/0013 , G11B2005/0021 , G11B2005/3996
摘要： A heat-assisted magnetic recording head includes a thin film magnetic transducer having a pair of yokes and generating a magnetic field in a magnetic gap between two magnetic poles at the ends of the pair of yokes, and a heater placed in the vicinity of the magnetic gap and generating heat with an electric current. A part of a magnetic recording medium in the vicinity of the magnetic gap is heated by the heater to reduce a magnetic-coercive of the part of the magnetic recording medium and the magnetic field generated by the thin film magnetic transducer is applied to the part of the magnetic recording medium.
摘要翻译：一种热辅助磁记录头包括具有一对轭铁的薄膜磁换能器，并且在一对轭铁的端部处的两个磁极之间的磁隙中产生磁场，并且放置在磁性附近的加热器间隙并用电流产生热量。在磁隙附近的磁记录介质的一部分被加热器加热，以减小磁记录介质的一部分的磁矫顽力，并且将由薄膜磁换能器产生的磁场施加到磁记录介质。

8. 发明授权

US6154326A Optical head, disk apparatus, method for manufacturing optical head, and optical element 有权
标题翻译：光头，光盘装置，光头制造方法及光学元件
公开(公告)号：US6154326A
公开(公告)日：2000-11-28
申请号：US271868
申请日：1999-03-18
申请人： Kiichi Ueyanagi , Kazuo Baba
发明人： Kiichi Ueyanagi , Kazuo Baba
IPC分类号： G11B5/00 , G11B5/012 , G11B5/127 , G11B7/12 , G11B7/135 , G11B7/14 , G11B7/22 , G11B11/105 , G02B7/02 , G11B7/00 , G11B21/10
CPC分类号： G11B5/00 , G11B5/012 , G11B5/127 , G11B7/122 , G11B7/123 , G11B7/1374 , G11B7/1387 , G11B7/22 , B82Y10/00 , G11B11/10543 , G11B11/10554 , G11B11/1058 , G11B2005/0002 , G11B2005/0005 , G11B2005/0021 , G11B2007/13725 , G11B2007/13727 , G11B7/14
摘要： An optical head which implements high recording density of a recording medium and which is miniaturized in size and improved in data transfer rate, a disk apparatus, and a method for manufacturing the optical head are provided. A laser beam is emitted from a semiconductor laser, the laser beam is collimated by the collimator lens to a collimated beam and reflected by a mirror, condensed by an condense lens, and incident to an incident surface of a transparent condensing medium. The condensed beam which was incident to the incident surface is refracted by the incident surface, the refracted beam is condensed on a condense surface, a beam spot is formed on the condense surface, and a near field wave leaks from a small aperture. The near field wave leaked from the small aperture propagates in a recording layer of a recording. The beam is served for recording/reproduction on the recording layer.
摘要翻译：提供一种实现记录介质的高记录密度并且尺寸小型化并且提高数据传输速率的光学头，光盘装置和用于制造光学头的方法。从半导体激光器发射激光束，激光束被准直透镜准直到准直光束并由反射镜反射，被聚焦透镜聚光，并入射到透明冷凝介质的入射表面。入射到入射表面的聚光束被入射面折射，折射光束在冷凝表面上会聚，在凝聚面上形成束斑，近场波从小孔泄漏。从小孔径泄漏的近场波在记录的记录层中传播。该光束用于记录层上的记录/再现。

9. 发明授权

US5253265A Semiconductor laser device 失效
标题翻译：半导体激光器件
公开(公告)号：US5253265A
公开(公告)日：1993-10-12
申请号：US832053
申请日：1992-02-06
申请人： Yasuji Seko , Kiichi Ueyanagi , Hideo Nakayama , Hideki Fukunaga , Nobuaki Ueki
发明人： Yasuji Seko , Kiichi Ueyanagi , Hideo Nakayama , Hideki Fukunaga , Nobuaki Ueki
IPC分类号： H01S5/00 , H01S5/20 , H01S5/343 , H01S3/19
CPC分类号： H01S5/34313 , B82Y20/00 , H01S5/2059 , H01S5/3432
摘要： A semiconductor laser device having an active layer which is comprised of a quantum well layer formed of a mixed crystal material, and barrier layers provided on both sides of the quantum well layer in such a manner as to sandwich the same, is characterized in that Ge is thermally diffused in a portion of the active layer to disorder the quantum well layer and the barrier layers at that portion so as to form a non-light-emitting area with a low refractive index, while the quantum well layer and the barrier layers at a portion where Ge is not diffused is formed as a refractive index waveguide which is a light-emitting area.
摘要翻译：具有由混合晶体材料形成的量子阱层的有源层和以夹着该量子阱层的方式设置在量子阱层的两侧的势垒层的半导体激光器件的特征在于Ge 在有源层的一部分中热扩散以使该部分处的量子阱层和阻挡层紊乱，以便形成具有低折射率的非发光区域，而量子阱层和阻挡层在 Ge不被扩散的部分形成为作为发光区域的折射率波导管。

10. 发明授权

US4672406A Semiconductor member and semiconductor device employing the same 失效
标题翻译：采用该半导体元件的半导体元件和半导体器件
公开(公告)号：US4672406A
公开(公告)日：1987-06-09
申请号：US684691
申请日：1984-12-21
申请人： Yasushi Sawada , Kiichi Ueyanagi , Yoshifumi Katayama , Yasuhiro Shiraki , Makoto Morioka , Takao Kuroda , Tomoyoshi Mishima
发明人： Yasushi Sawada , Kiichi Ueyanagi , Yoshifumi Katayama , Yasuhiro Shiraki , Makoto Morioka , Takao Kuroda , Tomoyoshi Mishima
IPC分类号： H01L29/812 , H01L21/338 , H01L21/8252 , H01L27/095 , H01L29/201 , H01L29/205 , H01L29/36 , H01L29/43 , H01L29/47 , H01L29/778 , H01L29/80
CPC分类号： H01L21/8252 , H01L27/095 , H01L29/432 , H01L29/475 , H01L29/7783
摘要： A semiconductor member has a structure wherein a first semiconductor layer is held between second and third semiconductor layers which have forbidden band widths greater than a forbidden band width of the first semiconductor layer, and wherein only the second semiconductor layer which is formed on a side of the first semiconductor layer close to a substrate is doped with impurities. The semiconductor member constructs the depletion type with the first and second semiconductor layers, and the enhancement type with the first and third semiconductor layers. A semiconductor device can be properly formed in the enhancement or depletion type by selectively connecting the semiconductor layers.
摘要翻译：半导体部件具有这样的结构，其中第一半导体层被保持在禁止带宽大于第一半导体层的禁带宽度的第二和第三半导体层之间，并且其中只有形成在第一半导体层靠近基板的第一半导体层掺杂有杂质。半导体部件利用第一和第二半导体层构成耗尽型，并且利用第一和第三半导体层构成增强型。可以通过选择性地连接半导体层，以增强或耗尽型形式适当地形成半导体器件。

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