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2. 发明授权

US08000502B2 Portable memory storage device with biometric identification security 有权
标题翻译：便携式存储设备具有生物特征识别安全性
公开(公告)号：US08000502B2
公开(公告)日：2011-08-16
申请号：US11076221
申请日：2005-03-09
申请人： Sanjay Dave , Kevin M. Conley , Michael Morganstern , Wesley G. Brewer , Robert C. Miller , Yishai Kagan , Jean-Christophe Klein , Jeff Salazar , Daniel Kennedy , Robert Howard , Matt Peterson , Joel Jacobs
发明人： Sanjay Dave , Kevin M. Conley , Michael Morganstern , Wesley G. Brewer , Robert C. Miller , Yishai Kagan , Jean-Christophe Klein , Jeff Salazar , Daniel Kennedy , Robert Howard , Matt Peterson , Joel Jacobs
IPC分类号： G06K9/00
CPC分类号： G06K9/00053 , G06F21/32 , G06F21/79 , G06K9/00006
摘要： A portable memory storage device is disclosed where access to information on the device is granted only upon proper biometric authentication of a user. The device includes a controller, a non-volatile memory which may be a flash memory, and a biometric scanner system for controlling access to the information within the non-volatile memory. Each of the controller, non-volatile memory and biometric scanner system may be mounted in a base of the portable device, with the biometric system having an exposed surface on a top portion of the base for accepting biometric data such as a fingerprint. A cover is provided which includes a USB connector capable of mating within a USB port of the host device to establish communications between the portable and host devices. The cover also covers the exposed portion of the biometric scanner to protect the sensor when the portable memory storage device is not in use.
摘要翻译：公开了一种便携式存储器存储设备，其中只有在对用户的适当的生物认证认证时才允许对设备上的信息的访问。该设备包括控制器，可以是闪存的非易失性存储器，以及用于控制对非易失性存储器内的信息的访问的生物测定扫描器系统。控制器，非易失性存储器和生物测定扫描器系统中的每一个可以安装在便携式设备的基座中，生物测定系统在基座的顶部具有暴露表面，用于接收诸如指纹的生物测定数据。提供了一种盖，其包括能够在主机设备的USB端口内配合的USB连接器，以建立便携式和主机设备之间的通信。盖子还覆盖生物测定扫描器的暴露部分，以在便携式存储器存储装置不使用时保护传感器。

3. 发明授权

US09245634B2 Initialization of flash storage via an embedded controller 有权
公开(公告)号：US09245634B2
公开(公告)日：2016-01-26
申请号：US12621011
申请日：2009-11-18
申请人： Kevin M. Conley
发明人： Kevin M. Conley
IPC分类号： G11C16/20 , G06F9/44 , G06F9/445
CPC分类号： G11C16/20 , G06F9/445
摘要： A digital system including flash memory, coupled to a system-on-a-chip within which a flash memory subsystem controller is embedded, is disclosed. The system-on-a-chip includes support for a standard external interface, such as a Universal Serial Bus (USB) or IEEE 1394 interface, to which a host system such as flash memory test equipment can connect. Initialization of the flash memory is effected by opening a communications channel between the host system and the embedded flash memory subsystem controller. The host system can then effect initialization of the flash memory subsystem, including formatting of the flash memory arrays, loading application programs, and the like, over the communications channel.

4. 发明授权

US08504798B2 Management of non-volatile memory systems having large erase blocks 有权
标题翻译：管理具有较大擦除块的非易失性存储器系统
公开(公告)号：US08504798B2
公开(公告)日：2013-08-06
申请号：US10749831
申请日：2003-12-30
申请人： Kevin M. Conley , Carlos J. Gonzalez
发明人： Kevin M. Conley , Carlos J. Gonzalez
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F12/0246 , G06F2212/7202
摘要： A non-volatile memory system of a type having blocks of memory cells erased together and which are programmable from an erased state in units of a large number of pages per block. If the data of only a few pages of a block are to be updated, the updated pages are written into another block provided for this purpose. The valid original and updated data are then combined at a later time, when doing so does not impact on the performance of the memory. If the data of a large number of pages of a block are to be updated, however, the updated pages are written into an unused erased block and the unchanged pages are also written to the same unused block. By handling the updating of a few pages differently, memory performance is improved when small updates are being made.
摘要翻译：一种类型的非易失性存储器系统，其具有一起擦除的存储器单元的块，并且可以以每块的大量页面为单位从擦除状态编程。如果要更新块的几页数据，则更新的页面被写入为此目的提供的另一个块。然后，有效的原始和更新的数据在稍后的时间被组合，当这样做不影响存储器的性能时。然而，如果要更新块的大量页面的数据，则更新的页面被写入未使用的擦除块，并且未改变的页面也被写入到相同的未使用的块。通过不同的处理几页的更新，当进行小型更新时，内存性能得到改善。

5. 外观设计

USD648729S1 Memory storage device 有权
标题翻译：内存存储设备
公开(公告)号：USD648729S1
公开(公告)日：2011-11-15
申请号：US29366680
申请日：2010-07-28
申请人： John Beekley , Lev M. Bolotin , Gary Bordenkircher , James Carlton , Kevin M. Conley , Robert Hubler , Simon B. Johnson , Andrew J. Paul
设计人： John Beekley , Lev M. Bolotin , Gary Bordenkircher , James Carlton , Kevin M. Conley , Robert Hubler , Simon B. Johnson , Andrew J. Paul

6. 发明授权

US07904788B2 Methods of varying read threshold voltage in nonvolatile memory 有权
标题翻译：在非易失性存储器中改变读取阈值电压的方法
公开(公告)号：US07904788B2
公开(公告)日：2011-03-08
申请号：US11556615
申请日：2006-11-03
申请人： Yigal Brandman , Kevin M. Conley
发明人： Yigal Brandman , Kevin M. Conley
IPC分类号： H03M13/00
CPC分类号： G11C11/5642 , G06F11/1072 , G11C16/26 , G11C16/349
摘要： Data is read from a nonvolatile memory array using one or more read voltages that are adjusted during memory life. Programming target voltages and read voltages may be adjusted together over memory life to map memory states to an increasingly wide threshold window. Individual memory states are mapped to sub-ranges that are made wider, reducing errors.
摘要翻译：使用在存储器寿命期间调整的一个或多个读取电压从非易失性存储器阵列读取数据。编程目标电压和读取电压可以在存储器寿命中一起调整，以将存储器状态映射到越来越宽的阈值窗口。单个内存状态映射到更广泛的子范围，从而减少错误。

7. 发明授权

US07904783B2 Soft-input soft-output decoder for nonvolatile memory 有权
标题翻译：用于非易失性存储器的软输入软输出解码器
公开(公告)号：US07904783B2
公开(公告)日：2011-03-08
申请号：US11536327
申请日：2006-09-28
申请人： Yigal Brandman , Kevin M. Conley
发明人： Yigal Brandman , Kevin M. Conley
IPC分类号： G11C29/00 , H03M13/29 , H03M13/45
CPC分类号： G06F11/1072 , G06F11/1068 , G11C16/0483 , G11C2029/0411
摘要： In a nonvolatile memory system, data is read from a memory array and used to obtain likelihood values, which are then provided to a soft-input soft-output decoder. The soft-input soft-output decoder calculates output likelihood values from input likelihood values and from parity data that was previously added according to an encoding scheme.
摘要翻译：在非易失性存储器系统中，从存储器阵列中读取数据并用于获得似然值，然后提供给软输入软输出解码器。软输入软输出解码器从输入似然值和根据编码方案先前添加的奇偶校验数据计算输出似然值。

8. 发明授权

US07882299B2 System and method for use of on-chip non-volatile memory write cache 有权
标题翻译：使用片上非易失性存储器写入缓存的系统和方法
公开(公告)号：US07882299B2
公开(公告)日：2011-02-01
申请号：US11021200
申请日：2004-12-21
申请人： Kevin M. Conley , Yoram Cedar
发明人： Kevin M. Conley , Yoram Cedar
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F12/0893 , G06F12/0246 , G06F12/0804 , G06F2212/7203 , G11C16/12 , G11C16/3418 , G11C16/3427 , G11C2207/2245 , G11C2216/14
摘要： A method of programming a non-volatile memory array using an on-chip write cache is disclosed. Individual data packets received by the memory system are stored in cache memory. More than one data packet may be stored in this way and then programmed to a single page of the non-volatile array. This results in more efficient use of storage space in the non-volatile array.
摘要翻译：公开了一种使用片上写高速缓存来编程非易失性存储器阵列的方法。由存储器系统接收的各个数据分组存储在高速缓冲存储器中。可以以这种方式存储多于一个数据分组，然后编程到非易失性阵列的单页。这导致在非易失性阵列中更有效地使用存储空间。

9. 发明授权

US07747927B2 Method for adapting a memory system to operate with a legacy host originally designed to operate with a different memory system 有权
标题翻译：用于使存储器系统适应原始设计用于与不同存储器系统一起操作的旧式主机进行操作的方法
公开(公告)号：US07747927B2
公开(公告)日：2010-06-29
申请号：US11285992
申请日：2005-11-22
申请人： Daniel C. Guterman , Yoram Cedar , Charles Schroter , Milton Lourenco Barrocas , Carlos Gonzalez , Kevin M. Conley
发明人： Daniel C. Guterman , Yoram Cedar , Charles Schroter , Milton Lourenco Barrocas , Carlos Gonzalez , Kevin M. Conley
IPC分类号： G11C29/00 , H03M13/00
CPC分类号： G06F13/1694 , G06F11/1068 , G11C7/00
摘要： A non-volatile memory device is provided with a controller and includes method that controls memory operations and to emulate the memory and communication characteristics of a legacy memory device. In this way, the memory device is compatible with a host that was originally designed to operate the legacy memory device. In particular, the controller performs the emulation to the host taking into account differences such as multibit memory, error correction requirement, memory support of overwrites, and erasable block sizes.
摘要翻译：非易失性存储器件具有控制器，并且包括控制存储器操作并模拟传统存储器件的存储器和通信特性的方法。以这种方式，存储器设备与最初设计用于操作传统存储设备的主机兼容。特别地，控制器考虑到诸如多位存储器，错误校正要求，覆盖的存储器支持以及可擦除块大小之类的差异，对主机执行仿真。

10. 发明授权

US07669004B2 Flash storage system with write-erase abort detection mechanism 有权
标题翻译：闪存存储系统具有写擦除中止检测机制
公开(公告)号：US07669004B2
公开(公告)日：2010-02-23
申请号：US11936440
申请日：2007-11-07
申请人： Jason T. Lin , Kevin M. Conley , Robert C. Chang
发明人： Jason T. Lin , Kevin M. Conley , Robert C. Chang
IPC分类号： G06F12/00
CPC分类号： G11C16/0416 , G11C16/10 , G11C16/105 , G11C2216/16
摘要： The present invention presents a non-volatile memory and method for its operation that ensures reliable mechanism for write and erase abort detection in the event of lost of power during non-volatile memory programming and erasing with minimized system performance penalty. During a multi-sector write process, an indication of a successful write in one sector is written into the overhead of the following sector at the same time as the following sector's data content is written. The last sector written will additionally have an indication of its own successful write written into its overhead. For erase, an erase abort flag in the first sector of the block can be marked after a successful erase operation.
摘要翻译：本发明提供了一种用于其操作的非易失性存储器和方法，其确保在非易失性存储器编程和擦除期间由于在最小化的系统性能损失下的擦除而导致的写入和擦除中止检测的可靠机制。在多扇区写入过程中，在写入下一个扇区的数据内容的同时，在一个扇区中成功写入的指示被写入下一个扇区的开销。写入的最后一个部分将另外显示自己的成功写入写入其开销。为了擦除，可以在成功擦除操作之后标记块的第一个扇区中的擦除中止标志。

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