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1. 发明授权

US5757294A Rate 24/25 modulation code for PRML recording channels 失效
标题翻译：为PRML录制通道调整24/25调制码
公开(公告)号：US5757294A
公开(公告)日：1998-05-26
申请号：US774412
申请日：1996-12-31
申请人： Kevin D. Fisher , James Fitzpatrick
发明人： Kevin D. Fisher , James Fitzpatrick
IPC分类号： G11B20/14 , H03M5/14 , H03M7/14 , H03M7/00
CPC分类号： H03M5/145 , G11B20/1426 , G11B2020/1434 , G11B2020/1446 , G11B2020/1449
摘要： Rate 24/25 modulation encoding methods and apparatus improve efficiency in a PRML magnetic recording channel. The rate 24/25 code word uses rate 8/9 RLL encoding of one byte of user data, combined with interleaved unencoded bytes to achieve improved code rates with reasonable global run length constraint. Use of the the rate 8/9 RLL (0,3) subcode results in a rate 24/25 RLL (0,11) code, while a rate 8/9 (0,6/5) subcode results in a rate 24/25 RLL (0,14/13) code.
摘要翻译：速率24/25调制编码方法和设备提高了PRML磁记录通道的效率。速率24/25码字使用用户数据的一个字节的速率8/9 RLL编码，与交织的未编码字节相结合，以合理的全局运行长度约束来实现改进的码率。速率8/9 RLL（0,3）子码的使用导致速率为24/25 RLL（0,11）码，而速率为8/9（0,6 / 5）的子码导致速率为24 / 25 RLL（0,14 / 13）代码。

2. 发明授权

US09063844B2 Non-volatile memory management system with time measure mechanism and method of operation thereof 有权
标题翻译：具有时间测量机制的非易失性存储器管理系统及其操作方法
公开(公告)号：US09063844B2
公开(公告)日：2015-06-23
申请号：US13599241
申请日：2012-08-30
申请人： James Higgins , James Fitzpatrick , Mark Dancho
发明人： James Higgins , James Fitzpatrick , Mark Dancho
IPC分类号： G06F13/00 , G06F13/28 , G06F12/00 , G06F12/02 , G06F3/06
CPC分类号： G06F12/0246 , G06F3/0644 , G06F2212/7205
摘要： A method of operation of a non-volatile memory management system includes: selecting a specific time period by a unit controller; establishing a first time pool having super blocks written during the specific time period; and promoting to a second time pool, the super blocks from the first time pool, at the lapse of the specific time period.
摘要翻译：非易失性存储器管理系统的操作方法包括：通过单元控制器选择特定的时间段; 建立在特定时间段内写入超级块的第一时间池; 并推广到第二时间池，超级块从第一时间池，在特定时间段过去。

3. 发明授权

US07423832B2 Controlling head heating based on upcoming data sector write pattern 有权
标题翻译：基于即将到来的数据扇区写入模式控制磁头加热
公开(公告)号：US07423832B2
公开(公告)日：2008-09-09
申请号：US11703317
申请日：2007-02-07
申请人： Bruce Buch , James Fitzpatrick
发明人： Bruce Buch , James Fitzpatrick
IPC分类号： G11B21/02 , G11B27/36
CPC分类号： G11B5/02 , G11B5/6064 , G11B2005/0005
摘要： A disk drive includes a rotatable data storage disk, a head, a heater element, and a controller. The disk includes a plurality of data sectors between servo spokes. The head is configured to fly on an air cushion relative to the rotating disk while writing data on the data sectors. The heater element is attached to the head and configured to controllably heat the head responsive to a heater signal. The controller determines an upcoming pattern of selected ones of the data sectors on which data is to be written through the head in response to at least one write command from a host device, and controls the heater signal in response to the determined upcoming pattern of data sectors on which data is to be written.
摘要翻译：磁盘驱动器包括可旋转数据存储盘，头，加热器元件和控制器。盘包括伺服轮辐之间的多个数据扇区。头部配置成相对于旋转盘在气垫上飞行，同时在数据扇区上写入数据。加热器元件附接到头部并且被配置为响应于加热器信号可控地加热头部。控制器响应于来自主机设备的至少一个写入命令，确定要通过头部写入数据的所选数据扇区的即将到来的模式，并根据所确定的即将到来的数据模式来控制加热器信号要写入数据的扇区。

4. 发明授权

US06222375B1 Synchronous calibration test circuit for use in recording systems 有权
标题翻译：用于记录系统的同步校准测试电路
公开(公告)号：US06222375B1
公开(公告)日：2001-04-24
申请号：US09312018
申请日：1999-05-14
申请人： James Fitzpatrick , Christopher M. Carpenter
发明人： James Fitzpatrick , Christopher M. Carpenter
IPC分类号： G01R3500
CPC分类号： G11B27/36 , G11B20/10009 , G11B20/1403 , G11B2005/001 , G11B2220/20
摘要： A synchronous calibration test circuit in accordance with the principles of this invention that uses a bandgap reference voltage of a PRML chip and a write clock synthesizer to generate an output reference calibration signal comprising a programmable frequency and whose amplitude is invariant with environmental conditions. This reference signal is injected at the input of a signal path of the PRML chip and measured after the PRML's A/D converter using the synchronous test calibration circuit of this invention. Since the programmable frequency reference signal is insensitive to voltage supply fluctuations as well as temperature and process variations this reference signal can be used to measure and characterize changes in the transfer function of the analog signal path of the PRML chip.
摘要翻译：根据本发明的原理的同步校准测试电路，其使用PRML芯片的带隙参考电压和写时钟合成器来生成包括可编程频率并且其幅度与环境条件不变的输出参考校准信号。该参考信号在PRML芯片的信号路径的输入处被注入，并在使用本发明的同步测试校准电路的PRML的A / D转换器之后测量。由于可编程频率参考信号对电压波动以及温度和过程变化不敏感，因此该参考信号可用于测量和表征PRML芯片的模拟信号路径的传递函数的变化。

5. 发明授权

US5691857A Method using matched filters for determining head positioner micro-jog in hard disk drive employing magneto-resistive heads 失效
标题翻译：使用匹配滤波器的方法，用于确定使用磁阻头的硬盘驱动器中的头部定位器微点动作
公开(公告)号：US5691857A
公开(公告)日：1997-11-25
申请号：US536416
申请日：1995-09-29
申请人： James Fitzpatrick , Xiaodong Che
发明人： James Fitzpatrick , Xiaodong Che
IPC分类号： G11B5/012 , G11B5/48 , G11B5/596 , G11B21/10
CPC分类号： G11B5/012 , G11B5/4886 , G11B5/59627 , G11B5/59683
摘要： Determining a micro-jog parameter in a disk drive that employs a magneto-resistive (MR) transducer head assembly and a partial response (PRML) detector includes improved accuracy in measuring on-track signal strength by use of a matched filter technique. The matched filter includes circuitry for emulating a partial response signal expected to be produced by a selected test bit pattern prerecorded on the selected track. The matched filtering technique provides improved accuracy in measuring the detected signal strength as it provides an extremely narrow digital filter focused on the test bit pattern frequency. Improved determination of the micro-jog distance further includes measuring interference from adjacent tracks, the best error rate being achieved at micro-jog positions intermediate the maximum on-track signal strength and the minimum off-track interference. A novel digital detector for accurately measuring adjacent track interference also is disclosed.
摘要翻译：确定采用磁阻（MR）传感器头部组件和部分响应（PRML）检测器的磁盘驱动器中的微步进参数包括通过使用匹配滤波器技术来提高测量轨道上信号强度的精度。匹配滤波器包括用于模拟预期由预先记录在所选轨道上的选定测试位模式产生的部分响应信号的电路。匹配滤波技术提供了测量检测信号强度的精度，因为它提供了一个集中在测试位模式频率上的极窄数字滤波器。改进的微步距距离的确定还包括测量来自相邻轨道的干扰，在最大导轨信号强度和最小偏离磁道干扰之间的微点位置处实现最佳误码率。公开了一种用于精确测量相邻轨道干扰的新型数字检测器。

6. 发明授权

US4948206A Refrigerator door assembly with decorative front trim panels 失效
标题翻译：带装饰前装饰板的冰箱门总成
公开(公告)号：US4948206A
公开(公告)日：1990-08-14
申请号：US279017
申请日：1988-12-02
申请人： James Fitzpatrick
发明人： James Fitzpatrick
IPC分类号： A47F3/04 , E06B3/30
CPC分类号： A47F3/043 , E06B3/305
摘要： A refrigerator door assembly mountable in an opening of a refrigerator cabinet including a door mounting cabinet frame having a front wall positionable against the cabinet adjacent the opening and a plurality of insulated glass doors mounted in the cabinet frame. The insulated glass doors each include an insulated glass unit and a door frame surrounding and supporting the periphery of the glass unit. Decorative trim panels, preferably made of plastic, are detachably mounted on the door and cabinet frames in overlapping relation to the front walls thereof for providing the desired finished appearance for the door assembly, which may be color coordinated with the decor of the room or commercial establishment in which the refrigerator is installed.
摘要翻译：一种可安装在冰柜的开口中的冰箱门组件，其包括门安装柜框架，所述门安装柜框架具有可邻近开口定位抵靠柜体的前壁和安装在柜框架中的多个隔热玻璃门。隔热玻璃门各自包括隔热玻璃单元和围绕并支撑玻璃单元周边的门框。优选由塑料制成的装饰装饰板可以与其前壁重叠地拆卸地安装在门和柜框架上，以提供用于门组件的期望的完成外观，其可以与房间或商业装饰的颜色协调建立冰箱的安装。

7. 发明授权

US09021319B2 Non-volatile memory management system with load leveling and method of operation thereof 有权
标题翻译：具有负载均衡的非易失性存储器管理系统及其操作方法
公开(公告)号：US09021319B2
公开(公告)日：2015-04-28
申请号：US13601607
申请日：2012-08-31
申请人： James Fitzpatrick , Bernardo Rub , James Higgins , Ryan Jones , Robert W. Ellis
发明人： James Fitzpatrick , Bernardo Rub , James Higgins , Ryan Jones , Robert W. Ellis
IPC分类号： G06F11/00 , G11C16/34 , G11C29/50 , G11C16/00
CPC分类号： G11C16/349 , G11C16/00 , G11C29/50004 , G11C2029/5002
摘要： A method of operation of a non-volatile memory system includes: generating a test stimulus for a page in a memory array; measuring a test response from the page in the memory array based on the test stimulus; calculating a measured effective life of the page from the test response; and determining a use plan according to the measured effective life for accessing the page.
摘要翻译：一种非易失性存储器系统的操作方法包括：为存储器阵列中的页面生成测试激励; 基于测试刺激测量存储器阵列中的页面的测试响应; 从测试响应计算页面的测量有效寿命; 以及根据测量的有效寿命确定用于访问页面的使用计划。

8. 发明申请

US20130061101A1 NON-VOLATILE MEMORY MANAGEMENT SYSTEM WITH LOAD LEVELING AND METHOD OF OPERATION THEREOF 有权
标题翻译：具有负载均衡的非易失性存储器管理系统及其操作方法
公开(公告)号：US20130061101A1
公开(公告)日：2013-03-07
申请号：US13601607
申请日：2012-08-31
申请人： James Fitzpatrick , Bernardo Rub , James Higgins , Ryan Jones , Robert W. Ellis
发明人： James Fitzpatrick , Bernardo Rub , James Higgins , Ryan Jones , Robert W. Ellis
IPC分类号： G01R31/28 , G06F11/08
CPC分类号： G11C16/349 , G11C16/00 , G11C29/50004 , G11C2029/5002
摘要： A method of operation of a non-volatile memory system includes: generating a test stimulus for a page in a memory array; measuring a test response from the page in the memory array based on the test stimulus; calculating a measured effective life of the page from the test response; and determining a use plan according to the measured effective life for accessing the page.
摘要翻译：一种非易失性存储器系统的操作方法包括：为存储器阵列中的页面生成测试激励; 基于测试刺激测量存储器阵列中的页面的测试响应; 从测试响应计算页面的测量有效寿命; 以及根据测量的有效寿命确定用于访问页面的使用计划。

9. 发明申请

US20130061019A1 STORAGE CONTROL SYSTEM WITH WRITE AMPLIFICATION CONTROL MECHANISM AND METHOD OF OPERATION THEREOF 有权
标题翻译：具有写放大控制机制的存储控制系统及其操作方法
公开(公告)号：US20130061019A1
公开(公告)日：2013-03-07
申请号：US13601243
申请日：2012-08-31
申请人： James Fitzpatrick , Bernardo Rub , Mark Dancho , James Higgins , Ryan Jones
发明人： James Fitzpatrick , Bernardo Rub , Mark Dancho , James Higgins , Ryan Jones
IPC分类号： G06F12/06
CPC分类号： G06F11/3409 , G06F11/3442 , G06F11/3485 , G06F2201/88
摘要： A method of operation of a storage control system includes: partitioning logical addresses into a number of subdrives, the logical addresses associated with a memory device; and monitoring a data write measure of one of the subdrives.
摘要翻译：存储控制系统的操作方法包括：将逻辑地址分割成多个子部分，与存储器设备相关联的逻辑地址; 并监视其中一个子分配的数据写入度量。

10. 发明申请

US20130054881A1 ELECTRONIC SYSTEM WITH STORAGE MANAGEMENT MECHANISM AND METHOD OF OPERATION THEREOF 有权
标题翻译：具有存储管理机制的电子系统及其操作方法
公开(公告)号：US20130054881A1
公开(公告)日：2013-02-28
申请号：US13590826
申请日：2012-08-21
申请人： Robert W. Ellis , James Fitzpatrick , James Higgins
发明人： Robert W. Ellis , James Fitzpatrick , James Higgins
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F3/0605 , G06F3/0647 , G06F3/067 , G06F2212/7205
摘要： A method of operation of an electronic system includes: forming a superblock by organizing an erase block according to a wear attribute; detecting a trigger count of the wear attribute of the superblock; updating a metadata table with the trigger count; and triggering a recycling event of the superblock based on the metadata table.
摘要翻译：电子系统的操作方法包括：通过根据磨损属性组织擦除块来形成超级块; 检测超级块的磨损属性的触发计数; 用触发计数更新元数据表; 并基于元数据表触发超级块的再循环事件。

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