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    • 2. 发明授权
    • Transceiver self-diagnostics for electromagnetic interference (EMI) degradation in balanced channels
    • 收发器自诊断平衡通道中的电磁干扰(EMI)降级
    • US08995507B2
    • 2015-03-31
    • US13218594
    • 2011-08-26
    • Scott R. PowellMehmet V. Tazebay
    • Scott R. PowellMehmet V. Tazebay
    • H04B1/38H04B3/00H04L25/03H04L25/02
    • H04B3/46H04L25/0274H04L25/03885
    • Transceiver self-diagnostics for electromagnetic interference (EMI) degradation in balanced channels. Selective operation of transmitting a common mode signal from a communication link implemented for supporting differential signaling, and appropriate processing of any detected signal energy, such as that corresponding to differential signal energy, provides a measure of electromagnetic compatibility (EMC) corresponding to the communication link. Comparison of detected differential signal energy to one or more thresholds may provide indication of whether or not the communication link is balanced or unbalanced, a degree or margin with which the communication link is compliant in accordance with EMC in accordance with one or more protocols, standards, or recommended practices. Multiple successive measurements of detected differential signal energy may be used to determine a trend of performance, such as whether or not the communication link is trending toward imbalance, failure, or noncompliance.
    • 收发器自诊断平衡通道中的电磁干扰(EMI)降级。 从实施用于支持差分信号的通信链路发送共模信号的选择性操作,以及诸如对应于差分信号能量的任何检测到的信号能量的适当处理提供了对应于通信链路的电磁兼容性(EMC)的测量 。 检测到的差分信号能量与一个或多个阈值的比较可以提供通信链路是否平衡或不平衡的指示,根据一个或多个协议标准,通信链路根据EMC符合的程度或裕度 或推荐做法。 可以使用检测到的差分信号能量的多个连续测量来确定性能趋势,例如通信链路是否趋向于不平衡,故障或不兼容。
    • 4. 发明申请
    • Transceiver self-diagnostics for electromagnetic interference (EMI) degradation in balanced channels
    • 收发器自诊断平衡通道中的电磁干扰(EMI)降级
    • US20120314794A1
    • 2012-12-13
    • US13218594
    • 2011-08-26
    • Scott R. PowellMehmet V. Tazebay
    • Scott R. PowellMehmet V. Tazebay
    • H04B15/00
    • H04B3/46H04L25/0274H04L25/03885
    • Transceiver self-diagnostics for electromagnetic interference (EMI) degradation in balanced channels. Selective operation of transmitting a common mode signal from a communication link implemented for supporting differential signaling, and appropriate processing of any detected signal energy, such as that corresponding to differential signal energy, provides a measure of electromagnetic compatibility (EMC) corresponding to the communication link. Comparison of detected differential signal energy to one or more thresholds may provide indication of whether or not the communication link is balanced or unbalanced, a degree or margin with which the communication link is compliant in accordance with EMC in accordance with one or more protocols, standards, or recommended practices. Multiple successive measurements of detected differential signal energy may be used to determine a trend of performance, such as whether or not the communication link is trending toward imbalance, failure, or noncompliance.
    • 收发器自诊断平衡通道中的电磁干扰(EMI)降级。 从实施用于支持差分信号的通信链路发送共模信号的选择性操作,以及诸如对应于差分信号能量的任何检测到的信号能量的适当处理提供了对应于通信链路的电磁兼容性(EMC)的测量 。 检测到的差分信号能量与一个或多个阈值的比较可以提供通信链路是否平衡或不平衡的指示,根据一个或多个协议标准,通信链路根据EMC符合的程度或裕度 或推荐做法。 可以使用检测到的差分信号能量的多个连续测量来确定性能趋势,例如通信链路是否趋向于不平衡,故障或不兼容。
    • 8. 发明申请
    • Implementation of adaptive filters of reduced complexity
    • 实现降低复杂度的自适应滤波器
    • US20080104158A1
    • 2008-05-01
    • US11586111
    • 2006-10-25
    • Arash FarhoodfarScott R. PowellPeiqing Wang
    • Arash FarhoodfarScott R. PowellPeiqing Wang
    • G06F17/14
    • H03H21/0027H04L2025/03477
    • Herein described is at least a method for implementing an adaptive digital filter of reduced implementation complexity. The method comprises computing at least one complex discrete Fourier transform of a complex data sequence using approximately one-half the number of points used in computing said discrete Fourier transform of a real valued sequence. Further, herein described is an adaptive digital filter of reduced implementation complexity. The adaptive digital filter comprises at least one circuitry for computing a complex discrete Fourier transform of a complex data sequence using approximately one-half the number of points used in computing the discrete Fourier transform of a real valued sequence. The adaptive digital filter may be employed in a 10 Gbit/sec Ethernet transceiver.
    • 这里描述了至少一种用于实现降低的实现复杂度的自适应数字滤波器的方法。 该方法包括使用计算实值序列的所述离散傅立叶变换中使用的大约一半数量的点来计算复数数据序列的至少一个复数离散付里叶变换。 此外,这里描述的是具有降低的实现复杂度的自适应数字滤波器。 自适应数字滤波器包括至少一个电路,用于使用计算实值序列的离散傅立叶变换中使用的大约一半数量的点来计算复数数据序列的复数离散付里叶变换。 自适应数字滤波器可用于10 Gbit / s以太网收发器。
    • 9. 发明授权
    • Self-timing circuit
    • 自定时电路
    • US4751407A
    • 1988-06-14
    • US943353
    • 1986-12-19
    • Scott R. Powell
    • Scott R. Powell
    • G11C7/00G11C7/22H03K5/15H03K19/096H03K19/177H03K19/00
    • H03K5/15013G11C7/22H03K19/0963H03K19/1772
    • A timing circuit is disclosed for use with an external circuit that provides a precharge/evaluation complete signal indicative of precharge completion and evaluation completion. The timing circuit is responsive to a clock signal and the precharge/evaluation complete signal provided by the external circuit, and includes a clock enabling circuit responsive to the clock signal and the precharge/evaluation complete signal for providing a clock enable signal having first and second states respectively indicative of (a) a predetermined condition wherein evaluation has been completed and the clock signal is at a predetermined level, and (b) precharge completion. A level shifting circuit is responsive to the clock signal and the clock enable signal and provides a phase control signal to the pseudo CMOS circuit, where such phase control signal defines (a) a precharge phase in response to said clock enable signal indicating the predetermined condition and the clock signal providing a predetermined transition, and (b) an evaluation phase in response to the precharge/evaluation complete signal indicating completion of precharging. A latching circuit is responsive to the clock enable signal and the clock signal for selectively latching the phase control signal in its respective phases.
    • 公开了一种与提供表示预充电完成和评估完成的预充电/评估完成信号的外部电路一起使用的定时电路。 定时电路响应于由外部电路提供的时钟信号和预充电/评估完成信号,并且包括响应于时钟信号和预充电/评估完成信号的时钟使能电路,用于提供具有第一和第二时钟的时钟使能信号 分别指示(a)其中评估已经完成并且时钟信号处于预定电平的预定条件,以及(b)预充电完成。 电平移位电路响应于时钟信号和时钟使能信号,并向伪CMOS电路提供相位控制信号,其中这种相位控制信号定义(a)响应于表示预定条件的所述时钟使能信号的预充电阶段 并且所述时钟信号提供预定的转换,以及(b)响应于表示预充电完成的预充电/评估完成信号的评估阶段。 锁存电路响应于时钟使能信号和时钟信号,用于选择性地将相位控制信号锁定在各自的相位中。
    • 10. 发明授权
    • Channel fault detection for channel diagnostic systems
    • 通道诊断系统的通道故障检测
    • US07636388B2
    • 2009-12-22
    • US11094273
    • 2005-03-31
    • Peiqing WangScott R. Powell
    • Peiqing WangScott R. Powell
    • H04B3/46
    • H04M3/085H04B3/46
    • A method and computer program product for detecting faults in cables. The invention comprises receiving a first reflected signal; comparing the first reflected signal amplified with a first predetermined receiver gain setting with a first threshold; if the value of the amplified first reflected signal is greater than the value of the first threshold, then terminating detecting; if the value of the amplified first reflected signal is not greater than the value of the first threshold, then comparing a second reflected signal amplified with a second predetermined gain setting different from the first gain setting with a second threshold.
    • 一种用于检测电缆故障的方法和计算机程序产品。 本发明包括接收第一反射信号; 将放大的第一反射信号与第一预定接收机增益设置与第一阈值进行比较; 如果放大的第一反射信号的值大于第一阈值的值,则终止检测; 如果放大的第一反射信号的值不大于第一阈值的值,则将与第一增益设置不同的第二预定增益设置放大的第二反射信号与第二阈值进行比较。