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    • 1. 发明授权
    • System and method for polar modulation using power amplifier bias control
    • 使用功率放大器偏置控制的极化调制系统和方法
    • US08548400B2
    • 2013-10-01
    • US11445981
    • 2006-05-31
    • Kevin B. TraylorRichard B. MeadorGeorge B. NorrisDavid S. Peckham
    • Kevin B. TraylorRichard B. MeadorGeorge B. NorrisDavid S. Peckham
    • H04B1/04
    • H03G3/3047
    • Systems and techniques are described for applying a polar bias modulation having a phase component and an amplitude component to a signal amplified by a power amplifier. The power amplifier (PA) has a plurality of amplifier gain stages and is configured to amplify an input to create an amplifier output signal. The input to the power amplitude is phase modulated based upon the phase component of the polar bias modulation, but need not be amplitude modulated. Amplitude modulation is provided by logic that includes a detector configured to receive an indication of the amplifier output as a feedback signal, a control module configured to generate a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation, and a bias circuit configured to adjust a bias signal associated with at least one of the plurality of amplifier gain stages in response to the control signal. Such a modulation scheme may be readily applied in enhanced data rate for global service mode (GSM) evolution (EDGE) applications, as well as in other environments that make use of polar modulation.
    • 描述了将系统和技术应用于具有相位分量和幅度分量的极性偏置调制到由功率放大器放大的信号。 功率放大器(PA)具有多个放大器增益级,并且被配置为放大输入以产生放大器输出信号。 基于极化偏置调制的相位分量,对功率振幅的输入进行相位调制,但不需要进行幅度调制。 幅度调制由逻辑提供,逻辑包括被配置为接收放大器输出的指示作为反馈信号的检测器,控制模块被配置为基于反馈信号和极偏调制的幅度分量来产生控制信号,以及 偏置电路,被配置为响应于所述控制信号调整与所述多个放大器增益级中的至少一个相关联的偏置信号。 这种调制方案可以容易地应用于全球服务模式(GSM)演进(EDGE)应用的增强数据速率以及利用极化调制的其它环境中。
    • 2. 发明申请
    • System and method for polar modulation using power amplifier bias control
    • 使用功率放大器偏置控制的极化调制系统和方法
    • US20070290747A1
    • 2007-12-20
    • US11445981
    • 2006-05-31
    • Kevin B. TraylorRichard B. MeadorGeorge B. NorrisDavid S. Peckham
    • Kevin B. TraylorRichard B. MeadorGeorge B. NorrisDavid S. Peckham
    • H03G5/16
    • H03G3/3047
    • Systems and techniques are described for applying a polar bias modulation having a phase component and an amplitude component to a signal amplified by a power amplifier. The power amplifier (PA) has a plurality of amplifier gain stages and is configured to amplify an input to create an amplifier output signal. The input to the power amplitude is phase modulated based upon the phase component of the polar bias modulation, but need not be amplitude modulated. Amplitude modulation is provided by logic that includes a detector configured to receive an indication of the amplifier output as a feedback signal, a control module configured to generate a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation, and a bias circuit configured to adjust a bias signal associated with at least one of the plurality of amplifier gain stages in response to the control signal. Such a modulation scheme may be readily applied in enhanced data rate for global service mode (GSM) evolution (EDGE) applications, as well as in other environments that make use of polar modulation.
    • 描述了将系统和技术应用于具有相位分量和幅度分量的极性偏置调制到由功率放大器放大的信号。 功率放大器(PA)具有多个放大器增益级,并且被配置为放大输入以产生放大器输出信号。 基于极化偏置调制的相位分量,对功率振幅的输入进行相位调制,但不需要进行幅度调制。 幅度调制由逻辑提供,逻辑包括被配置为接收放大器输出的指示作为反馈信号的检测器,控制模块被配置为基于反馈信号和极偏调制的幅度分量来产生控制信号,以及 偏置电路,被配置为响应于所述控制信号调整与所述多个放大器增益级中的至少一个相关联的偏置信号。 这种调制方案可以容易地应用于全球服务模式(GSM)演进(EDGE)应用的增强数据速率以及利用极化调制的其它环境中。
    • 3. 发明授权
    • Configurable multi-mode modulation system and transmitter
    • 可配置多模调制系统和发射机
    • US07539462B2
    • 2009-05-26
    • US11199737
    • 2005-08-09
    • David S. PeckhamRichard B. MeadorKevin B. Traylor
    • David S. PeckhamRichard B. MeadorKevin B. Traylor
    • H04B1/02
    • H04B1/0483H03F1/0205H03F1/34H03F3/24H03F2200/294H03F2200/372H04B1/406H04B2001/0433
    • A multi-mode transmitter architecture is configurable for multiple modulation modes using either polar or polar-lite modulation. Multiplexed signal paths and reconfigurable components are controlled for performance in GMSK and EDGE burst modes. Polar-lite EDGE modulation is programmed by setting a multiplexer coupling a first amplitude modulated signal path with a frequency modulated signal path input to a dual-mode power amplifier for amplification of the combined EDGE transmission signal. In full-polar EDGE modulation, amplitude modulated signal is multiplexed into a second amplitude modulated signal path for A/D conversion and comparison with a polar feedback signal coupled from the power amplifier output. The resulting comparison is applied to a power control port of the power amplifier to amplitude modulate the EDGE transmission output. Multiplexers are configured to disconnect the amplitude modulated paths when operating in GMSK signaling for both full-polar and polar-lite modulation. Multiplexers selectively couple power feedback into the second amplitude modulated signal path to provide power control and output power ramping for burst transmissions.
    • 多模式发射机架构可以使用极性或极性微调制来配置多种调制模式。 控制多路复用信号路径和可重构组件,以实现GMSK和EDGE突发模式的性能。 通过设置将第一幅度调制信号路径与输入到双模功率放大器的频率调制信号路径耦合的多路复用器来编程极性EDGE调制,以放大组合EDGE传输信号。 在全极性EDGE调制中,幅度调制信号被多路复用到第二幅度调制信号路径用于A / D转换,并与从功率放大器输出耦合的极性反馈信号进行比较。 所得到的比较被应用于功率放大器的功率控制端口以幅度调制EDGE传输输出。 多路复用器被配置为在GMSK信号中进行全极性和极坐标调制时断开幅度调制路径。 多路复用器将功率反馈选择性地耦合到第二幅度调制信号路径中,以提供突发传输的功率控制和输出功率斜坡。
    • 4. 发明申请
    • Frequency-Domain Amplitude Normalization For Symbol Correlation In Multi-Carrier Systems
    • 用于多载波系统中的符号相关的频域幅度归一化
    • US20140376648A1
    • 2014-12-25
    • US13924792
    • 2013-06-24
    • Jianqiang ZengSteven M. BoszeRaja V. TammaKevin B. Traylor
    • Jianqiang ZengSteven M. BoszeRaja V. TammaKevin B. Traylor
    • H04L27/26
    • H04L27/2655H04B3/54H04L27/2663H04L27/2672H04L27/2675H04L27/2688H04L27/3809
    • Methods and systems are disclosed for frequency-domain amplitude normalization for symbol correlation in multi-carrier communication systems. Digital samples associated with input signals received from a communication medium are processed using a Fast Fourier Transform (FFT) to generate complex frequency components. Each complex frequency component is normalized with respect to its amplitude, and the frequency-domain, amplitude-normalized frequency components are multiplied with frequency components for reference symbol(s) to generate frequency-domain correlation values. These frequency-domain correlation values are analyzed to determine if a correlation exists between the amplitude-normalized frequency components and the predetermined reference frequency components. A correlation detection output is then generated that indicates whether or not a symbol synchronization was achieved. The disclosed embodiments are particularly useful for symbol correlation in received signals for power line communication (PLC) systems.
    • 公开了用于多载波通信系统中的符号相关的频域幅度归一化的方法和系统。 使用快速傅立叶变换(FFT)处理与从通信介质接收的输入信号相关联的数字采样以产生复频率分量。 每个复频分量相对于其振幅被归一化,并且将频域幅度归一化频率分量与用于参考符号的频率分量相乘以产生频域相关值。 分析这些频域相关值,以确定振幅归一化频率分量与预定参考频率分量之间是否存在相关性。 然后生成指示是否实现符号同步的相关检测输出。 所公开的实施例对于用于电力线通信(PLC)系统的接收信号中的符号相关性特别有用。
    • 6. 发明授权
    • Switching down conversion mixer for use in multi-stage receiver
architectures
    • 关闭转换混频器以用于多级接收机架构
    • US6121819A
    • 2000-09-19
    • US55445
    • 1998-04-06
    • Kevin B. Traylor
    • Kevin B. Traylor
    • G06G7/12H03D7/14H04B1/30
    • H04B1/30
    • A mixer circuit (400) for use with a multi-stage receiver (200) accepts a single ended or differential (i.e. balanced) input (401). A voltage to current converter (402) comprised of a single RF transistor coupled to the input (401) provides a single current node (404) having a current proportional to a received input. A switching network (408) employs a plurality of stages (406). Each stage (406) is connected to the current node (404) and further has a control line (A, B, C, D). A clock signal generator connected to the control lines (A, B, C, D) of the switching network stage (406), generates clock signals having a frequency equal to the frequency of the received RF input signal. The switching network (408) under control of the clock signals switches the current at a frequency equal to the frequency of the received RF input signal to generate baseband I and Q signals. If the mixer (500) is differential, the balanced signal inputs (520) will be 180.degree. out of phase, one to another. In addition, the mixer (500) will consist of a first (510) and second (515) switching network. Of importance, only one first (510) and one second (515) switching network stage is active at any instant in time.
    • 与多级接收器(200)一起使用的混频器电路(400)接受单端或差分(即平衡)输入(401)。 由耦合到输入(401)的单个RF晶体管组成的电压 - 电流转换器(402)提供具有与接收输入成比例的电流的单个电流节点(404)。 交换网络(408)采​​用多个级(406)。 每个级(406)连接到当前节点(404),并且还具有控制线(A,B,C,D)。 连接到交换网络级(406)的控制线(A,B,C,D)的时钟信号发生器产生频率等于所接收的RF输入信号的频率的时钟信号。 在时钟信号的控制下的交换网络(408)以等于所接收的RF输入信号的频率的频率切换电流,以产生基带I和Q信号。 如果混合器(500)是差分的,平衡信号输入(520)将相位相差180°。 此外,混频器(500)将由第一(510)和第二(515)交换网络组成。 重要的是,只有一个第一(510)和一秒(515)交换网络阶段在任何时刻都是活跃的。
    • 8. 发明授权
    • Frequency-domain amplitude normalization for symbol correlation in multi-carrier systems
    • 多载波系统中符号相关的频域幅度归一化
    • US09100261B2
    • 2015-08-04
    • US13924792
    • 2013-06-24
    • Jianqiang ZengSteven M. BoszeRaja V. TammaKevin B. Traylor
    • Jianqiang ZengSteven M. BoszeRaja V. TammaKevin B. Traylor
    • H04K1/10H04L27/28H04L27/26
    • H04L27/2655H04B3/54H04L27/2663H04L27/2672H04L27/2675H04L27/2688H04L27/3809
    • Methods and systems are disclosed for frequency-domain amplitude normalization for symbol correlation in multi-carrier communication systems. Digital samples associated with input signals received from a communication medium are processed using a Fast Fourier Transform (FFT) to generate complex frequency components. Each complex frequency component is normalized with respect to its amplitude, and the frequency-domain, amplitude-normalized frequency components are multiplied with frequency components for reference symbol(s) to generate frequency-domain correlation values. These frequency-domain correlation values are analyzed to determine if a correlation exists between the amplitude-normalized frequency components and the predetermined reference frequency components. A correlation detection output is then generated that indicates whether or not a symbol synchronization was achieved. The disclosed embodiments are particularly useful for symbol correlation in received signals for power line communication (PLC) systems.
    • 公开了用于多载波通信系统中的符号相关的频域幅度归一化的方法和系统。 使用快速傅立叶变换(FFT)处理与从通信介质接收的输入信号相关联的数字采样以产生复频率分量。 每个复频分量相对于其振幅被归一化,并且将频域幅度归一化频率分量与用于参考符号的频率分量相乘以产生频域相关值。 分析这些频域相关值,以确定振幅归一化频率分量与预定参考频率分量之间是否存在相关性。 然后生成指示是否实现符号同步的相关检测输出。 所公开的实施例对于用于电力线通信(PLC)系统的接收信号中的符号相关性特别有用。
    • 10. 发明申请
    • Error correcting viterbi decoder
    • 纠正维特比解码器的错误
    • US20100011279A1
    • 2010-01-14
    • US12218183
    • 2008-07-11
    • Christopher J. BeckerKevin B. Traylor
    • Christopher J. BeckerKevin B. Traylor
    • H03M13/03G06F11/08
    • H04L1/0054H03M13/3738H03M13/3746H03M13/41H04L1/0052
    • Methods and corresponding systems in a Viterbi decoder include selecting an input symbol in an input block, wherein the input block has a plurality of input symbols, wherein each input symbol has a Boolean value, a quality value, and an associated stage, and wherein the selected symbol is selected based upon the quality value of the selected symbol relative to a quality value of other input symbols in the input block. Thereafter, the Boolean value of the selected symbol is complemented to produce a complemented symbol. The complemented symbol is substituted for the selected symbol to produce an alternate input block. A Viterbi algorithm is executed using the alternate input block to produce an alternate decoded bit sequence, which is then checked for errors using an error check. The alternate decoded bit sequence is output in response to the alternate decoded bit sequence passing the error check.
    • 维特比解码器中的方法和对应系统包括选择输入块中的输入符号,其中输入块具有多个输入符号,其中每个输入符号具有布尔值,质量值和相关级,并且其中 基于所选符号的质量值相对于输入块中的其他输入符号的质量值来选择所选择的符号。 此后,补充所选符号的布尔值以产生补码。 替代了所选符号以产生替代输入块。 使用替代输入块执行维特比算法来产生替代解码比特序列,然后使用错误检查来检查错误。 响应于通过错误检查的替代解码比特序列输出替代解码比特序列。