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    • 1. 发明授权
    • Successive approximation A/D converter
    • 连续近似A / D转换器
    • US08519874B2
    • 2013-08-27
    • US13186059
    • 2011-07-19
    • Kenta ArugaSuguru TachibanaSanroku TsukamotoKoji Okada
    • Kenta ArugaSuguru TachibanaSanroku TsukamotoKoji Okada
    • H03M1/10H03M1/14
    • H03M1/1038H03M1/1019H03M1/144H03M1/468H03M1/765H03M1/804
    • A successive approximation A/D converter, has a main DAC having a capacitive element group coupled to a top node and a switch group; a comparator comparing voltage of the top node with comparison reference voltage; a correction DAC generating correction voltage in accordance with a capacitance error of a capacitive element pair to be balanced in the main DAC, and supplying the correction voltage to the top node; and a control circuit generating internal digital input for controlling the switch group and a correction code for controlling the correction voltage, and outputting a successive approximation result by the comparator when the A/D conversion is performed. The control circuit measures a capacitance error of the capacitive element pair to be balanced, and determines an offset-removed capacitance error where an offset generated in the measurement is removed from the capacitance error.
    • 逐次逼近A / D转换器,具有耦合到顶部节点和开关组的电容元件组的主DAC; 比较上位节点电压和比较参考电压的比较器; 校正DAC根据要在主DAC中平衡的电容元件对的电容误差产生校正电压,并向顶部节点提供校正电压; 以及控制电路,产生用于控制开关组的内部数字输入和用于控制校正电压的校正码,并且当执行A / D转换时,通过比较器输出逐次逼近结果。 控制电路测量要平衡的电容元件对的电容误差,并确定偏移消除的电容误差,其中在测量中产生的偏移从电容误差中消除。
    • 2. 发明申请
    • SUCCESSIVE APPROXIMATION A/D CONVERTER
    • 连续逼近A / D转换器
    • US20120075128A1
    • 2012-03-29
    • US13186059
    • 2011-07-19
    • Kenta ARUGASuguru TachibanaSanroku TsukamotoKoji Okada
    • Kenta ARUGASuguru TachibanaSanroku TsukamotoKoji Okada
    • H03M1/12
    • H03M1/1038H03M1/1019H03M1/144H03M1/468H03M1/765H03M1/804
    • A successive approximation A/D converter, has a main DAC having a capacitive element group coupled to a top node and a switch group; a comparator comparing voltage of the top node with comparison reference voltage; a correction DAC generating correction voltage in accordance with a capacitance error of a capacitive element pair to be balanced in the main DAC, and supplying the correction voltage to the top node; and a control circuit generating internal digital input for controlling the switch group and a correction code for controlling the correction voltage, and outputting a successive approximation result by the comparator when the A/D conversion is performed. The control circuit measures a capacitance error of the capacitive element pair to be balanced, and determines an offset-removed capacitance error where an offset generated in the measurement is removed from the capacitance error.
    • 逐次逼近A / D转换器,具有耦合到顶部节点和开关组的电容元件组的主DAC; 比较上位节点电压和比较参考电压的比较器; 校正DAC根据要在主DAC中平衡的电容元件对的电容误差产生校正电压,并向顶部节点提供校正电压; 以及控制电路,产生用于控制开关组的内部数字输入和用于控制校正电压的校正码,并且当执行A / D转换时,通过比较器输出逐次逼近结果。 控制电路测量要平衡的电容元件对的电容误差,并确定偏移消除的电容误差,其中在测量中产生的偏移从电容误差中消除。
    • 5. 发明申请
    • COMPARISON CIRCUIT AND ANALOG-TO-DIGITAL CONVERSION DEVICE
    • 比较电路和模拟数字转换器件
    • US20120127007A1
    • 2012-05-24
    • US13364307
    • 2012-02-01
    • Takumi DanjoTakeshi TakayamaSanroku Tsukamoto
    • Takumi DanjoTakeshi TakayamaSanroku Tsukamoto
    • H03M1/12H03M1/00
    • H03K5/249H03M1/462
    • A comparison circuit includes: an input circuit includes a first transistor for receiving a first signal, and a second transistor for receiving a second signal; a first current route of which the electric current is controlled by the first transistor; a second current route of which the electric current is controlled by the second transistor; a latch for amplifying potential difference between the first current route and the second current route; a comparative operation control circuit including a first switch for executing or blocking supply voltage to the drain of the first transistor, a second switch for executing or blocking supply voltage to the drain of the second transistor, and a third switch for executing supply voltage to the first current route and the second current route; a comparative operation setting circuit for controlling supply or blocking of supply of the first switch, the second switch, and the third switch.
    • 比较电路包括:输入电路,包括用于接收第一信号的第一晶体管和用于接收第二信号的第二晶体管; 电流由第一晶体管控制的第一电流路径; 电流由第二晶体管控制的第二电流路径; 用于放大第一电流路径和第二电流路径之间的电位差的锁存器; 比较操作控制电路,包括用于执行或阻止对第一晶体管的漏极的电源电压的第一开关,用于执行或阻断对第二晶体管的漏极的电源电压的第二开关,以及用于向第二晶体管的漏极施加电源电压的第三开关 第一条当前路线和第二条当前路线; 用于控制第一开关,第二开关和第三开关的供给或阻塞的比较操作设置电路。
    • 6. 发明授权
    • Analog signal processing device
    • 模拟信号处理装置
    • US07898450B2
    • 2011-03-01
    • US12544948
    • 2009-08-20
    • Sanroku Tsukamoto
    • Sanroku Tsukamoto
    • H03M1/36
    • H03M1/1004H03M1/204H03M1/365
    • An analog signal processing device including a voltage selector selecting a given comparison reference voltage from plural comparison reference voltages, an arithmetic unit arithmetically processing the given comparison reference voltage and an analog input signal, a comparator which has at least one or more judgment points for the plural comparison reference voltages and to which an output of the arithmetic unit is inputted, and a coupling controller controlling connections between the arithmetic unit and the comparator, wherein the arithmetic unit comprises correctable first signal processors, and the number of the first signal processors is more than is necessary for the plural comparison reference voltages by M or larger, and when a set of N of first signal processors are in a correction operation, the coupling controller connects first signal processors which are not in the correction operation in the arithmetic unit to the comparator.
    • 一种模拟信号处理装置,包括从多个比较参考电压器中选择给定比较参考电压的电压选择器,对给定比较参考电压进行算术处理的运算单元和模拟输入信号,具有至少一个或多个判断点的比较器, 多个比较参考电压,并且输入运算单元的输出;以及耦合控制器,其控制运算单元和比较器之间的连接,其中运算单元包括可校正的第一信号处理器,并且第一信号处理器的数量更多 对于多个比较参考电压为M以上所必需的,并且当第一信号处理器的一组N处于校正操作中时,耦合控制器将不在运算单元中的校正操作中的第一信号处理器连接到 比较器。
    • 7. 发明申请
    • COMPARISON CIRCUIT AND ANALOG-TO-DIGITAL CONVERSION DEVICE
    • 比较电路和模拟数字转换器件
    • US20100245149A1
    • 2010-09-30
    • US12731055
    • 2010-03-24
    • Takumi DANJOTakeshi TakayamaSanroku Tsukamoto
    • Takumi DANJOTakeshi TakayamaSanroku Tsukamoto
    • H03M1/12H03K5/22
    • H03K5/249H03M1/462
    • A comparison circuit comprising: an input circuit includes a first transistor for receiving a first signal, and a second transistor for receiving a second signal; a first current route of which the electric current is controlled by the first transistor; a second current route of which the electric current is controlled by the second transistor; a latch for amplifying potential difference between the first current route and the second current route; a comparative operation control circuit including a first switch for executing or blocking supply voltage to the drain of the first transistor, a second switch for executing or blocking supply voltage to the drain of the second transistor, and a third switch for executing supply voltage to the first current route and the second current route; a comparative operation setting circuit for controlling supply or blocking of supply of the first switch, the second switch, and the third switch.
    • 一种比较电路,包括:输入电路,包括用于接收第一信号的第一晶体管和用于接收第二信号的第二晶体管; 电流由第一晶体管控制的第一电流路径; 电流由第二晶体管控制的第二电流路径; 用于放大第一电流路径和第二电流路径之间的电位差的锁存器; 比较操作控制电路,包括用于执行或阻止对第一晶体管的漏极的电源电压的第一开关,用于执行或阻断对第二晶体管的漏极的电源电压的第二开关,以及用于向第二晶体管的漏极施加电源电压的第三开关 第一条当前路线和第二条当前路线; 用于控制第一开关,第二开关和第三开关的供给或阻塞的比较操作设置电路。
    • 8. 发明授权
    • Semiconductor integrated circuit, threshold value setting method, and communication apparatus
    • 半导体集成电路,阈值设定方法和通信装置
    • US08373587B2
    • 2013-02-12
    • US13118737
    • 2011-05-31
    • Sanroku Tsukamoto
    • Sanroku Tsukamoto
    • H03M1/36
    • H03K3/356121H03M1/1061H03M1/361
    • A semiconductor integrated circuit includes first to N-th comparators to compare an input voltage with a threshold value; and a control circuit to perform first and second operations, set a threshold value of the first comparator as a first threshold value, and set a threshold value of an M-th comparator as a second threshold value, wherein the first operation includes an operation where a value obtained by multiplying a value obtained by subtracting the threshold value of the M-th comparator from a threshold value of an (M+1)th comparator by a real number is added to the threshold value of the M-th comparator, and wherein the second operation includes an operation where a value obtained by multiplying a value obtained by subtracting the threshold value of the M-th comparator from a threshold value of an (M−1)th comparator by a real number is added to the threshold value of the M-th comparator.
    • 半导体集成电路包括第一至第N比较器,用于将输入电压与阈值进行比较; 以及执行第一和第二操作的控制电路,将第一比较器的阈值设置为第一阈值,并将第M个比较器的阈值设置为第二阈值,其中第一操作包括以下操作: 将通过从第(M + 1)比较器的阈值减去实数得到的值乘以第M比较器的阈值而获得的值被加到第M比较器的阈值, 其中第二操作包括一个操作,其中通过将从第(M-1)个比较器的阈值减去实数得到的值乘以第M个比较器的阈值而获得的值加到阈值 的第M个比较器。
    • 9. 发明申请
    • DIGITAL ANALOG CONVERTER
    • 数字模拟转换器
    • US20100039303A1
    • 2010-02-18
    • US12539940
    • 2009-08-12
    • Sanroku Tsukamoto
    • Sanroku Tsukamoto
    • H03M1/66H03M1/12
    • H03M1/1061H03M1/468H03M1/68H03M1/804
    • A digital analog converter has an input terminal receiving a digital input signal, a lower-side capacitor group coupled to a lower-side common terminal in parallel, an upper-side capacitor group coupled, in parallel, to an upper-side common terminal at which an analog output signal is generated, a coupling capacitor provided between the lower-side common terminal and the upper-side common terminal, a switch group coupled to the upper-side capacitor group and the lower-side capacitor group and controlled as a conduction state and a non-conduction state in accordance with the digital input signal, and an adjusting capacitor coupled to the lower-side common terminal and having a variable capacitance value.
    • 数字模拟转换器具有接收数字输入信号的输入端子,并联耦合到下侧公共端子的下侧电容器组,并联耦合到上侧公共端子的上侧电容器组 产生模拟输出信号的耦合电容器,设置在下侧公共端子和上侧公共端子之间的耦合电容器,耦合到上侧电容器组和下侧电容器组的开关组,并被控制为导通 状态和根据数字输入信号的非导通状态,以及耦合到下侧公共端并具有可变电容值的调整电容器。
    • 10. 发明授权
    • Analog to digital converter with encoder circuit and testing method therefor
    • 具有编码器电路的模数转换器及其测试方法
    • US06703951B2
    • 2004-03-09
    • US09906797
    • 2001-07-18
    • Sanroku Tsukamoto
    • Sanroku Tsukamoto
    • H03M716
    • H03M1/0687H03M1/0809H03M1/1095H03M1/365H03M13/47
    • A high speed A/D converter includes a series of encoder sections for converting a thermometer code to a gray code and an error signal production section for detecting a babble error in the gray code and generating an error signal indicating such a babble error. An error correction section corrects babble errors in the gray code in response to the error signal. The corrected gray code is then converted to a binary code with a gray code to binary code converter. When the high speed A/D converter is incorporated in a semiconductor device, the A/D converter may be tested using a sampling clock having a phase which varies successively with respect to the input analog signal to sample the analog signal, and then evaluating the corresponding generated digital signal.
    • 高速A / D转换器包括用于将温度计代码转换为灰度代码的一系列编码器部分和用于检测灰度代码中的错误信号的误差信号产生部分,并产生指示这种混淆误差的误差信号。 误差校正部分根据误差信号校正灰度代码中的错误。 然后将经校正的灰度码转换为具有灰度码的二进制码到二进制码转换器。 当将高速A / D转换器并入半导体器件中时,可以使用具有相对于输入模拟信号连续变化的相位的采样时钟来测试A / D转换器,以对模拟信号进行采样,然后评估 相应产生的数字信号。