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1. 发明申请

US20180308663A1 PLASMA REACTOR WITH PHASE SHIFT APPLIED ACROSS ELECTRODE ARRAY 审中-公开
公开(公告)号：US20180308663A1
公开(公告)日：2018-10-25
申请号：US15960372
申请日：2018-04-23
申请人： Kenneth S. Collins , Kartik Ramaswamy , Yue Guo , Shahid Rauf , Kallol Bera , James D. Carducci , Michael R. Rice
发明人： Kenneth S. Collins , Kartik Ramaswamy , Yue Guo , Shahid Rauf , Kallol Bera , James D. Carducci , Michael R. Rice
IPC分类号： H01J37/32 , C23C16/455
CPC分类号： H01J37/32137 , C23C16/45536 , H01J37/32091 , H01J37/321 , H01J37/32449 , H01J37/32541 , H01J37/32568 , H01J37/32715 , H01J2237/3321 , H01J2237/3323 , H01J2237/334 , H01L21/67069 , H01L21/6831
摘要： A plasma reactor includes a chamber body having an interior space that provides a plasma chamber, a gas distributor to deliver a processing gas to the plasma chamber, a pump coupled to the plasma chamber to evacuate the chamber, a workpiece support to hold a workpiece, an intra-chamber electrode assembly including a plurality of filaments extending laterally through the plasma chamber between a ceiling of the plasma chamber and the workpiece support, each filament including a conductor surrounded by a cylindrical insulating shell, and an RF power source configured to apply a first RF signal to at least some of the plurality of filaments, to apply a second RF signal of equal frequency to at least some of the plurality of filaments, and to modulate a phase offset between the first RF signal and the second RF signal.

2. 发明申请

US20180374684A1 PROCESSING TOOL WITH ELECTRICALLY SWITCHED ELECTRODE ASSEMBLY 审中-公开
公开(公告)号：US20180374684A1
公开(公告)日：2018-12-27
申请号：US16015074
申请日：2018-06-21
申请人： Kenneth S. Collins , Kartik Ramaswamy , Shahid Rauf , Kallol Bera , James D. Carducci , Michael R. Rice , Yue Guo
发明人： Kenneth S. Collins , Kartik Ramaswamy , Shahid Rauf , Kallol Bera , James D. Carducci , Michael R. Rice , Yue Guo
IPC分类号： H01J37/32 , H01L21/02 , C23C16/455
摘要： A plasma reactor includes a chamber body having an interior space that provides a plasma chamber, a gas distributor, a pump coupled to the plasma chamber, a workpiece support to hold a workpiece, an intra-chamber electrode assembly comprising a plurality of filaments extending laterally through the plasma chamber, each filament including a conductor surrounded by a cylindrical insulating shell, the plurality of filaments including a first multiplicity of filaments and a second multiplicity of filaments arranged in an alternating pattern with the first multiplicity of filaments, a first bus coupled to the first multiplicity of filaments and a second bus coupled to the second multiplicity of filaments, an RF power source to apply RF signal the intra-chamber electrode assembly, and at least one RF switch configured to controllably electrically couple and decouple the first bus from one of i) ground, ii) the RF power source, or iii) the second bus.

3. 发明申请

US20180308667A1 PLASMA REACTOR WITH GROUPS OF ELECTRODES 审中-公开
公开(公告)号：US20180308667A1
公开(公告)日：2018-10-25
申请号：US15960342
申请日：2018-04-23
申请人： Kenneth S. Collins , Kartik Ramaswamy , Yue Guo , Shahid Rauf , Kallol Bera , James D. Carducci , Michael R. Rice
发明人： Kenneth S. Collins , Kartik Ramaswamy , Yue Guo , Shahid Rauf , Kallol Bera , James D. Carducci , Michael R. Rice
IPC分类号： H01J37/32 , C23C16/455
CPC分类号： H01J37/32568 , C23C16/45536 , C23C16/45544 , H01J37/32091 , H01J37/321 , H01J37/32449 , H01J37/32541 , H01J37/32715 , H01J2237/1825 , H01J2237/327 , H01J2237/3323 , H01J2237/3344 , H01L21/67069
摘要： A plasma reactor includes a chamber body having an interior space that provides a plasma chamber, a gas distributor to deliver a processing gas to the plasma chamber, a pump coupled to the plasma chamber to evacuate the chamber, a workpiece support to hold a workpiece, and an intra-chamber electrode assembly that includes a plurality of filaments extending laterally through the plasma chamber between a ceiling of the plasma chamber and the workpiece support. Each filament including a conductor surrounded by a cylindrical insulating shell. The plurality of filaments includes a first multiplicity of filaments and a second multiplicity of filaments arranged in an alternating pattern with the first multiplicity of filaments. An RF power source is configured to apply a first RF input signal to the first multiplicity of filaments.

4. 发明申请

US20180308664A1 PLASMA REACTOR WITH FILAMENTS AND RF POWER APPLIED AT MULTIPLE FREQUENCIES 审中-公开
公开(公告)号：US20180308664A1
公开(公告)日：2018-10-25
申请号：US15960382
申请日：2018-04-23
申请人： Kenneth S. Collins , Kartik Ramaswamy , Yue Guo , Shahid Rauf , Kallol Bera , James D. Carducci , Michael R. Rice
发明人： Kenneth S. Collins , Kartik Ramaswamy , Yue Guo , Shahid Rauf , Kallol Bera , James D. Carducci , Michael R. Rice
IPC分类号： H01J37/32 , C23C16/455
CPC分类号： H01J37/32183 , C23C16/4554 , H01J37/32091 , H01J37/321 , H01J37/32449 , H01J37/32541 , H01J37/32568 , H01J37/32715 , H01J2237/1825 , H01J2237/3321 , H01J2237/3323 , H01J2237/334 , H01L21/67069 , H01L21/6831
摘要： A plasma reactor includes a chamber body having an interior space that provides a plasma chamber, a gas distributor to deliver a processing gas to the plasma chamber, a pump coupled to the plasma chamber to evacuate the chamber, a workpiece support to hold a workpiece, and an intra-chamber electrode assembly including a plurality of filaments extending laterally through the plasma chamber between a ceiling of the plasma chamber and the workpiece support. At least one bus is electrically connected to a conductor of each filament. An RF power source is configured to apply a first RF signal of a first frequency to the plurality of filaments at a first location on at least one bus, and to apply a second RF signal of different second frequency to the plurality of filaments at a different second location on the at least one bus.

5. 发明申请

US20180277340A1 PLASMA REACTOR WITH ELECTRON BEAM OF SECONDARY ELECTRONS 审中-公开
公开(公告)号：US20180277340A1
公开(公告)日：2018-09-27
申请号：US15948949
申请日：2018-04-09
申请人： Yang Yang , Kartik Ramaswamy , Kenneth S. Collins , Steven Lane , Gonzalo Antonio Monroy , Lucy Chen , Yue Guo , Eswaranand Venkatasubramanian
发明人： Yang Yang , Kartik Ramaswamy , Kenneth S. Collins , Steven Lane , Gonzalo Antonio Monroy , Lucy Chen , Yue Guo , Eswaranand Venkatasubramanian
IPC分类号： H01J37/32 , H01L21/02
CPC分类号： H01J37/32568 , C23C16/26 , C23C16/5096 , H01J37/32183 , H01J37/3244 , H01J37/32669 , H01J37/32715 , H01J2237/332 , H01J2237/334 , H01L21/02115 , H01L21/02274 , H01L21/0234 , H01L21/02351
摘要： An electron beam plasma reactor includes a plasma chamber having a side wall, an upper electrode, a workpiece support to hold a workpiece facing the upper electrode with the workpiece on the support having a clear view of the upper electrode, a first RF power source coupled to said upper electrode, a gas supply, a vacuum pump coupled to the chamber to evacuate the chamber, and a controller. The controller is configured to operate the first RF power source to apply an RF power to upper electrode, and to operate the gas distributor and vacuum pump, so as to create a plasma in an upper portion of the chamber that generates an electron beam from the upper electrode toward the workpiece and a lower electron-temperature plasma in a lower portion of the chamber including the workpiece.

6. 发明申请

US20130069126A1 GERMANIUM-BASED NMOS DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：基于锗的NMOS器件及其制造方法
公开(公告)号：US20130069126A1
公开(公告)日：2013-03-21
申请号：US13519857
申请日：2012-02-21
申请人： Ru Huang , Zhiqiang Li , Xia An , Yue Guo , Xing Zhang
发明人： Ru Huang , Zhiqiang Li , Xia An , Yue Guo , Xing Zhang
IPC分类号： H01L29/78 , H01L21/283
CPC分类号： H01L29/41783 , H01L29/0895 , H01L29/517 , H01L29/66643 , H01L29/78
摘要： An embodiment of the invention provides a germanium-based NMOS device and a method for fabricating the same, which relates to fabrication process technology of an ultra-large-scale-integrated (ULSI) circuit. The germanium-based NMOS device has two dielectric layer interposed between a metal source/drain and a substrate. The bottom dielectric layer includes a dielectric material having a high pinning coefficient S such as hafnium oxide, silicon nitride, hafnium silicon oxide or the like, and the top dielectric layer includes a dielectric material having a low conduction band offset ΔEC such as titanium oxide, gallium oxide, strontium titanium oxide or the like. According to the method, Fermi level pinning effect can be alleviated, electron barrier height can be lowered, and thus performance of the germanium-based Schottky NMOS device can be improved. Compared with a conventional single dielectric layer such as aluminum oxide (Al2O3), Schottky barrier height can be lowered while low source/drain resistances can be maintained, and thus performance of the device can be significantly improved.
摘要翻译：本发明的实施例提供了一种基于锗的NMOS器件及其制造方法，涉及超大规模集成（ULSI）电路的制造工艺技术。锗基NMOS器件具有介于金属源极/漏极和衬底之间的两个介电层。底部电介质层包括具有高钉扎系数S的介电材料，例如氧化铪，氮化硅，氧化铪等，并且顶部电介质层包括具有低导带偏移＆Dgr; EC的介电材料，例如钛氧化物，氧化镓，氧化钛锶等。根据该方法，可以减轻费米能级钉扎效应，降低电子势垒高度，从而提高锗基肖特基NMOS器件的性能。与常规的单一电介质层如氧化铝（Al2O3）相比，可以降低肖特基势垒高度，同时保持低的源极/漏极电阻，从而显着提高器件的性能。

7. 发明授权

US08541847B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08541847B2
公开(公告)日：2013-09-24
申请号：US13201618
申请日：2010-09-25
申请人： Xia An , Yue Guo , Quanxin Yun , Ru Huang , Xing Zhang
发明人： Xia An , Yue Guo , Quanxin Yun , Ru Huang , Xing Zhang
IPC分类号： H01L27/088 , H01L21/336
CPC分类号： H01L21/26506 , H01L21/26513 , H01L21/823807 , H01L29/16 , H01L29/6659 , H01L29/7833 , H01L29/7848
摘要： The present invention provides a semiconductor device and a method for fabricating the same, wherein the method comprises: providing a germanium-based semiconductor substrate having a plurality of active regions and device isolation regions between the plurality of the active regions, wherein a gate dielectric layer and a gate over the gate dielectric layer are provided on the active regions, and the active regions include source and drain extension regions and deep source and drain regions; performing a first ion implantation process with respect to the source and drain extension regions, wherein the ions implanted in the first ion implantation process include silicon or carbon; performing a second ion implantation process with respect to the source and drain extension regions; performing a third ion implantation process with respect to the deep source and drain regions; performing an annealing process with respect to the germanium-based semiconductor substrate which has been subjected to the third ion implantation process. According to the method for fabricating a semiconductor device, through the implantation of silicon impurities, appropriate stress may be introduced into the germanium channel effectively by the mismatch of lattices in the source and drain regions, so that the mobility of electrons in the channel is enhanced and the performance of the device is improved.
摘要翻译：本发明提供一种半导体器件及其制造方法，其中该方法包括：在多个有源区之间提供具有多个有源区和器件隔离区的锗基半导体衬底，其中栅介电层并且栅极电介质层上的栅极设置在有源区上，有源区包括源极和漏极延伸区以及深的源极和漏极区; 对源极和漏极延伸区域执行第一离子注入工艺，其中在第一离子注入工艺中注入的离子包括硅或碳; 对源极和漏极延伸区域执行第二离子注入工艺; 相对于深源极和漏极区域执行第三离子注入工艺; 对已进行第三离子注入工艺的锗基半导体衬底进行退火处理。根据制造半导体器件的方法，通过硅杂质的注入，可以通过源极和漏极区域中的晶格失配有效地将合适的应力引入锗通道中，使得通道中电子的迁移率增强并提高了设备的性能。

8. 发明申请

US20120289004A1 FABRICATION METHOD OF GERMANIUM-BASED N-TYPE SCHOTTKY FIELD EFFECT TRANSISTOR 审中-公开
标题翻译：基于锗的N型肖特基效应晶体管的制造方法
公开(公告)号：US20120289004A1
公开(公告)日：2012-11-15
申请号：US13390755
申请日：2011-10-14
申请人： Ru Huang , Zhiqiang Li , Yue Guo , Xia An , Quanxin Yun , Yinglong Huang , Xing Zhang
发明人： Ru Huang , Zhiqiang Li , Yue Guo , Xia An , Quanxin Yun , Yinglong Huang , Xing Zhang
IPC分类号： H01L21/336
CPC分类号： H01L29/0895 , H01L29/41783 , H01L29/517 , H01L29/66643 , H01L29/78
摘要： The present invention discloses a fabrication method of a Ge-based N-type Schottky field effect transistor and relates to a filed of ultra-large-scaled integrated circuit fabrication process. The present invention forms a thin high K dielectric layer between a substrate and a metal source/drain. The thin layer on one hand may block the electron wave function of metal from inducing an MIGS interface state in the semiconductor forbidden band, on the other hand may passivate the dangling bonds at the interface of Ge. Meanwhile, since the insulating dielectric layer has a very thin thickness, and electrons can substantially pass freely, the parasitic resistances of the source and the drain are not significantly increased. The method can weaken the Fermi level pinning effect, cause the Fermi energy level close to the position of the conduction band of Ge and lower the electron barrier, thereby increasing the current switching ratio of the Ge-based Schottky transistor and improve the performance of the NMOS device.
摘要翻译：本发明公开了一种Ge系N型肖特基场效应晶体管的制造方法，涉及超大规模集成电路制造工艺。本发明在衬底和金属源极/漏极之间形成薄的高K电介质层。薄层一方面可能阻止金属的电子波函数在半导体禁带中引起MIGS界面态，另一方面可能会钝化Ge界面处的悬挂键。同时，由于绝缘介电层具有非常薄的厚度，并且电子可以基本上自由地通过，所以源极和漏极的寄生电阻不会显着增加。该方法可以削弱费米能级钉扎效应，使费米能级接近Ge导带的位置，降低电子势垒，从而提高Ge基肖特基晶体管的电流开关比，提高Ge NMOS器件。

9. 发明申请

US20120264311A1 SURFACE TREATMENT METHOD FOR GERMANIUM BASED DEVICE 审中-公开
标题翻译：用于基于锗的器件的表面处理方法
公开(公告)号：US20120264311A1
公开(公告)日：2012-10-18
申请号：US13318644
申请日：2011-04-08
申请人： Xia An , Yue Guo , Runsheng Wang , Ru Huang , Xing Zhang
发明人： Xia An , Yue Guo , Runsheng Wang , Ru Huang , Xing Zhang
IPC分类号： C23G1/02 , C09K15/02 , H01L21/31 , B08B3/08
CPC分类号： C23C22/34 , C23C22/73 , H01L21/02052 , H01L21/02057 , H01L21/28255 , H01L21/28512 , H01L21/28518 , H01L21/306 , H01L23/291 , H01L23/3171 , H01L29/16 , H01L29/45 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a surface treatment method for germanium based device. Through performing surface pretreatment to the germanium based device by using an aqueous solution of ammonium fluoride as a passivant, the interface state may be reduced, the formation of natural oxidation layer at the germanium surface may be inhibited, the regeneration of natural oxidation layer and the out-diffusion of the germanium based substrate material can be effectively inhibited, and the thermal stability of the metal germanide may also be increased significantly, so that the interface quality of the germanium based device is improved easily and effectively, which are advantageous to improve the performance of the germanium based transistor.
摘要翻译：本发明提供了一种用于锗基装置的表面处理方法。通过使用氟化铵水溶液作为钝化剂，对锗系器件进行表面预处理，可以降低界面状态，抑制锗表面的天然氧化层的形成，天然氧化层的再生和可以有效地抑制基于锗的基底材料的扩散，并且还可以显着提高锗的金属锗的热稳定性，从而容易且有效地改善锗基器件的界面质量，这有利于改善锗锗基晶体管的性能。

10. 发明申请

US20120187495A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120187495A1
公开(公告)日：2012-07-26
申请号：US13201618
申请日：2010-09-25
申请人： Xia An , Yue Guo , Quanxin Yun , Ru Huang , Xing Zhang
发明人： Xia An , Yue Guo , Quanxin Yun , Ru Huang , Xing Zhang
IPC分类号： H01L27/088 , H01L21/336
CPC分类号： H01L21/26506 , H01L21/26513 , H01L21/823807 , H01L29/16 , H01L29/6659 , H01L29/7833 , H01L29/7848
摘要： The present invention provides a semiconductor device and a method for fabricating the same, wherein the method comprises: providing a germanium-based semiconductor substrate having a plurality of active regions and device isolation regions between the plurality of the active regions, wherein a gate dielectric layer and a gate over the gate dielectric layer are provided on the active regions, and the active regions include source and drain extension regions and deep source and drain regions; performing a first ion implantation process with respect to the source and drain extension regions, wherein the ions implanted in the first ion implantation process include silicon or carbon; performing a second ion implantation process with respect to the source and drain extension regions; performing a third ion implantation process with respect to the deep source and drain regions; performing an annealing process with respect to the germanium-based semiconductor substrate which has been subjected to the third ion implantation process. According to the method for fabricating a semiconductor device, through the implantation of silicon impurities, appropriate stress may be introduced into the germanium channel effectively by the mismatch of lattices in the source and drain regions, so that the mobility of electrons in the channel is enhanced and the performance of the device is improved.
摘要翻译：本发明提供了一种半导体器件及其制造方法，其中该方法包括：在多个有源区之间提供具有多个有源区和器件隔离区的锗基半导体衬底，其中栅介电层并且栅极电介质层上的栅极设置在有源区上，有源区包括源极和漏极延伸区以及深的源极和漏极区; 对源极和漏极延伸区域执行第一离子注入工艺，其中在第一离子注入工艺中注入的离子包括硅或碳; 对源极和漏极延伸区域执行第二离子注入工艺; 相对于深源极和漏极区域执行第三离子注入工艺; 对已进行第三离子注入工艺的锗基半导体衬底进行退火处理。根据制造半导体器件的方法，通过硅杂质的注入，可以通过栅极和漏极区域中的晶格失配有效地将适当的应力引入锗通道中，使得沟道中电子的迁移率增强并提高了设备的性能。

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