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1. 发明申请

US20090249363A1 HOLDOFF ALGORITHM FOR NO DEAD TIME ACQUISITION 失效
标题翻译：没有死亡时间获取的持有人算法
公开(公告)号：US20090249363A1
公开(公告)日：2009-10-01
申请号：US12056159
申请日：2008-03-26
申请人： Kenneth P. DOBYNS , Roy I. SIEGEL , Kristie L. VEITH
发明人： Kenneth P. DOBYNS , Roy I. SIEGEL , Kristie L. VEITH
IPC分类号： G06F3/00
CPC分类号： G01R13/0263
摘要： An improved hold-off algorithm that assures that all data associated with all trigger events in a data signal are displayed uses a designated interval starting with a first trigger event to determine whether any subsequent trigger events occurred within the designated interval. A first display frame is drawn based upon the first trigger event. A next display frame is drawn based either on a next trigger event that occurs outside the designated interval, or based on the last trigger event that occurred within the designated interval. In the latter case the two display frames provide an overlap to assure that no data related to the trigger events is lost on the display.
摘要翻译：确保显示与数据信号中的所有触发事件相关联的所有数据的改进的保留算法使用从第一触发事件开始的指定间隔来确定在指定间隔内是否发生任何后续触发事件。基于第一触发事件绘制第一显示帧。基于在指定间隔之外发生的下一个触发事件，或者基于在指定间隔内发生的最后一个触发事件来绘制下一个显示帧。在后一种情况下，两个显示帧提供重叠，以确保在显示器上没有与触发事件有关的数据丢失。

2. 发明申请

US20110071795A1 Test and Measurement Instrument Using Combined Signals 审中-公开
标题翻译：使用组合信号的测试和测量仪器
公开(公告)号：US20110071795A1
公开(公告)日：2011-03-24
申请号：US12564800
申请日：2009-09-22
申请人： Kenneth P. DOBYNS , Kristie L. VEITH , Terrance R. BEALE
发明人： Kenneth P. DOBYNS , Kristie L. VEITH , Terrance R. BEALE
IPC分类号： G06F15/00
CPC分类号： G01D5/244
摘要： A test and measurement instrument including a plurality of digitizers, each digitizer configured to digitize an input signal to generate a digitized signal; a signal processor configured to combine at least two of the digitized signals from the digitizers into a combined signal; and a circuit configured to receive the combined signal.
摘要翻译：一种包括多个数字化仪的测试和测量仪器，每个数字转换器被配置为数字化输入信号以产生数字化信号; 信号处理器，被配置为将来自数字化仪的数字化信号中的至少两个组合成组合信号; 以及被配置为接收组合信号的电路。

3. 发明申请

US20090228226A1 PRETRIGGER AND POST-TRIGGER ACQUISITION FOR NO DEAD TIME ACQUISITION SYSTEM 失效
标题翻译：没有死亡时间采集系统的预付款和后期追踪收购
公开(公告)号：US20090228226A1
公开(公告)日：2009-09-10
申请号：US12042271
申请日：2008-03-04
申请人： Kenneth P. DOBYNS , Kristie L. VEITH
发明人： Kenneth P. DOBYNS , Kristie L. VEITH
IPC分类号： G01R13/02
CPC分类号： G01R13/0272
摘要： Pre-trigger and post-trigger acquisition for a no dead time acquisition system, where the data being displayed does not include a related trigger event, has a variable record length buffer having a maximum record length equal to a maximum desired pre-trigger interval, and has a trigger FIFO and timer for delaying the related trigger event. The record length of the buffer is determined by the desired pre-trigger interval, and fast rasterizers access the oldest data that encompasses the desired pre-trigger data. A first trigger event in the trigger signal may be delayed by a desired post-trigger interval before the fast rasterizers begin drawing the waveform data that encompasses the desired post-trigger data.
摘要翻译：对于无死区时间采集系统的预触发和后触发采集，其中显示的数据不包括相关触发事件，具有等于最大期望预触发间隔的最大记录长度的可变记录长度缓冲器，并具有用于延迟相关触发事件的触发FIFO和定时器。缓冲器的记录长度由所需的预触发间隔确定，快速光栅化器访问包含所需预触发数据的最旧数据。在快速光栅化器开始绘制包含期望的后触发数据的波形数据之前，触发信号中的第一触发事件可被延迟期望的后触发间隔。

4. 发明申请

US20130317776A1 TIME-DOMAIN DENSITY TRIGGERING IN A TEST AND MEASUREMENT INSTRUMENT 审中-公开
标题翻译：测试和测量仪器中的时域密度触发
公开(公告)号：US20130317776A1
公开(公告)日：2013-11-28
申请号：US13480294
申请日：2012-05-24
申请人： Kenneth P. DOBYNS , Kristie L. VEITH
发明人： Kenneth P. DOBYNS , Kristie L. VEITH
IPC分类号： G06F15/00 , G01N9/00
CPC分类号： G01R13/0254
摘要： A test and measurement instrument according to an embodiment of the present invention converts digital data that represents an analog input signal into a time-domain bitmap, and then compares a region of that time-domain bitmap to a density threshold. When the density value violates the density threshold, a trigger signal is generated that causes digital data to be stored into a memory.
摘要翻译：根据本发明实施例的测试和测量仪器将表示模拟输入信号的数字数据转换为时域位图，然后将该时域位图的区域与密度阈值进行比较。当密度值违反密度阈值时，会产生触发信号，使数字数据存储到存储器中。

5. 发明申请

US20090261814A1 DRAWING WAVEFORMS IN NO DEAD TIME ACQUISITION SYSTEM 失效
标题翻译：在没有死亡时间采集系统的情况下绘制波形
公开(公告)号：US20090261814A1
公开(公告)日：2009-10-22
申请号：US12104563
申请日：2008-04-17
申请人： Kenneth P. DOBYNS , Steven K. SULLIVAN , Roy I. SIEGEL
发明人： Kenneth P. DOBYNS , Steven K. SULLIVAN , Roy I. SIEGEL
IPC分类号： G01R13/20
CPC分类号： G01R13/0254
摘要： A method of drawing a waveform image in a no dead time acquisition system, where consecutive drawing frames overlap, uses a master/slave relationship between two fast rasterizers. The master rasterizer draws a first display frame in response to a first trigger event in a trigger signal derived from an input signal. The slave rasterizer draws a second display frame in response to a subsequent trigger event in the trigger signal. The portion of the second display frame that duplicates data contained in the first display frame is either (a) suppressed when the first and second display frames are combined to form the waveform image or (b) displayed in a different shade/color. Alternatively the first display frame may be compressed by 50% to form a first portion of the waveform image and the non-duplicative portion of the second display frame is compressed by 50% to form a second portion of the waveform image, the first and second portions being drawn contiguously when the first and second display frames are combined to form the waveform image.
摘要翻译：在连续绘制帧重叠的无死区时间采集系统中绘制波形图像的方法使用两个快速光栅化器之间的主/从关系。主光栅化器响应于从输入信号导出的触发信号中的第一触发事件来绘制第一显示帧。从光栅化器响应于触发信号中的后续触发事件而绘制第二显示帧。复制第一显示帧中包含的数据的第二显示帧的部分是（a）当第一和第二显示帧被组合以形成波形图像时抑制（a），或（b）以不同的阴影/颜色显示。或者，第一显示帧可以被压缩50％以形成波形图像的第一部分，并且第二显示帧的非重复部分被压缩50％以形成波形图像的第二部分，第一和第二当第一和第二显示帧被组合以形成波形图像时，被连续地绘制的部分。

6. 发明申请

US20110066402A1 MIXED SIGNAL ACQUISITION SYSTEM FOR A MEASUREMENT INSTRUMENT 有权
标题翻译：用于测量仪器的混合信号采集系统
公开(公告)号：US20110066402A1
公开(公告)日：2011-03-17
申请号：US12561908
申请日：2009-09-17
申请人： Kenneth P. DOBYNS
发明人： Kenneth P. DOBYNS
IPC分类号： G06F17/40
CPC分类号： G01R31/3167
摘要： A mixed signal acquisition system for a test and measurement instrument allows configuring of the number of analog and digital channels in use. The instrument includes an analog input interface and an N-channel logic input interface for receiving an analog signal and an N-channel logic signal, respectively. An ND converter converts the analog input signal into an N-bit digital signal, and N latch circuits latch the N-bit logic signal. A multiplexer selects either the N-bit digital signal from the A/D converter, or the N-bit logic signals from the N latch circuits, and the selected signal at the output of the multiplexer is stored in an acquisition memory. By controlling the multiplexer selection, the number of analog channels and the digital channels can be controlled.
摘要翻译：用于测试和测量仪器的混合信号采集系统允许配置正在使用的模拟和数字通道的数量。仪器包括模拟输入接口和N通道逻辑输入接口，用于分别接收模拟信号和N通道逻辑信号。 ND转换器将模拟输入信号转换为N位数字信号，N个锁存电路锁存N位逻辑信号。多路复用器选择来自A / D转换器的N位数字信号或来自N个锁存电路的N位逻辑信号，并且在多路复用器的输出处选择的信号被存储在采集存储器中。通过控制复用器选择，可以控制模拟通道和数字通道的数量。

7. 发明申请

US20130044112A1 APPARATUS AND METHOD FOR PROVIDING FREQUENCY DOMAIN DISPLAY WITH VISUAL INDICATION OF FFT WINDOW SHAPE 有权
标题翻译： FFT窗口形状可视化提供频域显示的装置和方法
公开(公告)号：US20130044112A1
公开(公告)日：2013-02-21
申请号：US13411328
申请日：2012-03-02
申请人： Gary J. WALDO , Kenneth P. DOBYNS
发明人： Gary J. WALDO , Kenneth P. DOBYNS
IPC分类号： G06T11/20
CPC分类号： G01R13/0236 , G01R13/029
摘要： A test and measurement instrument includes a display having a time domain graticule and a frequency domain graticule. A processor is configured to process an input signal to generate a time domain waveform for display in the time domain graticule, the input signal being correlated to a time base. The processor is also configured to process a second input signal and generate a frequency domain waveform for display in the frequency domain graticule, the second input signal being correlated to the same time base. The frequency domain waveform is correlated to a selected time period of the time base. The processor is also configured to generate a spectrum time indicator configured to graphically illustrate a transform parameter, a location and the selected time period in the time domain graticule with respect to the frequency domain waveform.
摘要翻译：测试和测量仪器包括具有时域刻度和频域刻度的显示器。处理器被配置为处理输入信号以产生用于在时域刻度中显示的时域波形，该输入信号与时基相关。处理器还被配置为处理第二输入信号并产生用于在频域刻度中显示的频域波形，第二输入信号与相同的时基相关。频域波形与时基的选定时间段相关。处理器还被配置为生成频谱时间指示器，其被配置为以图形方式示出相对于频域波形的时域刻度中的变换参数，位置和所选择的时间段。

8. 发明申请

US20120041701A1 TIME-DOMAIN TRIGGERING IN A TEST AND MEASUREMENT INSTRUMENT 有权
标题翻译：测试和测量仪器中的时域触发
公开(公告)号：US20120041701A1
公开(公告)日：2012-02-16
申请号：US12856472
申请日：2010-08-13
申请人： Alfred K. HILLMAN, JR. , Marcus K. DA SILVA , Kathryn A.. ENGHOLM , Kenneth P. DOBYNS
发明人： Alfred K. HILLMAN, JR. , Marcus K. DA SILVA , Kathryn A.. ENGHOLM , Kenneth P. DOBYNS
IPC分类号： G01R13/02 , H03K5/153 , G06F19/00
CPC分类号： G01R13/0254 , G01R23/16
摘要： Embodiments of this invention provide enhanced triggering capabilities such as frequency and phase triggering in a test and measurement instrument, such as a Real-Time Spectrum Analyzer (RTSA) or oscilloscope. A test and measurement instrument can include input terminals to receive RF signals, an ADC to digitize the RF signals, a digital downconverter to produce I and Q baseband component information, and a power detector to determine a power level using the I and Q information. A comparator compares the power level received from the power detector with a user-definable power threshold, and produces a logic signal for enabling one or more phase or frequency demodulators. The one or more demodulators produce IQ-based time-domain traces derived from the I and Q component information when the power level determined by the power detector exceeds the power threshold. Trigger circuitry is configured to trigger on an event responsive to a delayed trigger enable signal.
摘要翻译：本发明的实施例提供了诸如实时频谱分析仪（RTSA）或示波器之类的测试和测量仪器中的增强的触发能力，例如频率和相位触发。测试和测量仪器可以包括用于接收RF信号的输入端子，用于数字化RF信号的ADC，用于产生I和Q基带分量信息的数字下变频器，以及使用I和Q信息来确定功率电平的功率检测器。比较器将从功率检测器接收的功率电平与用户可定义的功率阈值进行比较，并产生用于启用一个或多个相位或频率解调器的逻辑信号。当由功率检测器确定的功率电平超过功率阈值时，一个或多个解调器产生从I和Q分量信息导出的基于IQ的时域轨迹。触发电路被配置为在响应于延迟的触发使能信号的事件上触发。

9. 发明申请

US20120038369A1 TIME-DOMAIN MEASUREMENTS IN A TEST AND MEASUREMENT INSTRUMENT 有权
标题翻译：测试和测量仪器中的时域测量
公开(公告)号：US20120038369A1
公开(公告)日：2012-02-16
申请号：US12856483
申请日：2010-08-13
申请人： Kenneth P. DOBYNS , Gary J. WALDO
发明人： Kenneth P. DOBYNS , Gary J. WALDO
IPC分类号： G01R27/28
CPC分类号： G01R13/0218
摘要： A test and measurement instrument and method for receiving a radio frequency (RF) signal, digitizing the RF signal using an analog-to-digital converter, downconverting the digitized signal to produce I (in-phase) and Q (quadrature) baseband component information, generating one or more IQ-based time-domain traces using the I and Q baseband component information, and measuring and displaying a variety of measurement values of the IQ-based time-domain traces. The IQ-based time-domain measurement values can be automatically generated and displayed, and/or transmitted to an external device.
摘要翻译：一种用于接收射频（RF）信号的测试和测量仪器和方法，使用模数转换器数字化RF信号，对数字化信号进行下变频以产生I（同相）和Q（正交）基带分量信息，使用I和Q基带分量信息生成一个或多个基于IQ的时域跟踪，以及测量和显示基于IQ的时域轨迹的各种测量值。基于IQ的时域测量值可以自动生成和显示，和/或传输到外部设备。

10. 发明申请

US20120078557A1 MULTI-DOMAIN TEST AND MEASUREMENT INSTRUMENT 有权
标题翻译：多域测试和测量仪器
公开(公告)号：US20120078557A1
公开(公告)日：2012-03-29
申请号：US12892774
申请日：2010-09-28
申请人： Kenneth P. DOBYNS
发明人： Kenneth P. DOBYNS
IPC分类号： G06F19/00
CPC分类号： G01R13/0236 , G01R13/0272 , G01R23/16
摘要： A test and measurement instrument including an input port configured to receive an input signal; a digitizer configured to digitize the input signal; a decimator coupled to the digitizer and configured to decimate the digitized input signal to generate a decimated input signal; a digital downconverter coupled to the digitizer and configured to frequency shift the digitized input signal to generate a frequency shifted input signal; and a memory configured to store the decimated input signal and the frequency shifted input signal.
摘要翻译：一种测试和测量仪器，包括被配置为接收输入信号的输入端口; 配置为数字化输入信号的数字转换器; 一个抽取器，耦合到数字转换器并被配置为抽取数字化的输入信号以产生抽取的输入信号; 数字下变频器，耦合到所述数字转换器，并且被配置为对所述数字化输入信号进行频移，以产生频移输入信号; 以及被配置为存储抽取的输入信号和频移输入信号的存储器。

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