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1. 发明授权

US5426566A Multichip integrated circuit packages and systems 失效
标题翻译：多芯片集成电路封装和系统
公开(公告)号：US5426566A
公开(公告)日：1995-06-20
申请号：US826
申请日：1993-01-04
申请人： Kenneth E. Beilstein, Jr. , Claude L. Bertin , Howard L. Kalter , Gordon A. Kelley, Jr. , Christopher P. Miller , Dale E. Pontius , Willem B. van der Hoeven , Steven Platt
发明人： Kenneth E. Beilstein, Jr. , Claude L. Bertin , Howard L. Kalter , Gordon A. Kelley, Jr. , Christopher P. Miller , Dale E. Pontius , Willem B. van der Hoeven , Steven Platt
IPC分类号： H01L23/52 , H01L25/065 , H05K7/00
CPC分类号： H01L25/0657 , H01L25/0652 , H01L2225/06524 , H01L2225/06527 , H01L2225/06551 , H01L2225/06555 , H01L2225/06596 , H01L2924/0002 , H01L2924/16195
摘要： Multichip integrated circuit packages and systems of multichip packages having reduced interconnecting lead lengths are disclosed. The multichip package includes a multiplicity of semiconductor chip layers laminated together in a unitized module. A first metallization pattern is connected to the integrated circuit chips on at least one side surface of the unitized module. In addition, at least one end surface of the module contains a second metallization pattern which is configured to facilitate connection of the package to an external signal source, such as another multichip package. The system includes at least two such packages which are electrically coupled via either metallization patterns provided on the end surface of the packagers. If required, a plurality of multichip packages can be directly coupled into the system in an analogous manner. Further specific details of the multichip package and the system of multichip packages are set forth herein.
摘要翻译：公开了具有减小的互连引线长度的多芯片集成电路封装和多芯片封装的系统。多芯片封装包括在单元化模块中层叠在一起的多个半导体芯片层。第一金属化图案在集成模块的至少一个侧表面上连接到集成电路芯片。此外，模块的至少一个端面包含第二金属化图案，其被配置为便于将封装件连接到诸如另一多芯片封装的外部信号源。该系统包括至少两个这样的包装，其经由设置在包装机的端面上的金属化图案电耦合。如果需要，可以以类似的方式将多个多芯片封装直接耦合到系统中。本文阐述了多芯片封装和多芯片封装系统的进一步具体细节。

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