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1. 发明申请

US20060285551A1 STM-1 TO STM-64 SDH/SONET FRAMER WITH DATA MULTIPLEXING FROM A SERIES OF CONFIGURABLE I/O PORTS 有权
标题翻译： STM-1到STM-64 SDH / SONET框架，具有从一系列可配置I / O端口进行数据多路复用
公开(公告)号：US20060285551A1
公开(公告)日：2006-12-21
申请号：US11467848
申请日：2006-08-28
申请人： Kenneth Barker , Rolf Clauberg , Jean Calvignac , Andreas Herkersdorf , Fabrice Verplanken , David Webb
发明人： Kenneth Barker , Rolf Clauberg , Jean Calvignac , Andreas Herkersdorf , Fabrice Verplanken , David Webb
IPC分类号： H04J3/22
CPC分类号： H04J3/1611 , H04J3/0685 , H04J3/22 , H04J2203/0089
摘要： The present invention relates to a device for combining at least two data signals having an input data rate into a single data stream having an output data rate being higher than the input data rate for transmission on a shared medium or vice versa, particularly, to a single SDH/SONET framer capable of handling a large range of SDH/SONET frames from STM-i to STM-j with an aggregated total capacity corresponding to an STM-j frame where i and j are integers in the range from 1 to 64 or higher according to the STM-N definition of the SDH/SONET standards. More over, the present invention can also be extended to work with STS-1 as lowest range. STS-1 exists in SONET only not SDH and corresponds to a data rate of 51.5 Mb/s a third of the 156 Mb/s of STM-1. The device according to the present invention comprises at least two ports for receiving and/or sending said at least two data signals, a port snning unit for extracting data from the data signals received by said ports and/or synthesizing data to be transmitted via the ports, respectively, whereby said port scanning unit is configured to extract data from ports providing data streams having at least two different input data rates and/or to synthesize data to be transmitted via the ports taking data streams having at least two different data rates.
摘要翻译：本发明涉及一种用于将具有输入数据速率的至少两个数据信号组合成具有高于用于在共享介质上传输的输入数据速率的输出数据速率的单个数据流的装置，反之亦然，特别涉及一种单个SDH / SONET成帧器能够处理从STM-i到STM-j的大范围的SDH / SONET帧，具有对应于STM-j帧的聚合总容量，其中i和j是从1到64的整数或根据SDH / SONET标准的STM-N定义更高。更进一步地，本发明也可以扩展到使用STS-1作为最低范围。 STS-1仅存在于SONET中而不是SDH，对应于156Mb / s的STM-1的三分之一的51.5Mb / s的数据速率。根据本发明的装置包括用于接收和/或发送所述至少两个数据信号的至少两个端口，用于从由所述端口接收的数据信号中提取数据和/或合成要通过所述端口发送的数据的端口捕捉单元其中所述端口扫描单元被配置为从提供具有至少两个不同输入数据速率的数据流的端口提取数据和/或合成要通过端口发送的数据，该数据流具有至少两个不同数据速率的数据流。

2. 发明申请

US20060074519A1 Medication accuracy comparison system 审中-公开
标题翻译：药物准确度比较系统
公开(公告)号：US20060074519A1
公开(公告)日：2006-04-06
申请号：US11207646
申请日：2005-08-19
申请人： Kenneth Barker , Elizabeth Flynn
发明人： Kenneth Barker , Elizabeth Flynn
IPC分类号： G06F7/00
CPC分类号： G16H40/20 , G06F19/3456
摘要： The medication administration accuracy of a number of hospitals is compared and reports are produced. Data is received from each of the reporting hospitals including dosage error information and matching characteristics on which the hospitals can be compared. The received data is merged to provide a medication accuracy comparison database, and comparison groups are established based on a predetermined characteristic of each hospital. An accuracy rate is calculated for each hospital, and a report is produced comparing the medication administration accuracy of each reporting hospital with other hospitals in the associated comparison group.
摘要翻译：对多家医院的药物治疗准确性进行比较和报告。从每个报告医院收到数据，包括可以比较医院的剂量误差信息和匹配特征。收集的数据被合并以提供药物准确度比较数据库，并且基于每个医院的预定特征建立比较组。计算每个医院的准确率，并将每个报告医院的药物管理准确率与相关比较组中的其他医院进行比较。

3. 发明申请

US20050042583A1 Flipbook for making words according to orthographic patterns 失效
标题翻译：根据正字模式制作单词的翻页
公开(公告)号：US20050042583A1
公开(公告)日：2005-02-24
申请号：US10608977
申请日：2003-06-28
申请人： Kenneth Barker
发明人： Kenneth Barker
IPC分类号： G09B1/16 , G09B17/00 , G09B1/00
CPC分类号： B42D1/009 , B42B5/12 , B42D1/001 , G09B1/16 , G09B17/00
摘要： An educational device, such as a flipbook, is designed and utilized with an instructional methodology for teaching students about the structure of written words. The orthographic patterns found in English single-syllable words and syllables are shown using color-coded sets of pages, each imprinted with a letter or letter cluster comprising vowels, r—controlled vowels, vowel teams, initial and final consonants and consonant digraphs, initial and final consonant blends, or either of two silent es—“marvelous e” and “not so marvelous e.” Sets of prefix and suffix pages are also used, along with a schwa page, to indicate the sound of an unaccented vowel. Like letters, or letter clusters, can be substituted for each other in flipbook fashion, consonants for consonants and vowels for vowels, so that by rotating various flipbook pages, hat can be changed to hot, or hop, or chop.
摘要翻译：设计和利用教学设备，例如翻盖，并用教学方法教授学生关于书面结构的结构。英文单音节单词和音节中发现的正字模式使用彩色编码的页面组合显示，每个页面都印有一个字母或字母簇，包括元音，r控元音，元音队，初始和最终辅音和辅音图，初始和最后的辅音混合，或两个沉默的“奇妙的e”和“不是很奇妙的e”之一。还使用前缀和后缀页面的集合以及schwa页面来指示不重要的元音的声音。像字母或字母组合，可以互相替代，以辅音和母音为母音辅音，以便通过旋转各种翻页页面，帽子可以改为热，跳或者打。

4. 发明申请

US20060029095A1 Method and system for fast Ethernet serial port multiplexing to reduce I/O pin count 审中-公开
标题翻译：用于快速以太网串口复用的方法和系统，以减少I / O引脚数
公开(公告)号：US20060029095A1
公开(公告)日：2006-02-09
申请号：US11247419
申请日：2005-10-11
申请人： Kenneth Barker , Charles Hoffman
发明人： Kenneth Barker , Charles Hoffman
IPC分类号： H04J3/22
CPC分类号： H04L49/351
摘要： A system and method of reducing the input and output pins used to interface a fast serial port Ethernet processing system using multiplexing. Using the system of the present invention, four pins can allow a plurality of Ethernet communication paths to be connected to a single processor on a substrate. These four connections include a clocking input as well as a strobe signal which coordinates the multiplexing and identifies the time period for a predetermined source. The physical layer and the processor are each provided with a multiplexor which is controlled by the strobe to select the network to be coupled at any given time. The multiplexor includes a counter which is incremented by the clocking input and reset by the strobe signal.
摘要翻译：一种减少输入和输出引脚的系统和方法，用于使用多路复用来连接快速串行端口以太网处理系统。使用本发明的系统，四个引脚可以允许多个以太网通信路径连接到基板上的单个处理器。这四个连接包括一个时钟输入以及一个选通信号，该信号协调多路复用并识别一个预定的源的时间周期。物理层和处理器均设置有多路复用器，该复用器由选通控制，以选择要在任何给定时间耦合的网络。多路复用器包括一个由时钟输入递增并由选通信号复位的计数器。

5. 发明申请

US20050068974A1 Shared transmit buffer for network processor and methods for using same 失效
标题翻译：用于网络处理器的共享发送缓冲器及其使用方法
公开(公告)号：US20050068974A1
公开(公告)日：2005-03-31
申请号：US10670711
申请日：2003-09-25
申请人： Kenneth Barker , Chad McBride
发明人： Kenneth Barker , Chad McBride
IPC分类号： H04L12/56
CPC分类号： H04L49/103 , H04L49/254
摘要： In a first aspect, a first method is provided for controlling the flow of data between a first and second clock domain. The first method includes the steps of (1) selecting one of a plurality of ports included in a physical layer interface in the second clock domain to which to send data; and (2) transmitting data from a transmit buffer in the first clock domain to the selected port in the physical layer interface in the second clock domain. Numerous other aspects are provided.
摘要翻译：在第一方面，提供了一种用于控制第一和第二时钟域之间的数据流的第一方法。第一种方法包括以下步骤：（1）选择包含在发送数据的第二时钟域中的物理层接口中的多个端口中的一个; 以及（2）将数据从第一时钟域中的发送缓冲器发送到第二时钟域中物理层接口中的选定端口。提供了许多其他方面。

6. 发明申请

US20080112425A1 SHARED TRANSMIT BUFFER FOR NETWORK PROCESSOR AND METHODS FOR USING SAME 审中-公开
标题翻译：用于网络处理器的共享传输缓冲器及其使用方法
公开(公告)号：US20080112425A1
公开(公告)日：2008-05-15
申请号：US12016941
申请日：2008-01-18
申请人： Kenneth Barker , Chad McBride
发明人： Kenneth Barker , Chad McBride
IPC分类号： H04L12/56
CPC分类号： H04L49/103 , H04L49/254
摘要： In a first aspect, a first method is provided for controlling the flow of data between a first and second clock domain. The first method includes the steps of (1) selecting one of a plurality of ports included in a physical layer interface in the second clock domain to which to send data; and (2) transmitting data from a transmit buffer in the first clock domain to the selected port in the physical layer interface in the second clock domain. Numerous other aspects are provided.
摘要翻译：在第一方面，提供了一种用于控制第一和第二时钟域之间的数据流的第一方法。第一种方法包括以下步骤：（1）选择包含在发送数据的第二时钟域中的物理层接口中的多个端口中的一个; 以及（2）将数据从第一时钟域中的发送缓冲器发送到第二时钟域中物理层接口中的选定端口。提供了许多其他方面。

7. 发明申请

US20060182187A1 Automatic reconfiguration of an I/O bus to correct for an error bit 审中-公开
标题翻译：自动重新配置I / O总线以纠正错误位
公开(公告)号：US20060182187A1
公开(公告)日：2006-08-17
申请号：US11055807
申请日：2005-02-11
申请人： Robert Likovich , Robert Reese , Joseph Mendenhall , Kenneth Barker
发明人： Robert Likovich , Robert Reese , Joseph Mendenhall , Kenneth Barker
IPC分类号： H04B3/00
CPC分类号： H04L1/22 , H04L1/242
摘要： A test pattern is loaded into a driver data shift register and sent from a driver chip to a receive chip over an M bit bus (0 to M−1). The test pattern is also generated at the receiver chip and used to compare to the actual received data. Failed compares are stored as logic ones in a bit error register (BER). A counter determines the number of failures by counting logic ones from the BER. The contents of a error position counter are latched in a error position latch and used to load a logic one (at the error bit position) into daisy chained self-heal control registers (SCR) in the receiver chip and the driver chip. The SCR sets a logic one into all bit positions after the error bit isolating the failed bit path and adding a spare bit path which is in bit position M.
摘要翻译：测试模式被加载到驱动器数据移位寄存器中，并通过M位总线（0到M-1）从驱动器芯片发送到接收芯片。测试模式也在接收芯片处产生，用于与实际接收的数据进行比较。失败的比较被存储为位错误寄存器（BER）中的逻辑比较。计数器通过从BER计数逻辑值来确定故障次数。错误位置计数器的内容被锁存在错误位置锁存器中，用于将逻辑1（在错误位位置）加载到接收器芯片和驱动器芯片中的菊花链自愈控制寄存器（SCR）中。在错误位隔离故障位路径并添加位位置M中的备用位路径之后，SCR将逻辑1设置为所有位位置。

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