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1. 发明申请

US20080231649A1 IMAGE FORMING APPARATUS, METHOD FOR CORRECTING DISPLACEMENT OF LANDING POSITIONS 审中-公开
标题翻译：图像形成装置，校正位移位移的方法
公开(公告)号：US20080231649A1
公开(公告)日：2008-09-25
申请号：US12048729
申请日：2008-03-14
申请人： Kenichi KAWABATA , Noboru Sawayama , Tetsuro Hirota , Mamoru Yorimoto , Tetsu Morino , Takumi Hagiwara
发明人： Kenichi KAWABATA , Noboru Sawayama , Tetsuro Hirota , Mamoru Yorimoto , Tetsu Morino , Takumi Hagiwara
IPC分类号： B41J29/38 , B41J29/393
CPC分类号： B41J29/38 , B41J2/17509 , B41J19/207 , B41J29/393
摘要： A disclosed image forming apparatus for forming an image on a recording medium being conveyed includes: a recording head discharging droplets; a pattern forming unit forming an adjustment pattern for detecting displacement of landing positions of droplets on a water-repellent member, the adjustment pattern including a minimum block pattern for each detection item and being formed with plural droplets independent of one another; a reading unit including a light emitting unit projecting a light onto the adjustment pattern and a light receiving unit receiving a regular reflection light from the adjustment pattern; and a landing position correcting unit correcting the landing positions of the droplets discharged from the recording head based on a result of reading by the reading unit.
摘要翻译：公开的用于在被传送的记录介质上形成图像的图像形成装置包括：排出液滴的记录头; 图案形成单元，其形成用于检测防水构件上的液滴的着陆位置的位移的调整图案，所述调整图案包括用于每个检测项目的最小块图案，并且彼此独立地形成有多个液滴; 读取单元，包括将光投射到调整图案上的发光单元和从调节图案接收正常反射光的光接收单元; 以及着陆位置校正单元，其基于读取单元的读取结果来校正从记录头排出的液滴的着陆位置。

2. 发明申请

US20120138346A1 WIRING BOARD, ELECTRONIC COMPONENT EMBEDDED SUBSTRATE, METHOD OF MANUFACTURING WIRING BOARD, AND METHOD OF MANUFACTURING ELECTRONIC COMPONENT EMBEDDED SUBSTRATE 有权
标题翻译：接线板，电子元件嵌入式基板，制造布线板的方法以及制造电子部件嵌入式基板的方法
公开(公告)号：US20120138346A1
公开(公告)日：2012-06-07
申请号：US13310959
申请日：2011-12-05
申请人： Hiroyuki UEMATSU , Kenichi KAWABATA
发明人： Hiroyuki UEMATSU , Kenichi KAWABATA
IPC分类号： H05K1/03 , H05K3/30 , H05K13/04 , H05K3/42 , H05K3/40
CPC分类号： H05K1/115 , H01L2224/04105 , H05K1/185 , H05K1/188 , H05K3/0035 , H05K3/0038 , H05K3/427 , H05K2201/0187 , H05K2201/09563 , H05K2203/095 , Y10T29/4913 , Y10T29/49146 , Y10T29/49147 , Y10T29/49165
摘要： A wiring board or an electronic component embedded substrate includes a substrate that includes a resin containing a plurality of fillers; and a via that is electrically connected to at least one interconnect provided to the substrate, wherein the via includes a mix area in which metal is provided between the fillers on an inner radial side with respect to the substrate. A method of manufacturing a wiring board or an electronic component embedded substrate includes preparing a substrate that includes a resin containing a plurality of fillers; forming a via formation hole in the substrate; performing an ashing process on at least an inner wall of the via formation hole; and performing electroless plating an the inner wall of the via formation hole.
摘要翻译：布线基板或电子部件嵌入基板包括：基板，其具有含有多个填料的树脂; 以及通孔，其电连接到提供给基板的至少一个互连件，其中所述通孔包括混合区域，在所述混合区域中，在相对于所述基板的内径向侧的所述填料之间设置有金属。制造布线板或电子部件嵌入式基板的方法包括制备包括含有多种填料的树脂的基板; 在所述基板中形成通孔形成孔; 在通孔形成孔的至少内壁上进行灰化处理; 并且对通孔形成孔的内壁进行化学镀。

3. 发明申请

US20090136279A1 IMAGE FORMING APPARATUS CAPABLE OF ELECTROSTATICALLY ATTRACTING SHEET EFFECTIVELY 有权
标题翻译：具有静电吸引力的图像形成装置
公开(公告)号：US20090136279A1
公开(公告)日：2009-05-28
申请号：US12324542
申请日：2008-11-26
申请人： Kenichi KAWABATA
发明人： Kenichi KAWABATA
IPC分类号： G03G15/00
CPC分类号： G03G15/234 , G03G2215/00654
摘要： In an image forming apparatus, a recording head discharges liquid droplets onto a sheet conveyed on a conveying belt to form an image on the sheet. A sheet discharge device is provided downstream from the conveying belt in a sheet conveyance direction and is intermittently driven independently of and in synchronization with the conveying belt to convey the sheet in a sheet discharging direction. A voltage application device applies a voltage to a charger. A distance between the charger and a nip portion formed between a pressing member and the conveying belt for duplex printing is set so that a voltage applied by the voltage application device increases a charged potential of the conveying belt in an area electrostatically attracting a trailing end of a predetermined sheet and a leading end of a subsequent sheet.
摘要翻译：在图像形成装置中，记录头将液滴排放到在传送带上传送的片材上，以在片材上形成图像。片材排出装置在片材输送方向上设置在输送带的下游，并且与输送带独立地且与其同步地间歇地驱动，以将片材沿片材排出方向输送。电压施加装置向充电器施加电压。设置充电器和形成在按压构件和用于双面打印的输送带之间的夹持部之间的距离，使得由施加电压装置施加的电压在静电吸引尾部的区域中增加输送带的带电电位预定片材和后续片材的前端。

4. 发明申请

US20110198115A1 ELECTRONIC COMPONENT BUILT-IN MODULE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：电子元件内置模块及其制造方法
公开(公告)号：US20110198115A1
公开(公告)日：2011-08-18
申请号：US13025658
申请日：2011-02-11
申请人： Yukihiro AZUMA , Seiichi TAJIMA , Shigeru ASAMI , Hiroki HARA , Shuichi TAKIZAWA , Kenichi KAWABATA
发明人： Yukihiro AZUMA , Seiichi TAJIMA , Shigeru ASAMI , Hiroki HARA , Shuichi TAKIZAWA , Kenichi KAWABATA
IPC分类号： H05K1/16 , H05K3/34
CPC分类号： H05K3/284 , H01L23/3135 , H01L23/552 , H01L2224/16225 , H01L2924/19105 , H01L2924/3025 , H05K1/0209 , H05K3/3431 , H05K2201/0116 , H05K2201/0715 , H05K2201/09872 , Y10T29/49144
摘要： An electronic component built-in module includes an electronic component, a substrate on which the electronic component is mounted, a first resin covering the electronic component and the substrate, and a second resin covering the surface of the first resin. The first resin is formed of a resin including pores. The first resin is formed so that the thickness of the first resin on an area where the electronic component is not mounted is larger than that on an area where the electronic component is mounted on the surface of the substrate. A porosity of the second resin is smaller than that of the first resin.
摘要翻译：电子部件内置模块包括电子部件，安装有电子部件的基板，覆盖电子部件和基板的第一树脂和覆盖第一树脂的表面的第二树脂。第一树脂由包括孔的树脂形成。第一树脂形成为使得未安装电子部件的区域上的第一树脂的厚度大于在电子部件安装在基板的表面上的区域的厚度。第二树脂的孔隙率小于第一树脂的孔隙率。

5. 发明申请

US20080019923A1 GAS BUBBLE-GENERATING AGENT 审中-公开
标题翻译：气体发泡剂
公开(公告)号：US20080019923A1
公开(公告)日：2008-01-24
申请号：US11778255
申请日：2007-07-16
申请人： Kenichi KAWABATA , Koji Hirata , Kazuaki Sasaki
发明人： Kenichi KAWABATA , Koji Hirata , Kazuaki Sasaki
IPC分类号： A61B8/00
CPC分类号： A61K41/0033 , A61B5/4839 , A61B8/481
摘要： This invention provides a gas bubble-generating agent that can be used as a contrast medium or a blocking agent in vivo. Such gas bubble-generating agent is produced by a method for producing a gas bubble-generating agent comprising the following steps of: (a) preparing a mixed solution of an amphiphilic substance, an amphiphilic substance comprising a water-soluble polymer chemically bound thereto, a hardly water-soluble substance having a boiling point of lower than 60° C. at atmospheric pressure, and a physiologically acceptable isotonic solution; (b) pressurizing the mixed solution; and (c) centrifuging the mixed solution after the step of pressurization, wherein a molar concentration of the amphiphilic substance in the mixed solution prepared in step (a) is 10 times or more higher than that of the amphiphilic substance comprising a water-soluble polymer chemically bound thereto.
摘要翻译：本发明提供了可用作造影剂或封闭剂的气泡产生剂。这种气泡生成剂是通过气泡发生剂的制造方法制造的，其特征在于，包括以下步骤：（a）制备两亲物质，包含化学键合的水溶性聚合物的两亲物质，在大气压下沸点低于60℃的几乎不溶于水的物质，以及生理上可接受的等渗溶液; （b）对混合溶液加压; 和（c）在加压步骤之后离心混合溶液，其中在步骤（a）中制备的混合溶液中的两亲物质的摩尔浓度比包含水溶性聚合物的两亲物质的摩尔浓度高10倍或更多化学结合。

6. 发明申请

US20110182041A1 LEAD-FREE SOLDER AND ELECTRONIC COMPONENT BUILT-IN MODULE 有权
标题翻译：无铅焊接机和电子部件内置模块
公开(公告)号：US20110182041A1
公开(公告)日：2011-07-28
申请号：US13005838
申请日：2011-01-13
申请人： Tsutomu YASUI , Hisayuki ABE , Kenichi KAWABATA , Tomoko KITAMURA
发明人： Tsutomu YASUI , Hisayuki ABE , Kenichi KAWABATA , Tomoko KITAMURA
IPC分类号： H05K7/00
CPC分类号： H05K3/3463 , B23K35/0227 , B23K35/0244 , B23K35/025 , B23K35/262 , B23K35/3033 , C22C13/00 , C22C19/03 , H01L2224/16225 , H01L2924/19105 , H05K3/3484
摘要： First solder is lead-free solder that contains no lead (Pb). The first solder includes a first metal that contains at least Sn; and a second metal that contains at least a Ni—Fe alloy.
摘要翻译：第一焊料是不含铅（Pb）的无铅焊料。第一焊料包括至少含有Sn的第一金属; 以及含有至少Ni-Fe合金的第二金属。

7. 发明申请

US20100178737A1 Semiconductor IC and Its Manufacturing Method, and Module with Embedded Semiconductor IC and Its Manufacturing Method 审中-公开
标题翻译：半导体IC及其制造方法和嵌入式半导体IC模块及其制造方法
公开(公告)号：US20100178737A1
公开(公告)日：2010-07-15
申请号：US12692602
申请日：2010-01-23
申请人： Kenichi KAWABATA , Hisayuki Abe
发明人： Kenichi KAWABATA , Hisayuki Abe
IPC分类号： H01L21/56
CPC分类号： H01L31/02002 , H01L23/3114 , H01L23/4334 , H01L24/19 , H01L24/82 , H01L2224/0401 , H01L2224/04026 , H01L2224/04105 , H01L2224/1134 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13171 , H01L2224/16 , H01L2224/32245 , H01L2224/73253 , H01L2224/73267 , H01L2224/92244 , H01L2224/94 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/3511 , H01L2924/3512 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2224/214
摘要： A semiconductor IC includes a semiconductor IC main body having a predetermined circuit formed on a main surface, a metal layer selectively provided on substantially the whole back surface of the semiconductor IC main body excluding the periphery. According to the present invention, the metal layer provided on the semiconductor IC main body can dissipate heat at a high level. Because the metal layer is selectively provided, even when the semiconductor IC main body is thinned by polishing, warpage does not occur easily in a wafer state. The metal layer is selectively provided at the center of the back surface of the semiconductor IC. Therefore, a laminate of a semiconductor wafer and a thick metal does not need to be diced. As a result, chipping on the disconnected surface can be prevented effectively.
摘要翻译：半导体IC包括：半导体IC主体，其具有形成在主表面上的预定电路;金属层，选择性地设置在除了周边以外的半导体IC主体的大致整个背面上。根据本发明，设置在半导体IC主体上的金属层可以以高水平散发热量。由于选择性地设置金属层，所以即使通过研磨使半导体IC主体变薄，在晶片状态下也不容易发生翘曲。金属层选择性地设置在半导体IC的背面的中心。因此，不需要切割半导体晶片和厚金属的叠层体。结果，可以有效地防止断开的表面上的碎裂。

8. 发明申请

US20110229708A1 ELECTRONIC CIRCUIT MODULE COMPONENT AND METHOD OF MANUFACTURING ELECTRONIC CIRCUIT MODULE COMPONENT 有权
标题翻译：电子电路模块组件及制造电子电路模块组件的方法
公开(公告)号：US20110229708A1
公开(公告)日：2011-09-22
申请号：US13044871
申请日：2011-03-10
申请人： Shigeru ASAMI , Seiichi TAJIMA , Hiroki HARA , Shuichi TAKIZAWA , Masumi KAMEDA , Kenichi KAWABATA
发明人： Shigeru ASAMI , Seiichi TAJIMA , Hiroki HARA , Shuichi TAKIZAWA , Masumi KAMEDA , Kenichi KAWABATA
IPC分类号： B32B3/26 , H01R43/00
CPC分类号： H01L23/3135 , H01L23/295 , H01L23/3128 , H01L23/552 , H01L23/564 , H01L24/97 , H01L25/16 , H01L2224/16225 , H01L2224/16227 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/014 , H01L2924/14 , H01L2924/181 , Y10T29/49117 , Y10T428/249981 , H01L2224/81 , H01L2924/00 , H01L2224/0401
摘要： An electronic circuit module component includes an electronic component, a substrate, a first resin, a second resin, a metal layer, and an opening. The electronic component is mounted on the substrate. The first resin has pores and is in contact with at least a part of the electronic component. The second resin covers a surface of the first resin and has porosity which is lower than that of the first resin. The metal layer covers the first resin and the second resin and is electrically connected to a ground of the substrate. The opening is provided in the metal layer and allows a part of the first resin to be exposed to an outside at least of the metal layer.
摘要翻译：电子电路模块组件包括电子部件，基板，第一树脂，第二树脂，金属层和开口。电子部件安装在基板上。第一树脂具有孔并与电子部件的至少一部分接触。第二树脂覆盖第一树脂的表面，并且具有低于第一树脂的孔隙率。金属层覆盖第一树脂和第二树脂，并且电连接到基板的接地。开口设置在金属层中，并且允许第一树脂的一部分至少暴露于金属层的外部。

9. 发明申请

US20080202803A1 Wiring structure, forming method of the same and printed wiring board 审中-公开
标题翻译：接线结构，成型方法及印刷电路板
公开(公告)号：US20080202803A1
公开(公告)日：2008-08-28
申请号：US12007830
申请日：2008-01-16
申请人： Kenji NAGASE , Kenichi KAWABATA
发明人： Kenji NAGASE , Kenichi KAWABATA
IPC分类号： H05K1/11 , H05K3/10
CPC分类号： H01L24/82 , H01L23/3121 , H01L23/5389 , H01L24/24 , H01L2224/24051 , H01L2224/24226 , H01L2224/82039 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01037 , H01L2924/01038 , H01L2924/0104 , H01L2924/01047 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/014 , H01L2924/04953 , H01L2924/12042 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/351 , H05K1/185 , H05K3/064 , H05K3/4007 , H05K3/421 , H05K3/4652 , H05K2201/0367 , H05K2201/09472 , H05K2201/09645 , H05K2201/09745 , H05K2203/054 , H05K2203/1152 , Y10T29/49155 , H01L2924/00
摘要： There is disclosed a wiring structure or the like capable of sufficiently improving a connection property between a body to be wired and a wiring pattern (layer) connected to the body to be wired. In a semiconductor-embedded substrate 1, conductive patterns 13 are formed on opposite surfaces of a core substrate 11, and a semiconductor device 14 is arranged in a resin layer 16 laminated on the core substrate 11. The resin layer 16 is provided with the conductive pattern 13 and bumps 14p of the semiconductor device 14, and via-holes 19a, 19b are formed through upper portions of the resin layer. In the via-holes 19a, 19b, via-hole electrode portions 23a, 23b are connected to the conductive pattern 13 and the bumps 14p of the semiconductor device 14. The via-hole electrode portions 23a, 23b are provided so that each via-hole electrode portion has a concave portion at an upper surface thereof and so that a side wall thereof including an edge portion of the concave portion does not come in contact with an inner wall of the via-hole 19a or 19b.
摘要翻译：公开了能够充分提高被布线体与连接到待布线体的布线图案（层）之间的连接性的布线结构等。在半导体嵌入式基板1中，在芯基板11的相对面形成有导电图案13，在层叠于芯基板11上的树脂层16内配置有半导体装置14。树脂层16设置有导电图案13和半导体器件14的凸块14p，并且通孔21a，19b通过树脂层的上部形成。在通孔19a，19b中，通孔电极部分23a，23b连接到导电图案13和半导体器件14的凸块14p。通孔电极部分23a，23b设置成使得每个通孔电极部分在其上表面具有凹部，并且使得其包括凹部的边缘部分的侧壁不会接触具有通孔19a或19b的内壁。

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