会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 4. 发明授权
    • Timing signal extracting circuit
    • 定时信号提取电路
    • US4658217A
    • 1987-04-14
    • US654897
    • 1984-09-27
    • Hiroshi TakatoriToshiro SuzukiKeiji Tomooka
    • Hiroshi TakatoriToshiro SuzukiKeiji Tomooka
    • H04L7/00H04L7/02H04L7/027H04L7/033H03B1/00H03K5/13H03L7/00
    • H04L7/0054H04L7/027
    • A timing signal extraction circuit has a clock signal extractor for extracting from a transmitted data signal a clock component synchronous with the transmission rate of the transmitted signal, an oscillator having an oscillation frequency about M (M: an integer) times as high as the transmission rate of the transmitted signal, a phase-locked loop detecting the phase difference between the output signal of a frequency divider frequency-dividing the output signal of the oscillator and the output signal of the clock signal extractor thereby controlling the operating phase of the oscillator, and a logic circuit producing a plurality of pulse trains whose bit rate is equal to the transmission rate of the transmitted signal and which have respectively different phases. A pulse train having a desired phase is selected from among the plural pulse trains to provide a decision timing signal.
    • 定时信号提取电路具有时钟信号提取器,用于从发送的数据信号中提取与发送信号的传输速率同步的时钟分量,振荡器的振荡频率大约为传输的M(M:整数)倍 发送信号的速率,锁相环检测分频振荡器的输出信号的分频器的输出信号与时钟信号提取器的输出信号之间的相位差,从而控制振荡器的工作相位, 以及产生多个脉冲串的逻辑电路,其比特率等于发送信号的传输速率,并且具有分别不同的相位。 从多个脉冲串中选择具有期望相位的脉冲串,以提供判定定时信号。