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1. 发明申请

US20120154055A1 POWER AMPLIFIER 有权
标题翻译：功率放大器
公开(公告)号：US20120154055A1
公开(公告)日：2012-06-21
申请号：US13195066
申请日：2011-08-01
申请人： Kazuya Yamamoto , Miyo Miyashita , Takayuki Matsuzuka , Kenji Mukai
发明人： Kazuya Yamamoto , Miyo Miyashita , Takayuki Matsuzuka , Kenji Mukai
IPC分类号： H03F3/68 , H03F3/04
CPC分类号： H03F3/191 , H03F1/56 , H03F3/193 , H03F2200/15 , H03F2200/18 , H03F2200/211 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/411 , H03G1/007
摘要： A power amplifier includes a first amplifier unit, a second amplifier unit, and an attenuator. The second amplifier receives a signal from the first amplifier unit and amplifies the signal. The attenuator is provided between the first and second amplifier units. The attenuator has arms, including at least one parallel arm and at least one series arm, and has switches connected to the arms to switch the electrical connection states of the arms with respect to the first and second amplifier units. The at least one parallel arm and the at least one series arm are alternately arranged, in the order named, as viewed in the direction from the first amplifier unit to the second amplifier unit.
摘要翻译：功率放大器包括第一放大器单元，第二放大器单元和衰减器。第二放大器从第一放大器单元接收信号并放大信号。衰减器设置在第一和第二放大器单元之间。衰减器具有包括至少一个并联臂和至少一个串联臂的臂，并且具有连接到臂的开关，以相对于第一和第二放大器单元切换臂的电连接状态。按照从第一放大器单元到第二放大器单元的方向观察，所述至少一个并联臂和至少一个串联臂交替排列。

2. 发明授权

US08461929B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US08461929B2
公开(公告)日：2013-06-11
申请号：US13195066
申请日：2011-08-01
申请人： Kazuya Yamamoto , Miyo Miyashita , Takayuki Matsuzuka , Kenji Mukai
发明人： Kazuya Yamamoto , Miyo Miyashita , Takayuki Matsuzuka , Kenji Mukai
IPC分类号： H03G3/30
CPC分类号： H03F3/191 , H03F1/56 , H03F3/193 , H03F2200/15 , H03F2200/18 , H03F2200/211 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/411 , H03G1/007
摘要： A power amplifier includes a first amplifier unit, a second amplifier unit, and an attenuator. The second amplifier receives a signal from the first amplifier unit and amplifies the signal. The attenuator is provided between the first and second amplifier units. The attenuator has arms, including at least one parallel arm and at least one series arm, and has switches connected to the arms to switch the electrical connection states of the arms with respect to the first and second amplifier units. The at least one parallel arm and the at least one series arm are alternately arranged, in the order named, as viewed in the direction from the first amplifier unit to the second amplifier unit.
摘要翻译：功率放大器包括第一放大器单元，第二放大器单元和衰减器。第二放大器从第一放大器单元接收信号并放大信号。衰减器设置在第一和第二放大器单元之间。衰减器具有包括至少一个并联臂和至少一个串联臂的臂，并且具有连接到臂的开关，以相对于第一和第二放大器单元切换臂的电连接状态。按照从第一放大器单元到第二放大器单元的方向观察，所述至少一个并联臂和至少一个串联臂交替排列。

3. 发明申请

US20120062321A1 POWER AMPLIFIER 有权
标题翻译：功率放大器
公开(公告)号：US20120062321A1
公开(公告)日：2012-03-15
申请号：US13079046
申请日：2011-04-04
申请人： Kazuya Yamamoto , Miyo Miyashita , Satoshi Suzuki , Takayuki Matsuzuka
发明人： Kazuya Yamamoto , Miyo Miyashita , Satoshi Suzuki , Takayuki Matsuzuka
IPC分类号： H03F3/20
CPC分类号： H03F3/195 , H03F1/0277 , H03F3/189 , H03F3/245 , H03F3/72 , H03F2200/27 , H03F2200/411 , H03F2203/7206 , H03F2203/7236 , H03G1/0088
摘要： A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
摘要翻译：功率放大器包括：放大晶体管，用于放大输入信号; 产生参考电压的基准电压产生电路; 偏置电路，基于所述参考电压产生偏置电压，并将所述偏置电压提供给所述放大晶体管; 并且升压器提升从外部输入的使能电压并输出使能电压。参考电压产生电路对应于升压器的输出电压而导通/截止。升压器包括：施加使能电压的使能端子; 连接到电源的电源端子; 具有连接到使能端子的控制电极的晶体管，连接到电源端子的第一电极和接地的第二电极; 以及连接在晶体管的第一电极和电源端子之间的FET电阻器。 FET电阻的栅电极断开。

4. 发明授权

US07705658B2 Wave detector circuit 有权
标题翻译：波检测电路
公开(公告)号：US07705658B2
公开(公告)日：2010-04-27
申请号：US11748601
申请日：2007-05-15
申请人： Kazuya Yamamoto , Miyo Miyashita , Takayuki Matsuzuka
发明人： Kazuya Yamamoto , Miyo Miyashita , Takayuki Matsuzuka
IPC分类号： H03K17/60
CPC分类号： H03F3/19 , G01R21/12 , H03F3/211 , H03F2200/393 , H03F2200/408 , H03F2200/451 , H03F2200/471
摘要： A wave detector circuit includes: a first transistor having its base and collector connected together, the first transistor receiving an AC signal and a reference voltage at its base and collector; a second transistor having its base connected to the base of the first transistor through a resistor, the second transistor outputting a detected voltage at its collector; and a diode-connected temperature compensation transistor connected between ground potential and the base and the collector of the first transistor.
摘要翻译：波检测器电路包括：第一晶体管，其基极和集电极连接在一起，第一晶体管在其基极和集电极处接收AC信号和参考电压; 第二晶体管，其基极通过电阻连接到第一晶体管的基极，第二晶体管在其集电极处输出检测电压; 以及连接在地电位与第一晶体管的基极和集电极之间的二极管连接的温度补偿晶体管。

5. 发明授权

US08217722B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US08217722B2
公开(公告)日：2012-07-10
申请号：US13079046
申请日：2011-04-04
申请人： Kazuya Yamamoto , Miyo Miyashita , Satoshi Suzuki , Takayuki Matsuzuka
发明人： Kazuya Yamamoto , Miyo Miyashita , Satoshi Suzuki , Takayuki Matsuzuka
IPC分类号： H03F3/20
CPC分类号： H03F3/195 , H03F1/0277 , H03F3/189 , H03F3/245 , H03F3/72 , H03F2200/27 , H03F2200/411 , H03F2203/7206 , H03F2203/7236 , H03G1/0088
摘要： A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
摘要翻译：功率放大器包括：放大晶体管，用于放大输入信号; 产生参考电压的基准电压产生电路; 偏置电路，基于所述参考电压产生偏置电压，并将所述偏置电压提供给所述放大晶体管; 并且升压器提升从外部输入的使能电压并输出使能电压。基准电压发生电路与增压器的输出电压对应地接通/断开。升压器包括：施加使能电压的使能端子; 连接到电源的电源端子; 具有连接到使能端子的控制电极的晶体管，连接到电源端子的第一电极和接地的第二电极; 以及连接在晶体管的第一电极和电源端子之间的FET电阻器。 FET电阻的栅电极断开。

6. 发明申请

US20090309655A1 POWER AMPLIFIER 有权
标题翻译：功率放大器
公开(公告)号：US20090309655A1
公开(公告)日：2009-12-17
申请号：US12254069
申请日：2008-10-20
申请人： Kazuya Yamamoto , Miyo Miyashita
发明人： Kazuya Yamamoto , Miyo Miyashita
IPC分类号： H03F1/14 , H03F3/191
CPC分类号： H03F3/191 , H03F1/0261 , H03F3/72 , H03F2200/18 , H03F2200/408 , H03F2203/7239
摘要： A power amplifier includes: an amplifying transistor; a bias circuit; a first diode; a second diode; a matching attenuating circuit; a first current mirror circuit; a serial resonant circuit, and a switch. In an amplification mode, the bias circuit supplies a bias current to the amplifying transistor, and the first current mirror circuit turns off the first and second diodes, and the switch. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor, and the first current mirror circuit turns on the first and second diodes, and the switch.
摘要翻译：功率放大器包括：放大晶体管; 偏置电路; 第一个二极管; 第二个二极管; 匹配衰减电路; 第一电流镜电路; 串联谐振电路和开关。在放大模式中，偏置电路向放大晶体管提供偏置电流，并且第一电流镜电路关断第一和第二二极管以及开关。在衰减模式中，偏置电路不向放大晶体管提供偏置电流，并且第一电流镜电路导通第一和第二二极管以及开关。

7. 发明授权

US07616060B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US07616060B2
公开(公告)日：2009-11-10
申请号：US12131959
申请日：2008-06-03
申请人： Kazuya Yamamoto , Miyo Miyashita
发明人： Kazuya Yamamoto , Miyo Miyashita
IPC分类号： H03G3/00
CPC分类号： H03F3/191 , H03G1/0052
摘要： An amplifying transistor for amplifying a radio frequency signal between an input terminal and an output terminal. The cathode of a first diode is connected to the input terminal and the anode of a second diode is connected to the output terminal. A matching and attenuating circuit is connected between the anode of the first diode and the cathode of the second diode. A matching and attenuating circuit reduces impedance mismatches on the input terminal side and the output terminal side, and attenuates the radio frequency signal. In an amplification mode, a bias circuit supplies a bias current to an amplifying transistor and a current mirror circuit turns off the first and second diodes. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor and the current mirror circuit turns on the first and second diodes.
摘要翻译：一种放大晶体管，用于放大输入端和输出端之间的射频信号。第一二极管的阴极连接到输入端子，第二二极管的阳极连接到输出端子。匹配和衰减电路连接在第一二极管的阳极和第二二极管的阴极之间。匹配和衰减电路减少输入端侧和输出端侧的阻抗失配，并衰减射频信号。在放大模式中，偏置电路向放大晶体管提供偏置电流，并且电流镜电路关断第一和第二二极管。在衰减模式中，偏置电路不向放大晶体管提供偏置电流，并且电流镜电路导通第一和第二二极管。

8. 发明授权

US07474170B2 Attenuator 有权
标题翻译：衰减器
公开(公告)号：US07474170B2
公开(公告)日：2009-01-06
申请号：US11678643
申请日：2007-02-26
申请人： Kazuya Yamamoto , Miyo Miyashita
发明人： Kazuya Yamamoto , Miyo Miyashita
IPC分类号： H01P1/22
CPC分类号： H03F1/3276 , H03H7/253 , H03H11/24
摘要： A linearizer includes fifth diodes, a third resistor, sixth diodes, and a first npn heterojunction bipolar transistor. When a low-level voltage is applied to first and fourth control voltage terminals and a high-level voltage is applied to second and third control voltage terminals, a low-level voltage is applied to a fifth control voltage terminal, and when a high-level voltage is applied to the first and fourth control voltage terminals and a low-level voltage is applied to the second and third control voltage terminals, a high-level voltage is applied to the fifth control voltage terminal.
摘要翻译：线性化器包括第五二极管，第三电阻器，第六二极管和第一npn异质结双极晶体管。当对第一和第四控制电压端子施加低电平电压，并且向第二和第三控制电压端子施加高电平电压时，向第五控制电压端子施加低电平电压，对第一和第四控制电压端子施加电平电压，并且向第二和第三控制电压端子施加低电平电压，向第五控制电压端子施加高电平电压。

9. 发明授权

US07474169B2 Attenuator 有权
标题翻译：衰减器
公开(公告)号：US07474169B2
公开(公告)日：2009-01-06
申请号：US11553563
申请日：2006-10-27
申请人： Kazuya Yamamoto , Miyo Miyashita
发明人： Kazuya Yamamoto , Miyo Miyashita
IPC分类号： H01P1/22 , H03H7/24
CPC分类号： H03H7/253
摘要： An attenuator includes a first diode, a first control voltage terminal, a second diode, a first resistance, a second resistance, a third diode, a fourth diode, a fifth capacitance, a second control voltage terminal, a third control voltage terminal, a fourth control voltage terminal, and a linearizer provided between an input terminal and the anode of the first diode. The linearizer linearizes a signal input to the input terminal only when low level voltages are applied to the first and fourth control voltage terminals at the same time that high level voltages are applied to the second and third control voltage terminals.
摘要翻译：衰减器包括第一二极管，第一控制电压端子，第二二极管，第一电阻，第二电阻，第三二极管，第四二极管，第五电容，第二控制电压端子，第三控制电压端子，第四控制电压端子和设置在第一二极管的输入端子和阳极之间的线性化电路。线性化器仅在将低电平电压施加到第一和第四控制电压端子的同时将高电平电压施加到第二和第三控制电压端子的同时，将输入到输入端子的信号线性化。

10. 发明授权

US08558549B2 Detector circuit and semiconductor device using same 有权
标题翻译：检测电路和使用其的半导体器件
公开(公告)号：US08558549B2
公开(公告)日：2013-10-15
申请号：US12941134
申请日：2010-11-08
申请人： Kazuya Yamamoto , Tomoyuki Asada , Miyo Miyashita
发明人： Kazuya Yamamoto , Tomoyuki Asada , Miyo Miyashita
IPC分类号： G01R31/00 , G01R25/02
CPC分类号： G01R31/2822 , G01R23/20 , H03F3/24 , H04B1/0475 , H04B17/103
摘要： A detector circuit for detecting degradation in the distortion characteristics of a power amplifier based on signals from both ends of a coupled line of a directional coupler. The detector circuit includes a phase shifter/attenuator for phase shifting and attenuating a signal from a coupled terminal of the coupled line, a differential amplifier for outputting difference between an output signal from the phase shifter/attenuator and a signal from the isolated terminal of the coupled line, a wave detector circuit for converting the difference into a DC signal, and a comparing circuit for determining whether the voltage level of the DC signal exceeds a predetermined level. When degradation in the distortion characteristics of the power amplifier arises, the phase shifter/attenuator phase shifts the signal from the coupled terminal and outputs a signal 180° out of phase with the signal from the isolated terminal.
摘要翻译：一种用于根据来自定向耦合器的耦合线的两端的信号来检测功率放大器的失真特性的劣化的检测器电路。检测器电路包括用于相移和衰减来自耦合线的耦合端的信号的移相器/衰减器，用于输出来自移相器/衰减器的输出信号与来自该移相器/衰减器的隔离端的信号的差分放大器耦合线，用于将差值转换为DC信号的波检测器电路，以及用于确定DC信号的电压电平是否超过预定电平的比较电路。当功率放大器的失真特性出现降低时，移相器/衰减器将来自耦合端子的信号相移，并输出与隔离端子信号180°异相的信号。

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