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    • 2. 发明申请
    • Music detection device, music detection method and recording and reproducing apparatus
    • 音乐检测装置,音乐检测方法和记录和再现装置
    • US20060236333A1
    • 2006-10-19
    • US11367557
    • 2006-03-06
    • Yoshifumi FujikawaKazushige Hiroi
    • Yoshifumi FujikawaKazushige Hiroi
    • H04N7/16H04H9/00
    • H04H60/37
    • A method and device for detecting music parts within a content at relatively low cost of arithmetic operations. The device includes a first power calculating section for calculating a sum of powers of respective channels of two-channel sound, a second power calculating section for calculating a difference between the powers of the respective channels of the two-channel sound, a power ratio calculating section for calculating a ratio between the powers calculated by the first and second power calculating sections, a comparing section for comparing the ratio calculated by the power ratio calculating section with a prescribed threshold value, and a determination section for performing determination of a music segment based on a result of comparison by the comparing section.
    • 一种用于以相对低的算术成本检测内容内的音乐部分的方法和装置。 该装置包括:第一功率计算部,用于计算双声道声音的各声道的功率之和;第二功率计算部,用于计算双声道声音的各声道的功率之间的差;功率比计算 用于计算由第一和第二功率计算部分计算的功率之间的比率;比较部分,用于将由功率比计算部分计算的比率与规定的阈值进行比较;以及确定部分,用于执行基于音乐段的确定 比较部分的比较结果。
    • 7. 发明申请
    • Video playback apparatus
    • 视频播放设备
    • US20060140580A1
    • 2006-06-29
    • US11154818
    • 2005-06-17
    • Kazushige HiroiYoshifumi FujikawaNorikazu SasakiRiri UedaAkio HayashiYukio FujiiAtsuo Kawaguchi
    • Kazushige HiroiYoshifumi FujikawaNorikazu SasakiRiri UedaAkio HayashiYukio FujiiAtsuo Kawaguchi
    • H04N5/93
    • G11B27/105G11B2220/2545G11B2220/2562H04N5/76H04N5/93
    • A video playback apparatus includes: video data inputting unit; a ranking data inputting/generating unit that inputs or generates ranking data where scenes in video data are ranked according to importance; a playback scene determination parameter inputting unit that inputs parameters when determining scenes to be played back according to importance; a playback scene determining unit that determines playback scenes based on ranking data and playback scene determination parameters; and a display unit that displays playback scenes. A viewing time of video data that the user desires and a maximum time width of each playback scene are inputted to the playback scene determination parameter inputting unit, and the playback scene determining unit cuts scenes so that the playback time of the playback scenes fits the maximum time width, and determines the playback scenes so that the sum of the playback time of the playback scenes fits within the viewing time.
    • 视频播放装置包括:视频数据输入单元; 排序数据输入/生成单元,其输入或生成视频数据中的场景根据重要性进行排名的排序数据; 播放场景确定参数输入单元,其根据重要性来确定要重放的场景时输入参数; 回放场景确定单元,其基于排序数据和重放场景确定参数来确定回放场景; 以及显示重放场景的显示单元。 用户期望的视频数据的观看时间和每个重放场景的最大时间宽度被输入到回放场景确定参数输入单元,并且回放场景确定单元切断场景,使得回放场景的回放时间适合最大 时间宽度,并且确定回放场景,使得回放场景的回放时间之和适合观看时间。
    • 9. 发明授权
    • VLIW system with predicated instruction execution for individual
instruction fields
    • 具有针对各个指令字段执行预定指令的VLIW系统
    • US6041399A
    • 2000-03-21
    • US884667
    • 1997-06-27
    • Koichi TeradaKeiji KojimaYoshifumi FujikawaTohru NojiriKiyokazu Nishioka
    • Koichi TeradaKeiji KojimaYoshifumi FujikawaTohru NojiriKiyokazu Nishioka
    • G06F9/30G06F9/32G06F9/34G06F9/38G06F9/45
    • G06F9/3885G06F9/30072G06F9/3824
    • In the case of constituting a processing unit having the characteristic of a VLIW type processing unit and the characteristic of a pipeline type processing unit, since reference to the result of operations is made among a plurality of processing units executing in parallel the operations, transfer of the register file is frequently generated among the processing units, resulting in insufficient effect of the high speed operations. In view of solving this problem, the predicate registers are provided and moreover a means for broadcasting the update data of the predicate register to all processing units is also provided. Thereby, operations for obtaining branching condition and numerical value can be realized in different processing units and the number of steps of the processing program can be reduced. In addition, since high speed transfer between the processing units of the data register having a wider bit width is no longer required and thereby the mounting area can be reduced and high speed processing unit can be realized.
    • 在构成具有VLIW类型处理单元的特征的处理单元和流水线类型处理单元的特性的情况下,由于在并行执行操作的多个处理单元中进行操作结果的参考,因此, 在处理单元之间经常生成寄存器文件,导致高速操作的效果不足。 为了解决这个问题,提供了谓词寄存器,并且还提供了用于向所有处理单元广播谓词寄存器的更新数据的装置。 因此,可以在不同的处理单元中实现获得分支条件和数值的操作,并且可以减少处理程序的步数。 此外,由于不再需要具有较宽位宽的数据寄存器的处理单元之间的高速传输,从而可以减小安装面积,并可实现高速处理单元。
    • 10. 发明授权
    • Processor and data processor
    • 处理器和数据处理器
    • US5870618A
    • 1999-02-09
    • US681180
    • 1996-07-22
    • Yoshifumi FujikawaKeiji KojimaKiyokazu NishiokaTohru NojiriKazuhiko TanakaMasao Ishiguro
    • Yoshifumi FujikawaKeiji KojimaKiyokazu NishiokaTohru NojiriKazuhiko TanakaMasao Ishiguro
    • G06F9/305G06F9/30G06F9/302G06F9/34G06F9/38G06F9/26
    • G06F9/30014G06F9/30036G06F9/30101
    • An object of the present invention is to provide a processor which can execute calculation between data of a data length larger than the data length of the register file at high speed without the cost of the hardware being increased so much and the first long register 12 and the second long register 13 having a bit width which is two times of the bit width of the register file and the long register update device 14 for updating the data of the second long register 13 partially are installed between the register file 2 and the pixel calculator 11. When the long register update pixel calculation instruction is stored in the instruction register 31, the long register update device 14 connects a part of the data of the second long register 13 and a part of data read from the register file 2 and sends them to the pixel calculator 11 and the second long register 13 via the selector 15. The pixel calculator 11 executes calculation between the data of the first long register 12 and the data given from the selector 15.
    • 本发明的目的是提供一种处理器,其可以在高速的数据长度大于寄存器文件的数据长度的数据长度的数据之间进行计算,而不会增加硬件的成本,并且第一长寄存器12和 具有位宽度为寄存器堆的位宽度的二倍的第二长寄存器13和用于更新第二长寄存器13的数据的长寄存器更新装置14部分地安装在寄存器堆2和像素计算器 当长寄存器更新像素计算指令存储在指令寄存器31中时,长寄存器更新装置14连接第二长寄存器13的数据的一部分和从寄存器文件2读取的数据的一部分,并将它们发送 经由选择器15传送到像素计算器11和第二长寄存器13.像素计算器11执行第一长寄存器12的数据和数据gi之间的计算 从选择器15发出。