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    • 1. 发明申请
    • DIGITAL IMAGE PROCESSING DEVICE
    • 数字图像处理装置
    • US20100134685A1
    • 2010-06-03
    • US12595000
    • 2008-09-11
    • Kazuo NakamuraShingo Miyauchi
    • Kazuo NakamuraShingo Miyauchi
    • H04N5/50
    • H04N9/76G09G5/026G09G5/14G09G5/42G09G2340/0471G09G2340/0478G09G2340/125H04N5/44504H04N21/431H04N21/4316
    • A digital image processing device in which the transfer data amount is reduced and a plurality of OSD images are superimposed on video includes: a sequencer configured to overlay a plurality of OSD images on each other considering their priorities and store a resultant synthesized image in a work memory; a switch signal generation section configured to generate a switch signal indicating which pixel among pixels of the plurality of OSD images should be displayed as a pixel of the synthesized image based on coordinate data indicating regions in which the plurality of OSD images are displayed and the priorities of the plurality of OSD images; and a conversion section configured to store lookup tables each indicating the relationship between index data and data representing a color corresponding to the index data, convert index data of the synthesized image read from the work memory to data representing a corresponding color using the lookup table corresponding to the switch signal, and output the resultant data.
    • 其中传输数据量减少并且多个OSD图像叠加在视频上的数字图像处理装置包括:定序器,被配置为根据其优先级将多个OSD图像彼此重叠,并将合成的合成图像存储在工作中 记忆; 切换信号生成部,被配置为基于指示显示多个OSD图像的区域的坐标数据和优先级来生成指示应该显示多个OSD图像的像素中的哪个像素作为合成图像的像素的开关信号 的多个OSD图像; 以及转换部,其被配置为存储各表示索引数据和表示与索引数据对应的颜色的数据之间的关系的查找表,使用对应的查找表将从工作存储器读取的合成图像的索引数据转换为表示相应颜色的数据 到开关信号,并输出结果数据。
    • 2. 发明授权
    • Display panel and display device
    • 显示面板和显示设备
    • US08830144B2
    • 2014-09-09
    • US12661248
    • 2010-03-12
    • Kazuo NakamuraKatsuhide UchinoNobutoshi AsaiHiroshi Sagawa
    • Kazuo NakamuraKatsuhide UchinoNobutoshi AsaiHiroshi Sagawa
    • G09G3/30H01L27/32H01L51/52
    • H01L27/3269G09G3/20G09G3/3208G09G2300/0421H01L27/322H01L51/5284H01L2227/32
    • A display panel includes: a plurality of pixel circuits formed in a matrix on a substrate; an insulating layer covering the plurality of pixel circuits; a plurality of light emitting elements connected to the plurality of pixel circuits, and arranged in a matrix on the insulating layer; a filtering layer including a light transmitting section at least in a part of a region facing the light emitting element and a light shielding section formed in a same plane as the light transmitting section, and formed on an opposite side from the pixel circuit in relation to the light emitting element; a light reflecting section formed in a region facing the light shielding section, and between the light emitting element and the filtering layer; and a light receiving element formed in a region facing the light shielding section, and on the pixel circuit side in relation to the light emitting element.
    • 显示面板包括:在基板上以矩阵形成的多个像素电路; 覆盖所述多个像素电路的绝缘层; 连接到所述多个像素电路的多个发光元件,并且以矩阵形式布置在所述绝缘层上; 滤光层,其至少在面向发光元件的区域的一部分中具有透光部,以及形成在与透光部相同的平面中的遮光部,并且形成在与像素电路相反的一侧 发光元件; 在与所述遮光部对置的区域中形成的光反射部以及所述发光元件与所述滤光层之间的光反射部; 以及形成在面对遮光部的区域中的光接收元件,并且在像素电路侧相对于发光元件形成。
    • 5. 发明授权
    • Display driver circuit and DAC of a display device with partially overlapping positive and negative voltage ranges and reduced transistor breakdown voltage
    • 显示器件的显示驱动电路和DAC具有部分重叠的正负电压范围和降低的晶体管击穿电压
    • US08237691B2
    • 2012-08-07
    • US12167263
    • 2008-07-03
    • Kazuo Nakamura
    • Kazuo Nakamura
    • G06F3/038
    • G09G3/3688G09G3/2011G09G2310/027
    • A display driver circuit of a display device includes: a first DA converter for converting a digital data to a gray-scale potential within a first potential range; and a second DA converter for converting a digital data to a gray-scale potential within a second potential range lower than the first potential range. The first DA converter includes a first transistor of a first conductivity type outputting a gray-scale potential not less than the common potential. The second DA converter includes: a second transistor of the first conductivity type outputting a gray-scale potential not less than the common potential; and a third transistor of a second conductivity type outputting a gray-scale potential not more than the common potential. A substrate potential applied to a back gate of the second transistor is lower than a substrate potential applied to a back gate of the first transistor.
    • 显示装置的显示驱动电路包括:第一DA转换器,用于将数字数据转换为第一电位范围内的灰度级电位; 以及第二DA转换器,用于在低于第一电位范围的第二电位范围内将数字数据转换为灰度级电位。 第一DA转换器包括输出不小于公共电位的灰度电位的第一导电类型的第一晶体管。 第二DA转换器包括:第一导电类型的第二晶体管输出不小于公共电位的灰度电位; 以及第二导电类型的第三晶体管,其输出不大于所述公共电位的灰度电势。 施加到第二晶体管的背栅极的衬底电位低于施加到第一晶体管的背栅极的衬底电位。
    • 6. 发明授权
    • Data driver and display apparatus using the same including clock control circuit and shift register circuit
    • 数据驱动器和使用其的显示装置包括时钟控制电路和移位寄存器电路
    • US08223107B2
    • 2012-07-17
    • US11987860
    • 2007-12-05
    • Kazuo Nakamura
    • Kazuo Nakamura
    • G09G3/36
    • G11C19/28G11C19/00
    • A data driver circuit includes a clock control circuit configured to generate a shift clock signal in synchronization to a clock signal; a shift register circuit having flip-flops in cascade-connection and configured to shift a pulse signal in synchronization with the shift clock signal, and a control circuit configured to receive a display data in response to the shifted pulse signal from the shift register circuit and to drive data lines of a display section based on display data to display the display data on the display section. The flip-flops are grouped in units of N (N is an integer of 2 or more) flip-flops into M (M is an integer of 2 or more) partial shift registers, and the shift register circuit is reset in units of partial shift registers.
    • 数据驱动电路包括:时钟控制电路,被配置为与时钟信号同步地生成移位时钟信号; 移位寄存器电路,其具有级联连接的触发器并且被配置为与所述移位时钟信号同步地移位脉冲信号;以及控制电路,被配置为响应于来自所述移位寄存器电路的移位的脉冲信号而接收显示数据,以及 基于显示数据驱动显示部分的数据线,以在显示部分上显示显示数据。 触发器以N(N为2以上的整数)触发器为单位分组为M(M为2以上的整数)部分移位寄存器,移位寄存器电路以部分 移位寄存器
    • 7. 发明申请
    • SEGMENTED-IN-SERIES SOLID OXIDE FUEL CELL
    • SEGMENTED-IN-SERIES固体氧化物燃料电池
    • US20100285387A1
    • 2010-11-11
    • US12735270
    • 2008-12-24
    • Kenjiro FujitaKazuo NakamuraYoshio MatsuzakiMakoto Koi
    • Kenjiro FujitaKazuo NakamuraYoshio MatsuzakiMakoto Koi
    • H01M8/24
    • H01M8/1213H01M8/0204H01M8/1286H01M8/2425H01M8/2428
    • There is obtained a segmented-in-series solid oxide fuel cell provided with a current turnaround structure and containing a porous electrically insulating substrate having a fuel flow path extending from a fuel feed port to a fuel discharge port, provided therein, and a pair of the top and back surfaces, in parallel with the fuel flow path, together with a pair of side-faces of the porous electrically insulating substrate, in the transverse direction thereof, provided on the exterior thereof, wherein solid oxide fuel cells made up by sequentially stacking an interconnector adjacent to a fuel electrode layer, the fuel electrode layer, an electrolyte layer, and an air electrode layer, and an interconnector adjacent to the air electrode layer in that order so as to be in parallel with the fuel flow path are disposed at intervals on the pair of the top and back surfaces, respectively.
    • 获得具有电流翻转结构的分段式串联固体氧化物燃料电池,并且包含具有从设置在其中的燃料供给口延伸到燃料排出口的燃料流路的多孔电绝缘基板和一对 与燃料流动路径平行的顶表面和后表面与多孔电绝缘基板的横向方向上的一对侧面一起设置在其外部,其中固体氧化物燃料电池依次构成 布置与燃料电极层相邻的互连器,燃料电极层,电解质层和空气电极层以及与空气电极层相邻的与金属流路平行的顺序的互连器 分别在一对顶表面和后表面上的间隔。
    • 9. 发明授权
    • Semiconductor integrated circuit device and shift register for device driver
    • 半导体集成电路器件和器件驱动器的移位寄存器
    • US07477225B2
    • 2009-01-13
    • US11106710
    • 2005-04-15
    • Kazuo Nakamura
    • Kazuo Nakamura
    • G09G3/36
    • G09G3/3685G09G2310/027G09G2310/0286G09G2310/08G09G2330/021G09G2330/06G11C19/00
    • Current consumption in a start signal outputting circuit, and that in a clock signal conductor thereto, or the EMI is to be suppressed. An output from the last stage flipflop of a shift register, having multiple stages of flipflops, is supplied to a start signal outputting circuit. An output of the start signal outputting circuit is delivered as a start signal, while being delivered to a start signal output detection circuit. A detection signal from a start signal output detection circuit and an output of a non-last stage flipflop of the shift register are supplied to a clock stop circuit. Clock signals cease to be supplied by the clock stop circuit during a time period as from inputting of the detection signal until inputting of the output of the non-last stage flip-flop.
    • 启动信号输出电路中的电流消耗以及时钟信号导体中的电流消耗或EMI被抑制。 具有多级触发器的移位寄存器的最后级触发器的输出被提供给起始信号输出电路。 开始信号输出电路的输出作为起始信号传送,同时被传送到起始信号输出检测电路。 来自起始信号输出检测电路的检测信号和移位寄存器的非最后级触发器的输出被提供给时钟停止电路。 在从输入检测信号直到输入非最后级触发器的输入的时间段期间,时钟停止电路不再提供时钟信号。