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    • 1. 发明授权
    • Circuit for driving the base of a transistor
    • 用于驱动晶体管基极的电路
    • US4551635A
    • 1985-11-05
    • US417205
    • 1982-09-13
    • Kazuo Kuroki
    • Kazuo Kuroki
    • H03K17/60H03K3/26
    • H03K17/601H03K17/04126
    • Disclosed is an isolation circuit for a power transistor that enables a control circuit to turn the power transistor on and off, while insulating the control circuit from DC currents that may flow to or from the power transistor. The isolation circuit includes a first pulse transformer for receiving a pulse string signal corresponding to an ON command signal from the control circuit to alternatingly energize and de-energize the first pulse transformer. In addition, the isolation circuit includes a fast circuit path comprising a pair of serially connected diodes coupled between the secondary winding of the first pulse transformer and the base resistor of the power transistor for rapidly supplying base current drive to the transistor as soon as the first pulse transformer is energized. Also included in the isolation circuit is a base drive maintaining circuit coupled to the fast circuit path and to the base resistor of the power transistor. The maintaining circuit includes a capacitor that charges while the first pulse transformer is energized and discharges to supply base current drive to the power transistor when the first pulse transformer is de-energized. Furthermore, the isolation circuit includes a second pulse transformer for receiving a pulse signal corresponding to an OFF signal from the control circuit. The secondary winding of the second transformer being coupled to the base drive maintaining circuit for discharging the capacitor and terminating the base current drive to power transistor when the pulse signal corresponding to the OFF signal is received.
    • 公开了一种用于功率晶体管的隔离电路,其使得控制电路能够打开和关闭功率晶体管,同时使控制电路与可能流向功率晶体管的直流电流绝缘。 隔离电路包括第一脉冲变压器,用于接收与来自控制电路的ON命令信号相对应的脉冲串信号,以交替地给第一脉冲变压器供电和断电。 此外,隔离电路包括快速电路路径,其包括耦合在第一脉冲变压器的次级绕组和功率晶体管的基极电阻之间的一对串联连接的二极管,用于在第一个 脉冲变压器通电。 隔离电路中还包括耦合到快速电路路径和功率晶体管的基极电阻器的基极驱动保持电路。 保持电路包括在第一脉冲变压器通电时充电的电容器,并且当第一脉冲变压器断电时,放电以将基极电流驱动提供给功率晶体管。 此外,隔离电路包括第二脉冲变压器,用于接收对应于来自控制电路的OFF信号的脉冲信号。 当接收到对应于OFF信号的脉冲信号时,第二变压器的次级绕组被耦合到用于放电电容器的基极驱动维持电路并且将基极电流驱动端接到功率晶体管。
    • 2. 发明授权
    • Uninterruptible power supply apparatus
    • 不间断电源设备
    • US6104104A
    • 2000-08-15
    • US227536
    • 1999-01-11
    • Kazuo Kuroki
    • Kazuo Kuroki
    • H02J9/06H02M7/48H02J7/00
    • H02J9/06Y10T307/50Y10T307/615Y10T307/625
    • An uninterruptible power supply apparatus includes a storage battery for providing a DC voltage, a switch for switching from an AC power source for providing an AC voltage to the storage battery, and an AC-stabilizing circuit connected to an output side of the switch. The AC-stabilizing circuit performs an AC/AC conversion or a DC/AC conversion in response to a switching operation of the switch in order to output an AC voltage therefrom. Namely, for a commercial power supply, the AC-stabilizing circuit supplies a stable AC voltage despite variations in power supply voltage. The size of the apparatus is reduced, and its service life is prolonged.
    • 不间断电源装置包括用于提供DC电压的蓄电池,用于从用于向蓄电池提供AC电压的AC电源切换的开关,以及连接到开关的输出侧的AC稳定电路。 AC稳定电路响应于开关的开关操作来执行AC / AC转换或DC / AC转换,以从其输出AC电压。 也就是说,对于商用电源,尽管电源电压的变化,AC稳定电路提供稳定的AC电压。 设备尺寸减小,使用寿命延长。
    • 3. 发明授权
    • Inverters with reduced distributed inductance
    • 降低分布电感的变频器
    • US4617621A
    • 1986-10-14
    • US697779
    • 1985-02-04
    • Kazuo Kuroki
    • Kazuo Kuroki
    • H02M7/00H02H7/122
    • H02M7/003
    • In the particular embodiments described in the specification, an inverter connected to a DC source and a load includes two or more inverter units operating on a phase basis, and three connecting wires, consisting of two wires connecting each inverter unit and the power source and one wire connecting each inverter unit and the load, are arranged close to one another or twisted together. With this arrangement the distributed inductance is reduced not only for the wires connecting the DC source and the inverter but also for the wires connecting the inverter units.
    • 在本说明书中描述的特定实施例中,连接到直流电源和负载的逆变器包括两个或更多个以相位为基础的逆变器单元,以及三个连接线,由连接每个逆变器单元和电源的两根线和一个 连接每个逆变器单元和负载的电线彼此靠近或扭曲在一起。 通过这种布置,分配电感不仅对于连接直流电源和逆变器的电线而且对于连接逆变器单元的电线也减少了。
    • 6. 发明授权
    • Control circuit for switching transistors
    • 开关晶体管的控制电路
    • US4639823A
    • 1987-01-27
    • US682916
    • 1984-12-18
    • Kazuo Kuroki
    • Kazuo Kuroki
    • H03K17/0814H03K17/082H01H47/00H03K17/60
    • H03K17/0826H03K17/08146
    • In the particular embodiment of the invention described in the specification, a circuit for interrupting the operation of a switching transistor includes a reactor connected in series with the transistor emitter and a plurality of diodes connected in series between the reactor and the base of the transistor so that the electromotive force induced in the reactor when the reactor current decreases is supplied to the base of the transistor. This makes it possible to maintain the reactor storage time when the transistor is switched off and to adjust the fall time so that the changing rate (di/dt) of the current flowing in a snubber circuit for controlling overvoltage may be minimized so that the structural restrictions imposed on the snubber circuit can be eased and reliability is improved. Noise is also reduced because the current drop rate (-di/dt) when the transistor is switched off can be minimized.
    • 在本说明书中描述的本发明的特定实施例中,用于中断开关晶体管的操作的电路包括与晶体管发射极串联连接的电抗器和串联连接在电抗器和晶体管的基极之间的多个二极管 当电抗器电流减小时在电抗器中感应的电动势被提供给晶体管的基极。 这使得可以在晶体管截止时保持电抗器的存储时间并且调整下降时间,使得流过用于控制过电压的缓冲电路中的电流的变化率(di / dt)可以被最小化,使得结构 可以缓解对缓冲电路的限制,提高可靠性。 当晶体管关断时,电流下降率(-di / dt)可以降低,噪声也会降低。
    • 7. 发明授权
    • Rectifying circuit and control method therefor
    • 整流电路及其控制方法
    • US06437998B1
    • 2002-08-20
    • US09983027
    • 2001-10-22
    • Kazuaki MinoKazuo Kuroki
    • Kazuaki MinoKazuo Kuroki
    • H02M545
    • H02M7/2173H02M7/23
    • A series circuit of two switching devices and a series circuit of two diodes are connected together in parallel to constitute a bi-directional switch circuit for one phase. N bi-directional switch circuits are provided, and the junction between the switching devices of each of the switch circuits is connected to an AC input terminal of a corresponding phase via a reactor. A cathode of the diode series circuit of each switch circuit is connected to a positive output terminal via a diode, and an anode of the diode series circuit of each switch circuit is connected to a negative output terminal via a diode. Two capacitors are connected in series between the positive and negative output terminals, and the junction between the diodes of each switch circuit is connected to the junction between the two capacitors.
    • 两个开关器件的串联电路和两个二极管的串联电路并联连接在一起,构成一相双向开关电路。 提供N个双向开关电路,并且每个开关电路的开关器件之间的连接点通过反应器连接到相应相的AC输入端。 每个开关电路的二极管串联电路的阴极通过二极管连接到正输出端子,并且每个开关电路的二极管串联电路的阳极通过二极管连接到负输出端子。 两个电容器串联连接在正极和负极输出端子之间,并且每个开关电路的二极管之间的连接点连接到两个电容器之间的结。
    • 9. 发明授权
    • Variable-frequency oscillation circuit
    • 变频振荡电路
    • US4540945A
    • 1985-09-10
    • US413720
    • 1982-09-01
    • Kazuo Kuroki
    • Kazuo Kuroki
    • H03K23/00H02M7/493H03K23/66H03K3/72H03L7/18
    • H03K23/662
    • A highly stable, tunable oscillator circuit includes a crystal oscillator providing a reference pulse signal of frequency fcry, a voltage-to-frequency converter responsive to a control voltage vc for providing a control pulse signal of frequency fv substantially lower than fcry, and a flip-flop circuit receiving the reference and control signals and providing a negative going pulse signal synchronized with the reference signal and having a frequency fv and a pulse width equal to l/fcry. The signal provided by the flip-flop circuit and the complement of the reference signal are received by a NAND gate which periodically removes a pulse from the reference signal at intervals of l/fv and provides a resulting signal having a frequency of (fcry).sup.2 /(fcry+fv). The resulting signal is received by a frequency divider network which divides the frequency of resulting signal by an integer N and provides an output signal of a desired frequency. The output frequency is tunable by varying the frequency fv of the control signal by means of the control voltage vc. By selecting the frequencies of the reference and control signals such that fcry>>fv, a highly stable and smoothly tunable output signal is obtained.
    • 高度稳定的可调振荡器电路包括提供频率fcry的参考脉冲信号的晶体振荡器,响应于控制电压vc的电压 - 频率转换器,用于提供基本上低于fcry的频率fv的控制脉冲信号,以及翻转 接收参考和控制信号并提供与参考信号同步的负向脉冲信号,并具有等于1 / fcry的频率fv和脉冲宽度。 由触发器电路提供的信号和参考信号的补码由NAND门接收,NAND门以1 / fv的间隔周期性地从参考信号中去除脉冲,并提供具有频率(fcry)2的结果信号 /(fcry + fv)。 所得到的信号由分频器网络接收,分频器网络将得到的信号的频率除以整数N,并提供期望频率的输出信号。 输出频率可通过控制电压vc改变控制信号的频率fv来调节。 通过选择参考和控制信号的频率,使得获得fcry >> fv,获得高度稳定且平滑可调的输出信号。
    • 10. 发明授权
    • Variable-frequency oscillator having a crystal oscillator
    • 具有晶振的可变频振荡器
    • US4489279A
    • 1984-12-18
    • US413775
    • 1982-09-01
    • Kazuo Kuroki
    • Kazuo Kuroki
    • H03K23/64H03B5/32H03K5/00H03K21/00H03K3/72H03K3/037H03L7/18
    • H03K5/00006H03K21/00
    • A highly stable, tunable oscillator circuit includes a crystal oscillator providing a reference pulse signal of frequency Fco, a voltage-to-frequency converter responsive to a control voltage for providing a control pulse signal of frequency Fv substantially lower than Fco, a toggle circuit receiving the reference signal and providing a first and a second complementary signals, each having a frequency Fco/2 and the same pulse-width as the reference signal, a flip-flop circuit receiving the reference signal, the control signal and the first complementary signal and providing a pulse signal having frequency Fv and a pulse-width equal to the period of the reference signal, and synchronized with the first and second complementary signals. The signal provided by the flip-flop circuit is logically combined with the first complementary signal in and AND gate. The output of the AND gate is then logically combined with the second complementary signal in an OR gate to derive a combined signal of frequency (Fco/2)+Fv. The combined signal is received by a frequency divider network which divides the frequency of the combined signal by an integer N and provides an output signal at a desired frequency. By selecting the frequencies of the reference, control and output signal such that Fco>>Fv>>Fo, a highly stable, smoothly tunable output signal is obtained.
    • 高度稳定的可调振荡器电路包括提供频率Fco的参考脉冲信号的晶体振荡器,响应于用于提供基本上低于Fco的频率Fv的控制脉冲信号的控制电压的电压 - 频率转换器,触发电路接收 参考信号,并提供第一和第二互补信号,每个互补信号具有与参考信号相同的频率Fco / 2和相同的脉冲宽度;接收参考信号的触发器电路,控制信号和第一互补信号;以及 提供具有频率Fv的脉冲信号和与参考信号的周期相等的脉冲宽度,并与第一和第二互补信号同步。 由触发器电路提供的信号与第一个互补信号和AND门逻辑组合。 然后,与门的输出在OR门中与第二互补信号逻辑地组合,以得到频率(Fco / 2)+ Fv的组合信号。 组合信号由分频器网络接收,分频器网络将组合信号的频率除以整数N,并以期望的频率提供输出信号。 通过选择参考频率,控制和输出信号,使得Fco >> Fv >> Fo获得了高度稳定,平滑可调的输出信号。