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    • 2. 发明授权
    • Tape cassette having a minimized clamp set
    • 磁带盒具有最小的夹具组
    • US5701225A
    • 1997-12-23
    • US467823
    • 1995-06-06
    • Hideki OkumuraKazunori SakamotoKiyoshi KobataKazunori Kubota
    • Hideki OkumuraKazunori SakamotoKiyoshi KobataKazunori Kubota
    • G11B23/087G11B5/024G11B23/26G11B23/20
    • G11B23/26
    • A tape cassette has a pair of reels each including a reel hub, with each hub having an anchor groove defined in an outer peripheral surface thereof so as to extend in a lengthwise direction thereof. A generally elongated clamping piece is received within the anchor groove and has a predetermined width as measured circumferentially of the reel hub. A tape medium includes a length of magnetic recording tape having opposite ends, and a leader tape connected with each of the opposite ends of the length of magnetic recording tape by of a splicing tape of a predetermined length. One end of the leader tape remote from the length of magnetic recording tape is received within the reel hub and anchored to the reel hub with the clamping piece snapped into the anchor groove. The splicing tape is, when the tape medium is wound around the reel hub, positioned immediately radially outwardly of and encompassing the predetermined width of the clamping piece.
    • 磁带盒具有一对卷轴,每一个卷盘均包括卷盘毂,每个轮毂在其外圆周表面上具有一定位于其长度方向上的锚定槽。 通常细长的夹紧件容纳在锚定槽内并且具有沿卷轴毂周向测量的预定宽度。 磁带介质包括具有相对端的长度的磁记录带,以及通过预定长度的拼接带与磁记录带的长度的每个相对端连接的引带。 远离磁记录带长度的引导带的一端被接收在卷轴轮毂内并且被夹紧在锚定槽中并且锚固到卷轴毂上。 当磁带介质卷绕在卷盘毂上时,拼接胶带位于夹紧片的预定宽度的径向外侧并且包围预定宽度的位置。
    • 3. 发明申请
    • POWER SEMICONDUCTOR DEVICE
    • 功率半导体器件
    • US20130069145A1
    • 2013-03-21
    • US13419396
    • 2012-03-13
    • Takahiro KawanoHideki Okumura
    • Takahiro KawanoHideki Okumura
    • H01L29/78H01L23/48
    • H01L23/48H01L29/0653H01L29/0661H01L29/407H01L29/7811H01L29/7813H01L2924/0002H01L2924/00
    • A power semiconductor device according to one embodiment includes a first electrode, a semiconductor substrate provided on the first electrode, and an insulating member. A terminal trench is made in the upper surface of the semiconductor substrate in a region including a boundary between a cell region and a terminal region. The semiconductor substrate includes a first portion of a first conductivity type and connected to the first electrode, a second portion of the first conductivity type, a third portion of a second conductivity type provided on the second portion in the cell region and connected to the second electrode, and a fourth portion of the first conductivity type selectively provided on the third portion and connected to the second electrode. The insulating member is disposed between the third portion and the second portion in a direction from the cell region toward the terminal region.
    • 根据一个实施例的功率半导体器件包括第一电极,设置在第一电极上的半导体衬底和绝缘构件。 在包括单元区域和端子区域之间的边界的区域中,在半导体衬底的上表面中形成端子沟槽。 半导体衬底包括第一导电类型的第一部分并连接到第一电极,第一导电类型的第二部分,第二导电类型的第三部分,设置在电池区域的第二部分上,并连接到第二导电类型的第二部分 电极,以及选择性地设置在第三部分上并连接到第二电极的第一导电类型的第四部分。 绝缘构件在从单元区域朝向端子区域的方向上配置在第三部分和第二部分之间。
    • 4. 发明授权
    • Semiconductor device and method for manufacturing the same
    • 半导体装置及其制造方法
    • US08173509B2
    • 2012-05-08
    • US12714586
    • 2010-03-01
    • Hideki OkumuraTakayoshi NogamiHiroto Misawa
    • Hideki OkumuraTakayoshi NogamiHiroto Misawa
    • H01L29/80H01L31/112
    • H01L29/7813H01L29/0696H01L29/1095H01L29/41766H01L29/6634H01L29/66348H01L29/66727H01L29/66734H01L29/7397
    • A type semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type; a third semiconductor layer of the first conductivity type; a plurality of gate electrodes which are formed in gate trenches via gate insulating films, the gate trenches being formed through the second semiconductor layer and the third semiconductor layer; a plurality of impurity regions of the second conductivity type which are formed at regions below bottoms of contact trenches, the contact trenches being formed at the third semiconductor layer in a thickness direction thereof between corresponding ones of the gate trenches and longitudinal cross sections of the contact trenches being shaped in ellipse, respectively; first electrodes which are formed so as to embed the contact trenches and contacted with the impurity regions, respectively; and a second electrode formed on a rear surface of the semiconductor substrate.
    • 一种半导体器件包括:第一导电类型的第一半导体层; 第二导电类型的第二半导体层; 第一导电类型的第三半导体层; 通过栅极绝缘膜形成在栅极沟槽中的多个栅电极,栅极沟槽通过第二半导体层和第三半导体层形成; 多个第二导电类型的杂质区域形成在接触沟底部下方的区域处,所述接触沟槽在第三半导体层的厚度方向上形成在相应的栅极沟槽和触点的纵向截面之间 沟槽分别成椭圆形; 第一电极被形成为分别嵌入接触沟槽并与杂质区域接触; 以及形成在所述半导体衬底的后表面上的第二电极。
    • 6. 发明授权
    • Vertical type semiconductor device
    • 垂直型半导体器件
    • US07391077B2
    • 2008-06-24
    • US10983658
    • 2004-11-09
    • Kenichi TokanoAtsuko YamashitaKoichi TakahashiHideki OkumuraShingo Sato
    • Kenichi TokanoAtsuko YamashitaKoichi TakahashiHideki OkumuraShingo Sato
    • H01L21/764
    • H01L29/7802H01L29/0634H01L29/0653H01L29/66712
    • Provided is a semiconductor device including a semiconductor substrate which includes a first semiconductor layer of a first conductivity and a pair of second semiconductor layers disposed on the first semiconductor layer and spaced apart from each other to form a trench therebetween, wherein the second semiconductor layer includes a first impurity-diffused region of the first conductivity extending from a lower surface toward an upper surface of the second semiconductor layer, and a second impurity-diffused region of a second conductivity which extends from the lower surface toward the upper surface and is adjacent to the first impurity-diffused region, an insulating layer covering a sidewall of the trench, and a cap layer which is in contact with the semiconductor substrate and covers an opening of the trench to form an enclosed space in the trench, a material of the cap layer being almost the same as that of the semiconductor substrate.
    • 提供了一种半导体器件,其包括半导体衬底,该半导体衬底包括第一导电性的第一半导体层和设置在第一半导体层上并且彼此间隔开以在其间形成沟槽的一对第二半导体层,其中第二半导体层包括 从第一半导体层的下表面向上表面延伸的第一导电性的第一杂质扩散区和从下表面向上表面延伸的第二导电性的第二杂质扩散区, 第一杂质扩散区域,覆盖沟槽的侧壁的绝缘层,以及与半导体衬底接触并覆盖沟槽的开口以在沟槽中形成封闭空间的覆盖层,帽的材料 层几乎与半导体衬底的层相同。
    • 10. 发明申请
    • Method and Device for Machining Cracking Groove for Connecting Rod
    • 用于加工连杆开裂槽的方法和装置
    • US20070256300A1
    • 2007-11-08
    • US11662609
    • 2005-11-22
    • Hideki OkumuraTsuguo Koguchi
    • Hideki OkumuraTsuguo Koguchi
    • B23P13/00
    • F16C9/045B23C3/30B23C2215/245B23C2270/18B23D45/003B23D47/12Y10T29/49288Y10T409/309576
    • A method and a device for machining a cracking groove for a connecting rod, wherein a drive pulley is rotated under the driving action of a rotatingly driving source installed in a body to transmit the rotatingly driving force of the drive pulley to a driven pulley through a drive force transmission belt so as to rotate a groove machining part integrally connected to the driven pulley. In the groove machining part, a spindle integrally connected to the driven pulley is rotatably supported on a support part, and a saw having a plurality of blade parts on the outer peripheral surface thereof is installed on the holding part of the spindle. A first groove of roughly V-shape in cross section is formed in the large end hole of a connecting rod by inserting the metal saw into the large end hole of the connecting rod, and a second groove of roughly V-shape in cross section which is symmetrical with the first groove is formed in the connecting rod at a position opposed to the first groove with respect to the axis of the connecting rod.
    • 一种用于加工用于连杆的裂缝槽的方法和装置,其中驱动皮带轮在安装在本体内的旋转驱动源的驱动作用下旋转,以将驱动滑轮的旋转驱动力传递到从动滑轮,通过 驱动力传递带,以使与从动带轮一体连接的槽加工部旋转。 在槽加工部中,与从动带轮一体连接的心轴可旋转地支撑在支撑部上,在其外周面上具有多个叶片部的锯安装在主轴的保持部上。 通过将金属锯插入连杆的大端孔中,在连接杆的大端孔中形成大致V字形的第一槽,并且横截面为大致V形的第二槽 是对称的,第一槽在相对于连杆的轴线与第一槽相对的位置处形成在连杆中。