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1. 发明授权

US5976668A Base film for magnetic recording medium and magnetic recording medium using same 失效
标题翻译：用于磁记录介质的基膜和使用其的磁记录介质
公开(公告)号：US5976668A
公开(公告)日：1999-11-02
申请号：US920568
申请日：1997-08-29
申请人： Kazunobu Chiba , Jota Ito , Tsutomu Takeda , Shinichi Matsumura
发明人： Kazunobu Chiba , Jota Ito , Tsutomu Takeda , Shinichi Matsumura
IPC分类号： G11B5/73 , G11B5/738 , G11B5/704
CPC分类号： G11B5/7325 , G11B5/73 , G11B5/738 , Y10S428/90 , Y10T428/24355 , Y10T428/24942 , Y10T428/31678
摘要： A base film for a magnetic recording medium including one surface, on which a magnetic layer can be formed, having a surface roughness of center line average roughness Ra of 10 nm or less, a ten-point average roughness Rz of 80 nm or less and a maximum height Rmax of 150 nm or less. The base film includes the other surface having a surface roughness of center line average roughness Ra of 4.5 to 20 nm, a ten-point average roughness Rz of 35 to 350 nm and a maximum height Rmax of 40 to 400 nm.
摘要翻译：一种用于磁记录介质的基膜，包括其中可以形成磁性层的一个表面，其中心线平均粗糙度Ra的表面粗糙度为10nm以下，十点平均粗糙度Rz为80nm以下，最大高度Rmax为150nm以下。基膜包括中心线平均粗糙度Ra的表面粗糙度为4.5〜20nm，十点平均粗糙度Rz为35〜350nm，最大高度Rmax为40〜400nm的另一面。

2. 发明授权

US09028746B2 Build-up welding material, deposited metal, and member with deposited metal 有权
标题翻译：堆积焊接材料，沉积金属和具有沉积金属的构件
公开(公告)号：US09028746B2
公开(公告)日：2015-05-12
申请号：US13822893
申请日：2011-09-28
申请人： Tsutomu Takeda , Ryuichi Kobayashi
发明人： Tsutomu Takeda , Ryuichi Kobayashi
IPC分类号： C22C38/02 , C22C38/04 , C22C38/34 , C22C38/44 , C22C38/46 , B23K35/30 , B23K9/04 , B23K35/02 , B23K35/24 , C23C30/00
CPC分类号： B23K35/3086 , B23K35/0261 , B23K35/24 , B23K35/30 , B23K35/3053 , B23K35/308 , C21D2211/004 , C21D2211/005 , C22C38/02 , C22C38/04 , C22C38/34 , C22C38/44 , C22C38/46 , C23C30/00 , Y10T428/12965
摘要： Provided a build-up welding material which contains C: 0.2 to 1.5 mass %, Si: 0.5 to 2 mass %, Mn: 0.5 to 2 mass %, Cr: 20 to 40 mass %, Mo: 2 to 6 mass %, Ni: 0.5 to 6 mass %, V: 1 to 5 mass % and W: 0.5 to 5 mass %, with the balance being Fe and unavoidable impurities.
摘要翻译：本发明提供一种含有C：0.2〜1.5质量％，Si：0.5〜2质量％，Mn：0.5〜2质量％，Cr：20〜40质量％，Mo：2〜6质量％，Ni ：0.5〜6质量％，V：1〜5质量％，W：0.5〜5质量％，余量由Fe和不可避免的杂质构成。

3. 发明授权

US08604357B2 Wiring board having via and method forming a via in a wiring board 失效
标题翻译：具有通孔的布线板和在布线板中形成通孔的方法
公开(公告)号：US08604357B2
公开(公告)日：2013-12-10
申请号：US12501044
申请日：2009-07-10
申请人： Tsutomu Takeda
发明人： Tsutomu Takeda
IPC分类号： H05K3/42 , H05K3/30 , H05K1/11
CPC分类号： H05K1/115 , H05K1/0237 , H05K3/42 , H05K3/429 , H05K2201/09627 , H05K2201/09636 , H05K2201/09645 , H05K2201/09809 , H05K2203/0242 , H05K2203/175
摘要： A wiring board has a plurality of wiring layers, a first land, a second land, a first via and a second via. The first land and the second land are formed on at least one wiring layer of the wiring board and are disposed to partially overlap with each other. The first via and the second via are formed in association with the first land and the second land, respectively. The first via and the second via electrically connect a first wiring layer and a second wiring layer of the plurality of wiring layers to each other. The wiring board has a separator that is formed by a hole that separates the first land and the second land from each other.
摘要翻译：布线板具有多个布线层，第一片，第二片，第一片和第二片。第一焊盘和第二焊盘形成在布线板的至少一个布线层上并且彼此部分地重叠。第一通孔和第二通孔分别与第一焊盘和第二焊盘相关联地形成。第一通孔和第二通孔将多个布线层中的第一布线层和第二布线层彼此电连接。布线板具有由将第一焊盘和第二焊盘彼此分隔开的孔形成的隔板。

4. 发明申请

US20130171472A1 BUILD-UP WELDING MATERIAL, DEPOSITED METAL, AND MEMBER WITH DEPOSITED METAL 有权
标题翻译：建筑焊接材料，沉积金属和具有沉积金属的构件
公开(公告)号：US20130171472A1
公开(公告)日：2013-07-04
申请号：US13822893
申请日：2011-09-28
申请人： Tsutomu Takeda , Ryuichi Kobayashi
发明人： Tsutomu Takeda , Ryuichi Kobayashi
IPC分类号： B23K35/30
CPC分类号： B23K35/3086 , B23K35/0261 , B23K35/24 , B23K35/30 , B23K35/3053 , B23K35/308 , C21D2211/004 , C21D2211/005 , C22C38/02 , C22C38/04 , C22C38/34 , C22C38/44 , C22C38/46 , C23C30/00 , Y10T428/12965
摘要： Provided a build-up welding material which contains C: 0.2 to 1.5 mass %, Si: 0.5 to 2 mass %, Mn: 0.5 to 2 mass %, Cr: 20 to 40 mass %, Mo: 2 to 6 mass %, Ni: 0.5 to 6 mass %, V: 1 to 5 mass % and W: 0.5 to 5 mass %, with the balance being Fe and unavoidable impurities.
摘要翻译：本发明提供一种含有C：0.2〜1.5质量％，Si：0.5〜2质量％，Mn：0.5〜2质量％，Cr：20〜40质量％，Mo：2〜6质量％，Ni ：0.5〜6质量％，V：1〜5质量％，W：0.5〜5质量％，余量为Fe和不可避免的杂质。

5. 发明申请

US20100012366A1 WIRING BOARD HAVING VIA AND METHOD FORMING A VIA IN A WIRING BOARD 失效
标题翻译：具有通风方式的接线板和在接线板上形成通风的方法
公开(公告)号：US20100012366A1
公开(公告)日：2010-01-21
申请号：US12501044
申请日：2009-07-10
申请人： Tsutomu Takeda
发明人： Tsutomu Takeda
IPC分类号： H05K1/11 , H05K3/02
CPC分类号： H05K1/115 , H05K1/0237 , H05K3/42 , H05K3/429 , H05K2201/09627 , H05K2201/09636 , H05K2201/09645 , H05K2201/09809 , H05K2203/0242 , H05K2203/175
摘要： A wiring board has a plurality of wiring layers, a first land, a second land, a first via and a second via. The first land and the second land are formed on at least one wiring layer of the wiring board and are disposed to partially overlap with each other. The first via and the second via are formed in association with the first land and the second land, respectively. The first via and the second via electrically connect a first wiring layer and a second wiring layer of the plurality of wiring layers to each other. The wiring board has a separator that is formed by a hole that separates the first land and the second land from each other.
摘要翻译：布线板具有多个布线层，第一片，第二片，第一片和第二片。第一焊盘和第二焊盘形成在布线板的至少一个布线层上并且彼此部分地重叠。第一通孔和第二通孔分别与第一焊盘和第二焊盘相关联地形成。第一通孔和第二通孔将多个布线层中的第一布线层和第二布线层彼此电连接。布线板具有由将第一焊盘和第二焊盘彼此分隔开的孔形成的隔板。

6. 发明授权

US07750249B2 Multilayer printed circuit board and method of manufacturing same 有权
标题翻译：多层印刷电路板及其制造方法
公开(公告)号：US07750249B2
公开(公告)日：2010-07-06
申请号：US12042484
申请日：2008-03-05
申请人： Tsutomu Takeda
发明人： Tsutomu Takeda
IPC分类号： H01R12/04
CPC分类号： H05K1/115 , H01L2224/16225 , H01L2924/15174 , H01L2924/15184 , H01L2924/15311 , H05K1/0222 , H05K1/112 , H05K3/0047 , H05K3/429 , H05K3/4602 , H05K2201/09536 , H05K2201/09645 , H05K2201/09809 , Y10T29/4913 , Y10T29/49165
摘要： A printed circuit board is provided which is capable of shortening intervals among core layer vias and suppressing high impedance. After the core layer vias each having a cylindrical conducting layer are formed so that conducting portions come into contact with one another, a punching process is performed along a symmetric axis of each of four core layer vias so that a through-hole of a specified diameter passes through a core board to form the core layer vias separated from one another and the through-hole is filled with an insulator and a punching process is performed along a central axis of the through-hole filled with the insulator so as to pass through the core board to form the through-hole having a diameter being shorter than that of the through-hole and the conducting layer is formed on an inside wall of the through-hole to form the core layer via.
摘要翻译：提供一种印刷电路板，其能够缩短芯层通孔之间的间隔并抑制高阻抗。在形成具有圆柱形导电层的芯层通孔之后，导电部分彼此接触，沿着四个芯层通孔中的每一个的对称轴进行冲压加工，使得具有特定直径的通孔通过芯板形成彼此分离的芯层通孔，并且通孔填充有绝缘体，并且沿着填充有绝缘体的通孔的中心轴进行冲压加工，以便穿过绝缘体形成直径比通孔的直径短的通孔，并且在通孔的内壁上形成导电层以形成芯层通孔。

7. 发明授权

US09136210B2 Interposer and semiconductor device 有权
标题翻译：内插器和半导体器件
公开(公告)号：US09136210B2
公开(公告)日：2015-09-15
申请号：US13310896
申请日：2011-12-05
申请人： Tsutomu Takeda
发明人： Tsutomu Takeda
IPC分类号： H01L23/498 , H01L23/13 , H01L29/06
CPC分类号： H01L23/49811 , H01L23/13 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L29/0657 , H01L2224/16225 , H01L2224/16227 , H01L2924/1515 , H01L2924/15311
摘要： An interposer includes a substrate includes a plurality of penetrating electrodes, and a wiring portion formed on the substrate, in which the wiring portion includes a wiring layer electrically connected to the penetrating electrodes and an insulating layer covering the wiring layer. The interposer includes a plurality of first UBM structures provided at a side opposite the substrate of the wiring portion, in which the first UBM structures are electrically connected to the wiring layer. The interposer includes a plurality of bumps provided at the side opposite the wiring portion of the substrate, in which the plurality of bumps is electrically connected to each of the penetrating electrodes via a plurality of second UBM structures.
摘要翻译：插入件包括：基板，包括多个穿透电极;以及布线部，形成在所述基板上，所述布线部分包括与所述穿透电极电连接的布线层和覆盖所述布线层的绝缘层。插入器包括多个第一UBM结构，其设置在与布线部分的基板相对的一侧，其中第一UBM结构电连接到布线层。插入器包括设置在与基板的布线部分相对的一侧的多个凸块，其中多个凸块经由多个第二UBM结构电连接到每个穿透电极。

8. 发明授权

US08507807B2 Wiring board 有权
标题翻译：接线板
公开(公告)号：US08507807B2
公开(公告)日：2013-08-13
申请号：US13024897
申请日：2011-02-10
申请人： Tsutomu Takeda
发明人： Tsutomu Takeda
IPC分类号： H05K1/11
CPC分类号： H05K1/0251 , H01L2924/15311 , H01L2924/19051 , H05K1/0231 , H05K1/162 , H05K3/0047 , H05K3/429 , H05K3/4623 , H05K2201/0355 , H05K2201/09809 , H05K2201/09845 , H05K2201/09854 , H05K2203/0207 , H05K2203/1572
摘要： A wiring board includes at least one signal layer, at least one ground layer, at least one power plane, at least one power supply via that electrically conducts wiring over one substrate surface where a semiconductor device chip is mounted, wiring over another substrate surface, and the power plane, and signal wiring for performing signal transmission between a plurality of semiconductor device chips. The power plane is placed to the one substrate surface side than the signal wiring. The power supply via is composed of a large diameter aperture and a small diameter aperture. The large diameter aperture has a relatively large diameter and is formed from the one substrate surface to the power plane, and the small diameter aperture has a relatively small diameter and is formed from the power plane to the other substrate surface.
摘要翻译：布线板包括至少一个信号层，至少一个接地层，至少一个电力平面，至少一个电源通孔，该电源通过一个衬底表面上电导线，半导体器件芯片安装在一个衬底表面上，在另一个衬底表面上布线，以及用于在多个半导体器件芯片之间进行信号传输的信号布线。电源平面被放置在与信号布线相对的一个基板表面侧。电源通孔由大直径孔径和小直径孔径组成。大直径孔径具有相对大的直径，并且由一个基板表面到动力平面形成，并且小直径孔径具有相对较小的直径并且从动力平面形成到另一个基底表面。

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