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1. 发明授权

US5352943A ECL to GaAs logic level shift interface circuit 失效
标题翻译： ECL到GaAs逻辑电平移位接口电路
公开(公告)号：US5352943A
公开(公告)日：1994-10-04
申请号：US13641
申请日：1993-02-04
申请人： Kazuhisa Tsukahara , Yoshiaki Kaneko , Maya Koyanagi
发明人： Kazuhisa Tsukahara , Yoshiaki Kaneko , Maya Koyanagi
IPC分类号： H03K19/0185 , H03K19/092 , H03K17/16
CPC分类号： H03K19/018542
摘要： A compound semiconductor integrated circuit is adapted to provide an interface with respect to an internal circuit which is driven by first and second power source voltages and operates responsive to a logic signal having a predetermined logic level which is different from an emitter-coupled logic level. The compound semiconductor integrated circuit includes an input circuit part which is driven by the first and third power source voltages and receives an input logic signal having the emitter-coupled logic level, and an output circuit part which is driven by the first and second power source voltages and converts an output signal of the input circuit part into a signal having the predetermined logic level. The second power source voltage is lower than the first power source voltage. The third power source voltage is different from the second power source voltage and is lower than the first power source voltage. The output circuit part supplies an output thereof to the internal circuit.
摘要翻译：复合半导体集成电路适于提供相对于由第一和第二电源电压驱动的内部电路的接口，并且响应于具有与发射极耦合逻辑电平不同的预定逻辑电平的逻辑信号来操作。复合半导体集成电路包括由第一和第三电源电压驱动并接收具有发射极耦合逻辑电平的输入逻辑信号的输入电路部分和由第一和第二电源驱动的输出电路部分电压并将输入电路部分的输出信号转换成具有预定逻辑电平的信号。第二电源电压低于第一电源电压。第三电源电压与第二电源电压不同，低于第一电源电压。输出电路部分将其输出提供给内部电路。

2. 发明授权

US5592108A Interface circuit adapted for connection to following circuit using metal-semiconductor type transistor 失效
标题翻译：接口电路适用于使用金属半导体型晶体管连接到后续电路
公开(公告)号：US5592108A
公开(公告)日：1997-01-07
申请号：US506638
申请日：1995-07-25
申请人： Kazuhisa Tsukahara
发明人： Kazuhisa Tsukahara
IPC分类号： H03K19/0175 , H03K19/0185 , H03K19/0952
CPC分类号： H03K19/018535
摘要： An interface circuit includes an input current limiting circuit for limiting a current of an input signal fed from a preceding circuit, thereby outputting the current-limited signal to a following circuit which is constituted using a MES type transistor. The interface circuit also includes a level shifting circuit supplied with a first higher power supply voltage and a lower power supply voltage, for converting a level of the current-limited signal into a logic level of the following circuit which is supplied with a second higher power supply voltage. The interface circuit further includes a level judging circuit connected between the input current limiting circuit and the level shifting circuit, for judging a logic threshold level of the input signal based on a predetermined level reference voltage. By the constitution, it is possible to adapt the interface circuit for connection to the following circuit constituted using MES type transistors.
摘要翻译：接口电路包括用于限制从先前电路馈送的输入信号的电流的输入限流电路，从而将电流限制信号输出到使用MES型晶体管构成的跟随电路。接口电路还包括提供有第一较高电源电压和较低电源电压的电平移位电路，用于将限流信号的电平转换成提供有第二较高功率的后续电路的逻辑电平电源电压。接口电路还包括连接在输入限流电路和电平移动电路之间的电平判断电路，用于基于预定电平参考电压来判断输入信号的逻辑门限电平。通过该结构，可以使用MES型晶体管构成的后续电路来连接接口电路。

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