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1. 发明授权

US5930676A Multilayered interconnection substrate and process for fabricating the same 失效
标题翻译：多层互连基板及其制造方法
公开(公告)号：US5930676A
公开(公告)日：1999-07-27
申请号：US795151
申请日：1997-02-07
申请人： Kazuhiro Noda , Shinji Nakamura , Hisao Hayashi
发明人： Kazuhiro Noda , Shinji Nakamura , Hisao Hayashi
IPC分类号： H01L21/28 , H01L21/3205 , H01L21/336 , H01L21/768 , H01L23/12 , H01L23/498 , H01L23/52 , H01L23/522 , H01L23/538 , H01L27/12 , H01L29/786 , H05K1/00 , H05K3/40 , G03C5/00
CPC分类号： H01L23/49894 , H01L23/5383 , H01L2924/0002 , H05K3/4038 , H05K3/4676
摘要： A multilayered interconnection substrate prevents contact failure from occurring and a process for fabricating the same wherein a multilayered interconnection substrate comprises a first interconnection layer formed on a substrate, at least two layers of insulation films differing in composition from each other are formed on the first interconnection layer. The insulation layers have at least one contact hole formed in such a manner to expose the selected portion of the first interconnection layer. A resin wall buries stepped portions formed on an inter-peripheral portion of the contact hole and a second interconnection layer formed inside the contact hole along the resin wall which is electrically connected to the first interconnection layer exposed at the bottom portion of the contact hole.
摘要翻译：多层互连衬底防止发生接触不良及其制造方法，其中多层互连衬底包括形成在衬底上的第一互连层，在第一互连上形成至少两层不同组成的绝缘膜层。绝缘层具有形成为暴露第一互连层的选定部分的至少一个接触孔。树脂壁埋设形成在接触孔的相邻周边部分上的阶梯部分，以及形成在接触孔内部的树脂壁的第二互连层，该第二互连层电连接到暴露在接触孔底部的第一互连层。

2. 发明授权

US5616960A Multilayered interconnection substrate having a resin wall formed on side surfaces of a contact hole 失效
标题翻译：多层互连基板，具有形成在接触孔的侧面上的树脂壁
公开(公告)号：US5616960A
公开(公告)日：1997-04-01
申请号：US271133
申请日：1994-07-06
申请人： Kazuhiro Noda , Shinji Nakamura , Hisao Hayashi
发明人： Kazuhiro Noda , Shinji Nakamura , Hisao Hayashi
IPC分类号： H01L21/28 , H01L21/3205 , H01L21/336 , H01L21/768 , H01L23/12 , H01L23/498 , H01L23/52 , H01L23/522 , H01L23/538 , H01L27/12 , H01L29/786 , H05K1/00 , H05K3/40 , H01L23/58
CPC分类号： H01L23/49894 , H01L23/5383 , H01L2924/0002 , H05K3/4038 , H05K3/4676
摘要： A multilayered interconnection substrate which prevents contact failure from occurring and a process for fabricating the same, said multilayered interconnection substrate comprising a first interconnection layer formed on a substrate, at least two layers of insulation films differing in composition from each other and being formed on said first interconnection layer, provided that the insulation layers comprise at least one contact hole formed in such a manner to expose the selected portion of said first interconnection layer, a resin wall which buries the stepped portions formed on the inner peripheral portion of said contact hole, and a second interconnection layer formed inside said contact hole along said resin wall and being electrically connected to the first interconnection layer exposed at the bottom portion of the contact hole.
摘要翻译：一种防止接触不良发生的多层互连衬底及其制造方法，所述多层互连衬底包括形成在衬底上的第一互连层，至少两层不同组成的绝缘膜，并形成在所述第一互连层，只要绝缘层包括以暴露所述第一互连层的选定部分的方式形成的至少一个接触孔，将形成在所述接触孔的内周部上的台阶部分的树脂壁，以及沿着所述树脂壁在所述接触孔内形成的第二互连层，并且电连接到暴露在接触孔底部的第一互连层。

3. 发明授权

US5585951A Active-matrix substrate 失效
标题翻译：有源矩阵衬底
公开(公告)号：US5585951A
公开(公告)日：1996-12-17
申请号：US172644
申请日：1993-12-23
申请人： Kazuhiro Noda , Shinji Nakamua , Hisao Hayashi , Hisashi Kadota
发明人： Kazuhiro Noda , Shinji Nakamua , Hisao Hayashi , Hisashi Kadota
IPC分类号： G02F1/1362 , G02F1/1333 , G02F1/136
CPC分类号： G02F1/136227 , G02F1/136209 , G02F2001/136222
摘要： An active-matrix substrate has a layered structure in which an upper region including a plurality of pixel electrodes arranged in a matrix and a lower region including a plurality of thin film transistors for driving the individual pixel electrodes are overlapped on each other. A planarization layer is interposed between both of the substrates. An active-matrix liquid crystal display device includes a main substrate and a facing substrate which are disposed to face to each other at a specified interval. A liquid crystal layer having a specified thickness is held between both of the substrates. A device bus line area including a plurality of thin film transistor devices and bus lines is formed on the surface of the main substrate. A planarization layer is formed to embed the irregularities on the surface of the device bus line area. Pixel electrodes in a matrix are formed on the flat surface of the planarization layer. An interval dimension between the adjacent pixel electrodes is set to be larger than a thickness dimension B of the liquid crystal layer, so that the subsidiary lateral electric field is made smaller than the normal vertical electric field.
摘要翻译：有源矩阵基板具有层叠结构，其中包括排列成矩阵的多个像素电极的上部区域和包括用于驱动各个像素电极的多个薄膜晶体管的下部区域彼此重叠。在两个基板之间插入平坦化层。有源矩阵液晶显示装置包括以指定间隔彼此相对设置的主基板和面对基板。具有特定厚度的液晶层保持在两个基板之间。在主基板的表面上形成包括多个薄膜晶体管器件和总线的器件总线线路区域。形成平坦化层以将不规则物嵌入设备总线区域的表面上。在平坦化层的平坦表面上形成矩阵中的像素电极。相邻像素电极之间的间隔尺寸被设定为大于液晶层的厚度尺寸B，使得辅助横向电场小于正常垂直电场。

4. 发明授权

US08193443B2 Photovoltaic cell 失效
标题翻译：光伏电池
公开(公告)号：US08193443B2
公开(公告)日：2012-06-05
申请号：US11963090
申请日：2007-12-21
申请人： Michael Duerr , Gabriele Nelles , Akio Yasuda , Masahiro Morooka , Yusuke Suzuki , Kazuhiro Noda
发明人： Michael Duerr , Gabriele Nelles , Akio Yasuda , Masahiro Morooka , Yusuke Suzuki , Kazuhiro Noda
IPC分类号： H01L33/0384
CPC分类号： H01G9/2031 , H01G9/2022 , Y02E10/542
摘要： The present invention relates to a photovoltaic cell, a method of manufacturing such photovoltaic cell, and to uses of such cell.
摘要翻译：本发明涉及光伏电池，制造这种光伏电池的方法以及这种电池的使用。

5. 外观设计

USD658776S1 Sample tube holder stocker for clinical laboratory automation system 有权
标题翻译：用于临床实验室自动化系统的样品管架储料器
公开(公告)号：USD658776S1
公开(公告)日：2012-05-01
申请号：US29384376
申请日：2011-01-31
申请人： Mitsuru Oonuma , Yoko Sato , Akira Omachi , Tetsuya Isobe , Kazuhiro Noda
设计人： Mitsuru Oonuma , Yoko Sato , Akira Omachi , Tetsuya Isobe , Kazuhiro Noda

6. 发明申请

US20110155223A1 DYE-SENSITIZED SOLAR CELL AND A METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：透明的太阳能电池及其制造方法
公开(公告)号：US20110155223A1
公开(公告)日：2011-06-30
申请号：US12673214
申请日：2009-06-17
申请人： Masahiro Morooka , Reiko Yoneya , Harumi Takada , Masaki Orihashi , Cheng Zhu , Yusuke Suzuki , Kazuhiro Noda , Keishi Tada , Natsuki Kubo , Megumi Miki , Mitsuhiro Nakamura
发明人： Masahiro Morooka , Reiko Yoneya , Harumi Takada , Masaki Orihashi , Cheng Zhu , Yusuke Suzuki , Kazuhiro Noda , Keishi Tada , Natsuki Kubo , Megumi Miki , Mitsuhiro Nakamura
IPC分类号： H01L31/04 , H01L31/02 , H01L31/18 , B82Y99/00 , B82Y40/00
CPC分类号： H01G9/2031 , H01G9/2059 , Y02E10/542 , Y02P70/521
摘要： The present invention provides a dye-sensitized solar cell which can obtain a high photoelectric conversion efficiency, which can be manufactured at a low cost, and which is superior in a design property, and a method of manufacturing the same. Dye supporting porous titanium oxide layers 2a to 2d are formed on a transparent conductive substrate 1 so as to display predetermined colors, respectively, and compose predetermined patterns, respectively, in accordance with selection of a thickness, a lamination structure, a particle diameter of titanium oxide fine particles, or a combination ratio of two or more kinds of titanium oxide fine particles when titanium oxide fine particles are composed of the two or more kinds of titanium oxide fine particles different in particle diameter from one another. The transparent conductive substrate 1 having the dye supporting porous titanium oxide layers 2a to 2d formed thereon, and a transparent conductive substrate 3 having a counter electrode 4 formed thereon are stuck to each other through a seal material 5 so that the dye supporting porous titanium oxide layers 2a to 2d, and the counter electrode 4 face each other, and a space defined between the transparent conductive substrate 1 and the transparent conductive substrate 3 is enclosed with an electrolyte layer 6, thereby forming a dye-sensitized solar cell.
摘要翻译：本发明提供一种能够以低成本制造，且设计性优异的光电转换效率高的染料敏化太阳能电池及其制造方法。在透明导电性基板1上形成有支撑多孔氧化钛层2a〜2d的分散形状，通过选择厚度，叠层结构，钛粒子的粒径，分别形成规定的颜色，构成规定图案氧化物微粒，或当氧化钛微粒由两种或更多种粒径不同的氧化钛微粒组成时，两种或更多种氧化钛微粒的组合比。在其上形成有负载多孔氧化钛层2a〜2d的染料的透明导电性基板1和形成有对置电极4的透明导电性基板3通过密封材料5彼此粘合，使得负载着染料的多孔氧化钛层2a至2d和对电极4彼此面对，并且在透明导电基板1和透明导电基板3之间限定的空间被电解质层6包围，从而形成染料敏化太阳能电池。

7. 发明授权

US07947970B2 Radiation detector 有权
标题翻译：辐射检测器
公开(公告)号：US07947970B2
公开(公告)日：2011-05-24
申请号：US12453861
申请日：2009-05-26
申请人： Kaku Irisawa , Kazuhiro Noda , Kenichi Hayashi , Katsutoshi Yamane , Kiyoteru Miyake
发明人： Kaku Irisawa , Kazuhiro Noda , Kenichi Hayashi , Katsutoshi Yamane , Kiyoteru Miyake
IPC分类号： G03C5/16
CPC分类号： G01T1/244 , G01T1/246
摘要： A radiation detector is constituted by: a recording photoconductive layer; and electrodes provided on both sides of the photoconductive layer. Electric charges, which are generated within the recording photoconductive layer when radiation is irradiated thereon while a predetermined biasing voltage is being applied between the electrodes, are read out as electric signals. The recording photoconductive layer is formed by amorphous selenium that contains alkali metal elements within a range from 0.0007 atomic ppm to 0.0035 atomic ppm.
摘要翻译：辐射检测器由以下部分构成：记录光电导层; 以及设置在光电导层两侧的电极。作为电信号，读出当在电极之间施加预定的偏置电压时在其上照射辐射时在记录光电导层内产生的电荷。记录光电导层由含有0.0007原子ppm至0.0035原子ppm范围内的碱金属元素的非晶硒形成。

8. 发明授权

US07488668B2 Manufacturing method for semiconductor devices, arrangement determination method and apparatus for semiconductor device formation regions, and program for determining arrangement of semiconductor device formation regions 失效
标题翻译：用于半导体器件的制造方法，用于半导体器件形成区域的布置确定方法和装置以及用于确定半导体器件形成区域的布置的程序
公开(公告)号：US07488668B2
公开(公告)日：2009-02-10
申请号：US11183739
申请日：2005-07-19
申请人： Kiyoshi Arita , Hiroshi Haji , Kazuhiro Noda , Akira Nakagawa , Teruaki Nishinaka
发明人： Kiyoshi Arita , Hiroshi Haji , Kazuhiro Noda , Akira Nakagawa , Teruaki Nishinaka
IPC分类号： H01L21/00 , H01L23/544
CPC分类号： G03F7/70433 , H01L21/78
摘要： With use of a length-dimension of a second-line-segment of a unit-device-formation-region as an arrangement interval, a plurality of parallel lines are disposed in a device-formation-effective-region on a wafer so as to form a plurality of parallel-line-partition-regions, the unit-device-formation-regions are arranged in each of the parallel-line-partition-regions independently of and separately from other parallel-line-partition-regions so that the acquisition number of the unit-device-formation-regions is maximized, and an arrangement of the respective unit-device-formation-regions in the respective parallel-line-partition-regions is determined as an arrangement of the entire device-formation-effective-region.
摘要翻译：利用单元器件形成区域的二线段的长度尺寸作为布置间隔，在晶片上的器件形成有效区域中设置多条平行线，以便形成多个平行线分隔区域，单元器件形成区域与其他平行线分隔区域独立地并且与其他平行线分隔区域分开布置在每个并行线分隔区域中，使得获取单位元件形成区域的数量最大化，并且各个平行线分隔区域中的各个单位元件形成区域的布置被确定为整个器件形成有效的区域的布置，地区。

9. 发明授权

US07283117B2 Shift register and display device 失效
标题翻译：移位寄存器和显示设备
公开(公告)号：US07283117B2
公开(公告)日：2007-10-16
申请号：US10780748
申请日：2004-02-19
申请人： Kazuhiro Noda
发明人： Kazuhiro Noda
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3677 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2320/0252 , G09G2330/021 , G11C19/00 , G11C19/28
摘要： A shift register includes unit circuits cascade-connected to form a plurality of shift stages. Each of the unit circuits has a time-shifter including a NAND circuit to receive an input pulse as one input, and a holder having a PMOS transistor and a NMOS transistor, connected in series between a power supply and a clock input of which gates and drains are mutually connected in common respectively. The input of the holder is connected to the output of the NAND circuit, and the output thereof is fed as another input to the NAND circuit. The odd-stage unit circuits and the even-stage unit circuits operate in synchronism respectively with clock pulses having a ¼ phase difference from each other. In this structure, the number of transistors between the positive and negative power supplies can be reduced for lowering the required supply voltage and accelerating the shift register operation.
摘要翻译：移位寄存器包括级联连接以形成多个移位级的单元电路。每个单元电路具有包括接收作为一个输入的输入脉冲的NAND电路的时移器和具有PMOS晶体管和NMOS晶体管的保持器，串联连接在电源和时钟输入之间，栅极和排水口分别相通。保持器的输入连接到NAND电路的输出端，其输出作为另一个输入馈送到NAND电路。奇数级单元电路和偶数级单元电路分别与彼此具有¼相位差的时钟脉冲同步工作。在这种结构中，可以减小正电源和负电源之间的晶体管的数量，以降低所需的电源电压并加速移位寄存器的操作。

10. 发明申请

US20070172737A1 Electrochemical device and electrode 审中-公开
标题翻译：电化学装置和电极
公开(公告)号：US20070172737A1
公开(公告)日：2007-07-26
申请号：US10589043
申请日：2004-12-24
申请人： Hideki Oki , Yuri Nakayama , Kazuhiro Noda
发明人： Hideki Oki , Yuri Nakayama , Kazuhiro Noda
IPC分类号： H01M10/36 , H01M4/56 , H01M4/54 , H01M4/50 , H01M4/48 , H01M4/52 , H01M4/58 , H01M4/62
CPC分类号： H01M2/105 , H01M2/1061 , H01M10/425 , H01M10/44
摘要： An electrochemical device having battery characteristics and an electrode used therefor. The electrochemical device has a first pole, a second pole, and an electrolyte, said first pole containing an active material having at least one element selected from the group consisting of 1B Group, 2B Group, 6A Group, 7A Group, and 8 Group of the short-form periodic table, and said electrolyte containing an element belonging to 2A Group and/or 3B Group of the periodic table. Interactions between the electrolyte and the active material cause the occlusion and release of said ions.
摘要翻译：具有电池特性的电化学装置和用于其的电极。所述电化学装置具有第一极，第二极和电解质，所述第一极含有活性物质，所述活性物质具有选自1B族，2B族，6A族，7A族和8族的至少一种元素短周期表，所述电解质含有属于周期表的2A族和/或3B族的元素。电解质与活性物质之间的相互作用导致所述离子的闭塞和释放。

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