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1. 发明申请

US20070284418A1 Package structure of inverter apparatus and method of manufacturing the same 有权
标题翻译：逆变器装置的封装结构及其制造方法
公开(公告)号：US20070284418A1
公开(公告)日：2007-12-13
申请号：US11798820
申请日：2007-05-17
申请人： Kazuaki Mori , Makoto Takano
发明人： Kazuaki Mori , Makoto Takano
IPC分类号： A47J36/02
CPC分类号： H02M7/003 , H05K7/1432
摘要： A package structure of an inverter apparatus includes at least four metal column supports arranged vertically to be spaced apart from each other, and sheet-metal bent beams connecting the column supports in transverse direction and longitudinal direction to form rectangular package structure. The metal column support is an aluminum die-cast support, and the sheet-metal bent beam has a U-shape with sharp edges in cross section.
摘要翻译：逆变器装置的封装结构包括至少四个彼此间隔开地垂直布置的金属柱支撑件，以及在横向和纵向方向上连接柱支撑件的金属板弯曲梁，以形成矩形封装结构。金属柱支撑件是铝压铸支撑件，并且金属板弯曲梁具有横截面为锐边的U形。

2. 发明授权

US07715198B2 Package structure of inverter apparatus and method of manufacturing the same 有权
标题翻译：逆变器装置的封装结构及其制造方法
公开(公告)号：US07715198B2
公开(公告)日：2010-05-11
申请号：US11798820
申请日：2007-05-17
申请人： Kazuaki Mori , Makoto Takano
发明人： Kazuaki Mori , Makoto Takano
IPC分类号： H05K5/00 , A47F7/00 , A47B81/00
CPC分类号： H02M7/003 , H05K7/1432
摘要： A package structure of an inverter apparatus includes at least four metal column supports arranged vertically to be spaced apart from each other, and sheet-metal bent beams connecting the column supports in transverse direction and longitudinal direction to form rectangular package structure. The metal column support is an aluminum die-cast support, and the sheet-metal bent beam has a U-shape with sharp edges in cross section.
摘要翻译：逆变器装置的封装结构包括至少四个彼此间隔开地垂直布置的金属柱支撑件，以及在横向和纵向方向上连接柱支撑件的金属板弯曲梁，以形成矩形封装结构。金属柱支撑件是铝压铸支撑件，并且金属板弯曲梁具有横截面为锐边的U形。

3. 发明授权

US5070473A Microprocessor 失效
标题翻译：微处理器
公开(公告)号：US5070473A
公开(公告)日：1991-12-03
申请号：US77442
申请日：1987-07-24
申请人： Makoto Takano , Yasuhiko Hoshi , Keiichi Kurakazu , Shiro Baba
发明人： Makoto Takano , Yasuhiko Hoshi , Keiichi Kurakazu , Shiro Baba
IPC分类号： G06F13/28 , G06F13/42
CPC分类号： G06F13/4213
摘要： A wait signal formed by a program wait circuit incorporated in a microprocessor is transmitted to outside circuitry, such as a slave microprocessor or a direct memory access control device. Thereby an outside device assumes the functions of bus master which is incorporated into a wait operation for access to a memory unit. With such a construction, a microcomputer system comprising a plurality of devices to be made into a bus mask can be simplified.
摘要翻译：由并入微处理器的程序等待电路形成的等待信号被发送到诸如从微处理器或直接存储器存取控制装置的外部电路。因此，外部设备承担总线主控器的功能，其被并入到用于访问存储器单元的等待操作中。通过这样的结构，可以简化包括要制成总线掩模的多个装置的微计算机系统。

4. 发明授权

US4756910A Adriamycin-entrapping liposome preparation 失效
标题翻译：阿霉素截留脂质体制备
公开(公告)号：US4756910A
公开(公告)日：1988-07-12
申请号：US934589
申请日：1986-11-25
申请人： Kunio Yagi , Nakao Kojma , Makoto Takano
发明人： Kunio Yagi , Nakao Kojma , Makoto Takano
IPC分类号： C07H15/252 , A61K9/10 , A61K9/127 , A61K31/70 , A61K31/7028 , A61K31/7034 , A61K31/704 , A61P31/04 , A61P35/00 , A61K37/22 , A61J5/00 , B01J13/02 , B32B5/16
CPC分类号： A61K31/70 , A61K9/127 , A61K9/1271 , Y10T428/2984
摘要： A liposome preparation entrapping adriamycin as the effective component, whose constitutional lipids are phosphatidylcholine, cholesterol, and sulfatide in a specific molar ratio.
摘要翻译：一种脂质体制剂包埋阿霉素作为有效成分，其组成脂质是磷脂酰胆碱，胆固醇和硫苷脂，以特定摩尔比计。

5. 发明授权

US07868892B2 Data processor and graphic data processing device 有权
标题翻译：数据处理器和图形数据处理设备
公开(公告)号：US07868892B2
公开(公告)日：2011-01-11
申请号：US12237112
申请日：2008-09-24
申请人： Hirotaka Hara , Hiroyuki Hamasaki , Mitsuhiro Saeki , Kazuhiro Hirade , Makoto Takano
发明人： Hirotaka Hara , Hiroyuki Hamasaki , Mitsuhiro Saeki , Kazuhiro Hirade , Makoto Takano
IPC分类号： G06F13/14 , G06F13/36
CPC分类号： G06T11/203 , G06T1/20
摘要： An object of the present invention is to improve efficiency of transfer of control information, graphic data, and the like for drawing and display control in a graphic data processor. A graphic data processor includes: a CPU; a first bus coupled to the CPU; a DMAC for controlling a data transfer using the first bus; a bus bridge circuit for transmitting/receiving data to/from the first bus; a three-dimensional graphics module for receiving a command from the CPU via the first bus and performing a three-dimensional graphic process; a second bus coupled to the bus bridge circuit and a plurality of first circuit modules; a third bus coupled to the bus bridge circuit and second circuit modules; and a memory interface circuit coupled to the first and second buses and the three-dimensional graphic module and connectable to an external memory, wherein the bus bridge circuit can control a direct memory access transfer between an external circuit and the second bus.
摘要翻译：本发明的一个目的是提高图形数据处理器中用于绘制和显示控制的控制信息，图形数据等的传送效率。图形数据处理器包括：CPU; 耦合到CPU的第一个总线; 用于使用第一总线控制数据传输的DMAC; 用于向/从第一总线发送/接收数据的总线桥电路; 三维图形模块，用于经由第一总线从CPU接收命令并执行三维图形处理; 耦合到总线桥电路的第二总线和多个第一电路模块; 耦合到总线桥电路和第二电路模块的第三总线; 以及耦合到第一和第二总线和三维图形模块并且可连接到外部存储器的存储器接口电路，其中总线桥电路可以控制外部电路和第二总线之间的直接存储器访问传输。

6. 发明申请

US20090152898A1 Pipe member and method of manufacturing the same 审中-公开
标题翻译：管件及其制造方法
公开(公告)号：US20090152898A1
公开(公告)日：2009-06-18
申请号：US12284429
申请日：2008-09-22
申请人： Tomohiko Kawamura , Makoto Takano , Hiroshi Kashima
发明人： Tomohiko Kawamura , Makoto Takano , Hiroshi Kashima
IPC分类号： B62D21/02 , F16B11/00
CPC分类号： F16L13/147 , Y10T403/4991
摘要： To provide a pipe member composed of a small-diameter metal pipe and a large-diameter metal pipe integrated via a double pipe structure part. A diameter expanding punch 12 is press-fitted into a small-diameter pipe 3 through a large-diameter pipe 2, thereby integrally expanding the diameter of the small-diameter pipe 3 and the large-diameter pipe 2. As the diameter of the small-diameter pipe 3 is expanded, the longitudinal dimension of an expanded part 3b is shortened, and the tip end of the expanded part 3b of the small-diameter pipe 3 is spaced apart from a step part 2c of the large-diameter pipe 2. In this state, the large-diameter pipe 2 and the small-diameter pipe 3 are displaced with respect to each other in the longitudinal direction. To avoid this, during molding of an expanded part 2b and the expanded part 3b, a part of the expanded part 2b of the large-diameter pipe 2 is radially inwardly deformed by a pin 11 to form a retaining part 5 that is engaged in the expanded part 3b of the small-diameter pipe 3.
摘要翻译：提供由小直径金属管和通过双管结构部分一体化的大直径金属管构成的管构件。直径扩大冲头12通过大直径管2压配合到小直径管3中，从而一体地扩大了小直径管3和大直径管2的直径。作为小直径管2的直径直径管3膨胀，膨胀部3b的纵向尺寸缩短，小直径管3的膨胀部3b的前端与大径管2的台阶部2c隔开。在该状态下，大直径管2和小直径管3在长度方向上相对移动。为了避免这种情况，在扩大部分2b和膨胀部分3b的模制期间，大直径管2的扩张部分2b的一部分通过销11径向向内变形，以形成保持部分5，小直径管3的膨胀部3b。

7. 发明申请

US20060044164A1 Reproduction system, reproduction equipment and reproduction method 审中-公开
标题翻译：繁殖系统，繁殖设备和繁殖方法
公开(公告)号：US20060044164A1
公开(公告)日：2006-03-02
申请号：US11200118
申请日：2005-08-10
申请人： Kenji Takahashi , Makoto Takano
发明人： Kenji Takahashi , Makoto Takano
IPC分类号： H03M7/00
CPC分类号： H04N21/4325 , H04N21/4332 , H04N21/4334 , H04N21/43615 , H04N21/472 , H04N21/482 , H04N21/632
摘要： A reproduction system is capable of networking a plurality of reproduction equipments via a communications network. Each equipment is capable of reproducing a data signal and comprises a manipulation unit for receiving an input operation, a reproduction unit for reproducing a program by using a recording medium, an operation unit for processing various information and for sorting out data recorded on the recording medium, and a network interface unit which allows for referring to program data stored in a recording medium of a reproduction unit of another reproduction equipment via communication. In particular, when a reproduction equipment receives an inquiry for a rank of a particular program after performing a sorting operation on program data stored therein from another reproduction equipment networked therewith, the former reproduction equipment responds thereto by notifying the latter reproduction equipment of the program's rank.
摘要翻译：再现系统能够通过通信网络联网多个再现设备。每个设备能够再现数据信号，并且包括用于接收输入操作的操作单元，用于通过使用记录介质再现程序的再现单元，用于处理各种信息的操作单元和用于分类记录在记录介质上的数据以及网络接口单元，其允许通过通信参考存储在另一再现设备的再现单元的记录介质中的节目数据。特别地，当再现设备在从与其联网的另一个再现设备中存储的节目数据执行分类操作之后接收到特定节目的等级的查询时，前一个再现设备通过向后一个再现设备通知该节目的等级。

8. 发明申请

US20050030311A1 Data processor and graphic data processing device 有权
标题翻译：数据处理器和图形数据处理设备
公开(公告)号：US20050030311A1
公开(公告)日：2005-02-10
申请号：US10891047
申请日：2004-07-15
申请人： Hirotaka Hara , Hiroyuki Hamasaki , Mitsuhiro Saeki , Kazuhiro Hirade , Makoto Takano
发明人： Hirotaka Hara , Hiroyuki Hamasaki , Mitsuhiro Saeki , Kazuhiro Hirade , Makoto Takano
IPC分类号： G06F13/28 , G06F15/78 , G06T1/20 , G06T11/20 , G06T11/40 , G06T15/00 , G06T1/00 , G06F13/14
CPC分类号： G06T11/203 , G06T1/20
摘要： An object of the present invention is to improve efficiency of transfer of control information, graphic data, and the like for drawing and display control in a graphic data processor. A graphic data processor includes: a CPU; a first bus coupled to the CPU; a DMAC for controlling a data transfer using the first bus; a bus bridge circuit for transmitting/receiving data to/from the first bus; a three-dimensional graphics module for receiving a command from the CPU via the first bus and performing a three-dimensional graphic process; a second bus coupled to the bus bridge circuit and a plurality of first circuit modules; a third bus coupled to the bus bridge circuit and second circuit modules; and a memory interface circuit coupled to the first and second buses and the three-dimensional graphic module and connectable to an external memory, wherein the bus bridge circuit can control a direct memory access transfer between an external circuit and the second bus.
摘要翻译：本发明的一个目的是提高图形数据处理器中绘图和显示控制的控制信息，图形数据等的传送效率。图形数据处理器包括：CPU; 耦合到CPU的第一个总线; 用于使用第一总线控制数据传输的DMAC; 用于向/从第一总线发送/接收数据的总线桥电路; 三维图形模块，用于经由第一总线从CPU接收命令并执行三维图形处理; 耦合到总线桥电路的第二总线和多个第一电路模块; 耦合到总线桥电路和第二电路模块的第三总线; 以及耦合到第一和第二总线和三维图形模块并且可连接到外部存储器的存储器接口电路，其中总线桥电路可以控制外部电路和第二总线之间的直接存储器访问传输。

9. 发明授权

US09203217B2 Inverter apparatus 有权
标题翻译：变频器
公开(公告)号：US09203217B2
公开(公告)日：2015-12-01
申请号：US14123803
申请日：2012-10-26
申请人： Makoto Takano
发明人： Makoto Takano
IPC分类号： H02B1/04 , H05K7/06 , B62B3/00 , H02M7/48 , H02B1/015 , H05K7/14 , H05K7/20 , H05K5/02 , H02B3/00 , H02M7/00
CPC分类号： H02B1/04 , B62B3/002 , H02B1/015 , H02B3/00 , H02M7/003 , H02M7/48 , H05K7/06 , H05K7/1432 , H05K7/20909
摘要： An inverter apparatus includes an inverter stack having casters at bottom and a switchboard for entering the inverter stack from a front side to store. The switchboard has an output relay terminal, at a storage bottom portion to store the inverter stack, extending along an entering direction of the inverter stack. The output relay terminal is attached with an output electric wire connected to a load at a rear end portion, is connected to an output terminal of the inverter stack at a front end portion, and is fastened to an output relay bar protruding downward from the bottom of the inverter stack through a fastening member.
摘要翻译：逆变器装置包括在底部具有脚轮的逆变器堆叠和用于从前侧进入逆变器堆叠以存储的配电板。配电板具有输出继电器端子，在存储底部存储逆变器堆叠，沿反向堆叠的进入方向延伸。输出继电器端子附接有与后端部的负载连接的输出电线，在前端部连接到逆变器堆叠的输出端子，并且被固定到从底部向下突出的输出继电器棒的逆变器堆叠通过紧固构件。

10. 发明授权

US07446775B2 Data processor and graphic data processing device 有权
标题翻译：数据处理器和图形数据处理设备
公开(公告)号：US07446775B2
公开(公告)日：2008-11-04
申请号：US10891047
申请日：2004-07-15
申请人： Hirotaka Hara , Hiroyuki Hamasaki , Mitsuhiro Saeki , Kazuhiro Hirade , Makoto Takano
发明人： Hirotaka Hara , Hiroyuki Hamasaki , Mitsuhiro Saeki , Kazuhiro Hirade , Makoto Takano
IPC分类号： G06F13/14 , G06F13/36
CPC分类号： G06T11/203 , G06T1/20
摘要： An object of the present invention is to improve efficiency of transfer of control information, graphic data, and the like for drawing and display control in a graphic data processor. A graphic data processor includes: a CPU; a first bus coupled to the CPU; a DMAC for controlling a data transfer using the first bus; a bus bridge circuit for transmitting/receiving data to/from the first bus; a three-dimensional graphics module for receiving a command from the CPU via the first bus and performing a three-dimensional graphic process; a second bus coupled to the bus bridge circuit and a plurality of first circuit modules; a third bus coupled to the bus bridge circuit and second circuit modules; and a memory interface circuit coupled to the first and second buses and the three-dimensional graphic module and connectable to an external memory, wherein the bus bridge circuit can control a direct memory access transfer between an external circuit and the second bus.
摘要翻译：本发明的一个目的是提高图形数据处理器中绘图和显示控制的控制信息，图形数据等的传送效率。图形数据处理器包括：CPU; 耦合到CPU的第一个总线; 用于使用第一总线控制数据传输的DMAC; 用于向/从第一总线发送/接收数据的总线桥电路; 三维图形模块，用于经由第一总线从CPU接收命令并执行三维图形处理; 耦合到总线桥电路的第二总线和多个第一电路模块; 耦合到总线桥电路和第二电路模块的第三总线; 以及耦合到第一和第二总线和三维图形模块并且可连接到外部存储器的存储器接口电路，其中总线桥电路可以控制外部电路和第二总线之间的直接存储器访问传输。

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