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1. 发明授权

US06548312B1 Manufacturing method of semiconductor integrated circuit devices and mask manufacturing methods 失效
标题翻译：半导体集成电路器件的制造方法和掩模制造方法
公开(公告)号：US06548312B1
公开(公告)日：2003-04-15
申请号：US09640721
申请日：2000-08-18
申请人： Katsuya Hayano , Norio Hasegawa , Akira Imai , Naoko Asai , Eiji Tsujimoto , Takahiro Watanabe
发明人： Katsuya Hayano , Norio Hasegawa , Akira Imai , Naoko Asai , Eiji Tsujimoto , Takahiro Watanabe
IPC分类号： H01L2100
CPC分类号： G03F7/70433
摘要： In order to inhibit or prevent a pattern abnormality such as the deformation or misalignment of a pattern of a semiconductor integrated circuit device, a light intensity is calculated based on the pattern data DBP of a mask and the aberration data DBL of a lens of a pattern exposure device (step 101) and then the results of the light intensity calculation is compared with the results of the light intensity calculated on condition that the lens of the pattern exposure device has no aberration (step 102), and then a pattern data exceeding an allowable level, of the pattern data of the mask, is corrected according to the amount of correction calculated on the basis of the results of the comparison such that the pattern data does not exceed the allowable level (step 104). The mask is manufactured by using the mask making data DBM after the correction and then is mounted on the pattern exposure device to transfer a predetermined pattern to a semiconductor wafer.
摘要翻译：为了抑制或防止诸如半导体集成电路器件的图案的变形或未对准的图案异常，基于掩模的图案数据DBP和图案的透镜的像差数据DBL计算光强度曝光装置（步骤101），然后将光强度计算的结果与在图案曝光装置的透镜没有像差的条件下计算的光强度的结果进行比较（步骤102），然后模式数据超过根据比较结果计算出的校正量，使图案数据不超过允许值（步骤104），对掩模的图案数据的允许电平进行校正。通过在校正后使用掩模制作数据DBM来制造掩模，然后安装在图案曝光装置上以将预定图案转印到半导体晶片。

2. 发明授权

US06225011B1 Method for manufacturing semiconductor devices utilizing plurality of exposure systems 失效
标题翻译：利用多个曝光系统制造半导体器件的方法
公开(公告)号：US06225011B1
公开(公告)日：2001-05-01
申请号：US09294428
申请日：1999-04-20
申请人： Yasuko Gotoh , Norio Hasegawa , Naoko Asai , Katsuya Hayano , Takashi Matsuzaka , Katsuhiro Kawasaki
发明人： Yasuko Gotoh , Norio Hasegawa , Naoko Asai , Katsuya Hayano , Takashi Matsuzaka , Katsuhiro Kawasaki
IPC分类号： G03F900
CPC分类号： G03F7/7045 , H01J37/3045 , H01J2237/3175 , Y10S430/143
摘要： A pattern can be written in accordance with a distortion which changes depending upon exposure conditions of the optical exposure system and exposed pattern features, and a pattern can be written with a high alignment accuracy by the optical exposure system and an electron beam lithography system or two optical exposure systems. A pattern which is exposed by optical exposure system divided into very small areas shown by broken lines, and pattern feature amounts (fx), (fy) at each area are calculated. A correction amount is obtained by using the pattern feature amount and the position within an exposure field as parameters based on exposure distortion examined by a standard pattern predeterminedly.
摘要翻译：可以根据根据光学曝光系统的曝光条件和曝光图案特征而变化的失真来写入图案，并且可以通过光学曝光系统和电子束光刻系统或两个方式以高对准精度写入图案光学曝光系统计算出被分为由虚线示出的非常小的区域的光学曝光系统曝光的图案，以及每个区域的图案特征量（fx），（fy）。通过使用图案特征量和曝光区域内的位置作为基于通过标准图案检查的曝光失真的参数来获得校正量。

3. 发明授权

US07172853B2 Method of manufacturing semiconductor integrated circuit devices 失效
标题翻译：制造半导体集成电路器件的方法
公开(公告)号：US07172853B2
公开(公告)日：2007-02-06
申请号：US10770413
申请日：2004-02-04
申请人： Norio Hasegawa , Akira Imai , Katsuya Hayano
发明人： Norio Hasegawa , Akira Imai , Katsuya Hayano
IPC分类号： G03F7/20 , G03C5/00
CPC分类号： G03F7/70358 , G03F1/30 , G03F7/70283 , G03F7/70466
摘要： To alleviate the absolute value control accuracy of phases in a mask having a groove shifter structure, transfer regions formed at different planar positions on the same plane of the same mask are subjected to a multiple exposure by scanning exposure. Although identical mask patterns are formed over the transfer regions respective groove shifters provided to these mask patterns are arranged opposite from each other.
摘要翻译：为了减轻具有凹槽移位结构的掩模中的相位的绝对值控制精度，形成在同一掩模的同一平面上的不同平面位置处的转印区域通过扫描曝光进行多次曝光。虽然在传送区域上形成相同的掩模图案，但是设置在这些掩模图案上的相应凹槽移位器相互排列。

4. 发明授权

US06713231B1 Method of manufacturing semiconductor integrated circuit devices 有权
标题翻译：制造半导体集成电路器件的方法
公开(公告)号：US06713231B1
公开(公告)日：2004-03-30
申请号：US09707833
申请日：2000-11-08
申请人： Norio Hasegawa , Akira Imai , Katsuya Hayano
发明人： Norio Hasegawa , Akira Imai , Katsuya Hayano
IPC分类号： G03F700
CPC分类号： G03F7/70358 , G03F1/30 , G03F7/70283 , G03F7/70466
摘要： To alleviate the absolute value control accuracy of phases in a mask having a groove shifter structure, transfer regions 4C, 4D formed at different planar positions on the same plane of the same mask 2 are subjected to a multiple exposure by scanning exposure. Although identical mask patterns are formed over the transfer regions 4C, 4D, respective groove shifters 2d provided to these mask patterns are arranged opposite from each other.
摘要翻译：为了减轻具有凹槽移位结构的掩模中的相位的绝对值控制精度，形成在同一掩模2的同一平面上的不同平面位置处的转印区域4C，4D通过扫描曝光进行多次曝光。虽然在转印区域4C，4D上形成相同的掩模图案，但是设置在这些掩模图案上的相应的凹槽移位器2d彼此相对布置。

5. 发明授权

US06403413B2 Manufacturing method of semiconductor integrated circuit device having a capacitor 有权
标题翻译：具有电容器的半导体集成电路器件的制造方法
公开(公告)号：US06403413B2
公开(公告)日：2002-06-11
申请号：US09904591
申请日：2001-07-16
申请人： Katsuya Hayano , Akira Imai , Norio Hasegawa
发明人： Katsuya Hayano , Akira Imai , Norio Hasegawa
IPC分类号： H01L218242
CPC分类号： H01L27/10855 , G03F1/30 , H01L21/76897 , H01L27/10814 , H01L27/11502 , H01L2924/0002 , Y10S438/942 , Y10S438/946 , H01L2924/00
摘要： When a through hole 17 is transferred on a pair of contact holes 10 putting a data line DL therebetween, even if a pair of through holes 17 putting the data line DL therebetween are deviated, the pair of through holes are connected to the contact hole 10b and not connected to the data line DL. By this manner, a mask pattern formed by a photomask is use so as to be deviated and disposed in a direction separately from the data line DL at a design stage. This results in improvement of an alignment tolerance of the pattern.
摘要翻译：当通孔17被传送到放置数据线DL的一对接触孔10时，即使在其间放置数据线DL的一对通孔17偏离，一对通孔连接到接触孔10b 并且不连接到数据线DL。通过这种方式，在设计阶段使用由光掩模形成的掩模图案，以在与数据线DL分开的方向上偏离和布置。这导致图案的对准公差的改善。

6. 发明授权

US5700601A Photomask, manufacture of photomask, formation of pattern, manufacture of semiconductor device, and mask pattern design system 失效
标题翻译：光掩模，光掩模的制造，图案的形成，半导体器件的制造和掩模图案设计系统
公开(公告)号：US5700601A
公开(公告)日：1997-12-23
申请号：US495836
申请日：1995-06-28
申请人： Norio Hasegawa , Tsuneo Terasawa , Hiroshi Fukuda , Katsuya Hayano , Akira Imai , Akemi Moniwa , Shinji Okazaki
发明人： Norio Hasegawa , Tsuneo Terasawa , Hiroshi Fukuda , Katsuya Hayano , Akira Imai , Akemi Moniwa , Shinji Okazaki
IPC分类号： G03F1/00 , G03F1/26 , G03F1/32 , G03F1/36 , G03F7/20 , G03F9/00
CPC分类号： G03F1/32 , G03F1/26 , G03F1/36 , G03F7/70283 , G03F7/70433
摘要： A photomask used for printing a mask pattern by projection optics, in which a main pattern formed of a transparent area is provided in a semitransparent area formed of a semitransparent film and a phase shifter, and the phase angles of light beams passing through respective areas are different from each other substantially by 180.degree.. The photomask is intended to prevent a reduction in a production yield due to a resolution failure of the photomask, and to prevent generation of an unnecessary projected image. In this photomask, a transparent auxiliary pattern having the same phase angle of light as that of the transparent area is disposed around a main pattern formed of the transparent area, and a distance D between the center or a desired center line of the main pattern and that of the auxiliary pattern satisfies the relationship of D=b.lambda./NAm , where NAm is a mask-side numerical aperture of a projection lens, .lambda. is a wavelength of exposure light, and is a coefficient in the range of 1.35
摘要翻译：用于通过投影光学器件打印掩模图案的光掩模，其中由透明区域形成的半透明区域设置在由半透明膜和移相器形成的半透明区域中，并且通过各个区域的光束的相位角为彼此相差180度。光掩模旨在防止由于光掩模的分辨率故障导致的产量降低，并且防止产生不必要的投影图像。在该光掩模中，具有与透明区域相同的相位相位角的透明辅助图案设置在由透明区域形成的主图案周围，并且主图案的中心或期望中心线之间的距离D和辅助图案的图案满足D =bλ/ NAm的关系，其中NAm是投影透镜的掩模侧数值孔径，λ是曝光光的波长，并且b是1.35的范围内的系数

7. 发明申请

US20070128556A1 Method of manufacturing semiconductor integrated circuit devices 审中-公开
标题翻译：制造半导体集成电路器件的方法
公开(公告)号：US20070128556A1
公开(公告)日：2007-06-07
申请号：US11651977
申请日：2007-01-11
申请人： Norio Hasegawa , Akira Imai , Katsuya Hayano
发明人： Norio Hasegawa , Akira Imai , Katsuya Hayano
IPC分类号： G03F1/00 , G03F7/00
CPC分类号： G03F7/70358 , G03F1/30 , G03F7/70283 , G03F7/70466
摘要： To alleviate the absolute value control accuracy of phases in a mask having a groove shifter structure, transfer regions formed at different planar positions on the same plane of the same mask are subjected to a multiple exposure by scanning exposure. Although. identical mask patterns are formed over the transfer regions respective groove shifters provided to these mask patterns are arranged opposite from each other.
摘要翻译：为了减轻具有凹槽移位结构的掩模中的相位的绝对值控制精度，形成在同一掩模的同一平面上的不同平面位置处的转印区域通过扫描曝光进行多次曝光。虽然。在传送区域上形成相同的掩模图案，设置在这些掩模图案上的相应的凹槽移位器相互布置。

8. 发明授权

US06632744B2 Manufacturing method of semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件的制造方法
公开(公告)号：US06632744B2
公开(公告)日：2003-10-14
申请号：US09903580
申请日：2001-07-13
申请人： Akira Imai , Katsuya Hayano , Norio Hasegawa
发明人： Akira Imai , Katsuya Hayano , Norio Hasegawa
IPC分类号： H01L2100
CPC分类号： G03F7/70283 , G03F1/26 , G03F1/70 , G03F7/203 , G03F7/70466 , H01L21/31144 , H01L27/10814 , H01L27/10855 , H01L27/10888 , H01L28/90
摘要： Densely disposed patterns constituting a semiconductor integrated circuit device are divided into a first mask pattern and a second mask pattern 28B such that a phase shifter S can be disposed, and a predetermined pattern is transferred on a semiconductor substrate by multiple-exposure thereof. The second mask pattern 28B has a main light transferring pattern 26c1, a plurality of auxiliary light transferring patterns 26c2 disposed thereabout, and a phase shifter S disposed in the main light transferring pattern 26c1. The auxiliary light transferring patterns 26c2 are disposed such that respective distances from a center of each thereof to a center of the main light transferring pattern 26c1 are substantially equal. With this arrangement, a densely disposed pattern is transferred with sufficient process transfer margin.
摘要翻译：构成半导体集成电路器件的密集布置的图案被分成第一掩模图案和第二掩模图案 28 B，使得可以布置移相器S，并且将预定图案通过多次曝光在半导体衬底上转印。第二个掩模图案 28 B具有主要的传输图案 26 c 多个辅助光传输图案 26 c BOLD> 设置在主光传输图案 26 c 中的移相器S. 辅助光传输图案 26 c 2 使得从其每一个的中心到主光传输图案 26 c 1 基本相等。通过这种安排，密集布置的图案将以足够的工艺传送余量进行传送

9. 发明授权

US07001712B2 Manufacturing method of semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件的制造方法
公开(公告)号：US07001712B2
公开(公告)日：2006-02-21
申请号：US10623849
申请日：2003-07-22
申请人： Akira Imai , Katsuya Hayano , Norio Hasegawa
发明人： Akira Imai , Katsuya Hayano , Norio Hasegawa
IPC分类号： G03F7/20
CPC分类号： G03F7/70283 , G03F1/26 , G03F1/70 , G03F7/203 , G03F7/70466 , H01L21/31144 , H01L27/10814 , H01L27/10855 , H01L27/10888 , H01L28/90
摘要： Densely disposed patterns constituting a semiconductor integrated circuit device are divided into a first mask pattern and a second mask pattern 28B such that a phase shifter S can be disposed, and a predetermined pattern is transferred on a semiconductor substrate by multiple-exposure thereof. The second mask pattern 28B has a main light transferring pattern 26c1, a plurality of auxiliary light transferring patterns 26c2 disposed thereabout, and a phase shifter S disposed in the main light transferring pattern 26c1. The auxiliary light transferring patterns 26c2 are disposed such that respective distances from a center of each thereof to a center of the main light transferring pattern 26c1 are substantially equal. With this arrangement, a densely disposed pattern is transferred with sufficient process transfer margin.
摘要翻译：构成半导体集成电路器件的密集布置的图案被分成第一掩模图案和第二掩模图案28B，使得可以布置移相器S，并且通过多次曝光在半导体衬底上传送预定图案。第二掩模图案28B具有主光传输图案26c 1，设置在其周围的多个辅助光传输图案26c2和设置在主传光图案26c 1中的移相器S. 辅助光传输图案26c2布置成使得从其每个的中心到主光传输图案26c 1的中心的相应距离基本相等。利用这种布置，密集布置的图案以足够的工艺传送余量传送。

10. 发明授权

US06750496B2 Manufacturing method of semiconductor integrated circuit device, and semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件的制造方法以及半导体集成电路器件
公开(公告)号：US06750496B2
公开(公告)日：2004-06-15
申请号：US10142063
申请日：2002-05-10
申请人： Katsuya Hayano , Akira Imai , Norio Hasegawa
发明人： Katsuya Hayano , Akira Imai , Norio Hasegawa
IPC分类号： H01L27108
CPC分类号： H01L27/10855 , G03F1/30 , H01L21/76897 , H01L27/10814 , H01L27/11502 , H01L2924/0002 , Y10S438/942 , Y10S438/946 , H01L2924/00
摘要： When a through hole 17 is transferred on a pair of contact holes 10 putting a data line DL therebetween, even if a pair of through holes 17 putting the data line DL therebetween are deviated, the pair of through holes are connected to the contact hole 10b and not connected to the data line DL. By this manner, a mask pattern formed by a photomask is use so as to be deviated and disposed in a direction separately from the data line DL at a design stage. This results in improvement of an alignment tolerance of the pattern.
摘要翻译：当通孔17被传送到放置数据线DL的一对接触孔10时，即使在其间放置数据线DL的一对通孔17偏离，一对通孔连接到接触孔10b 并且不连接到数据线DL。通过这种方式，在设计阶段使用由光掩模形成的掩模图案，以在与数据线DL分开的方向上偏离和布置。这导致图案的对准公差的改善。

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