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    • 1. 发明授权
    • Semiconductor sensor chip and method for producing the chip, and semiconductor sensor and package for assembling the sensor
    • 半导体传感器芯片及其制造方法,以及用于组装传感器的半导体传感器和封装
    • US06632697B2
    • 2003-10-14
    • US09956969
    • 2001-09-21
    • Katsumichi UeyanagiMutsuo NishikawaMitsuo Sasaki
    • Katsumichi UeyanagiMutsuo NishikawaMitsuo Sasaki
    • H01L2100
    • G01P1/023G01P15/0802G01P15/0888G01P15/11G01P15/123G01P21/00H01F10/126H01F10/265H05K1/18
    • The present invention is a method of making an acceleration sensor chip. The sensor chip is prepared from a SOI wafer having a silicon substrate, a SiO2 layer and a silicon thin film. A dopant is ion implanted at a position corresponding to a semiconductor strain gauge on the silicon thin film to form a diffusion resistor, and for forming devices necessary for circuit construction on said silicon thin film. A protective film is provided on the entire surface of the wafer, and a plurality of through holes penetrating the silicon thin film are formed by patterning and etching to make a weight part and a beam part connected to a support frame part on the periphery. The SiO2 layer under the weight part and the beam part is removed by wet etching to form the through holes, while leaving the protective film in place. The protective film is removed and a resist coated over the entire surface of the wafer. A slit for dividing the chip is formed part way through the wafer by dicing. The resist is removed by ashing with an O2 plasma and the chip is divided by concentrating a stress on the slit.
    • 本发明是制造加速度传感器芯片的方法。 传感器芯片由具有硅衬底,SiO PDAT>层和硅薄膜的SOI晶片制备。 在与硅薄膜上的半导体应变计相对应的位置处离子注入掺杂剂,以形成扩散电阻,并形成所述硅薄膜上电路构造所需的器件。 在晶片的整个表面上设置保护膜,通过图案化和蚀刻形成穿透硅薄膜的多个通孔,以使重量部分和与外围的支撑框架部分连接的梁部分。 通过湿蚀刻除去重量部分下面的SiO 2 和梁部分,以形成通孔,同时使保护膜保持在适当位置。 去除保护膜并将抗蚀剂涂覆在晶片的整个表面上。 用于分割芯片的狭缝通过切割部分地穿过晶片。 用O 2 等离子体通过灰化除去抗蚀剂,并通过在狭缝上集中应力来分割芯片。
    • 3. 发明授权
    • Semiconductor sensor chip and method for producing the chip, and semiconductor sensor and package for assembling the sensor
    • 半导体传感器芯片及其制造方法,以及用于组装传感器的半导体传感器和封装
    • US06494092B2
    • 2002-12-17
    • US09957241
    • 2001-09-21
    • Katsumichi UeyanagiMutsuo NishikawaMitsuo Sasaki
    • Katsumichi UeyanagiMutsuo NishikawaMitsuo Sasaki
    • G01P102
    • G01P1/023G01P15/0802G01P15/0888G01P15/11G01P15/123G01P21/00H01F10/126H01F10/265H05K1/18
    • The present invention is a semiconductor sensor having a semiconductor sensor chip for detecting a physical value applied in a direction perpendicular to the chip surface; and a package for incorporating the semiconductor sensor chip. The main surface for mounting the semiconductor sensor chip is formed at a predetermined angle with respect to the surface of a printed circuit board for mounting the package. The main surface is provided with a plurality of terminals along two opposite sides for connecting with input/output terminals of the semiconductor sensor chip. A bottom surface, perpendicular to the main surface, is provided with a plurality of pins formed along the two sides parallel to the main surface, so that the plurality of pins are inserted into mounting holes formed in the printed circuit board. The plurality of terminals and the plurality of pins are electrically connected, and input/output terminals of the semiconductor sensor chip mounted on the main surface are electrically connected with the plurality of terminals of the package.
    • 本发明是具有半导体传感器芯片的半导体传感器,用于检测在垂直于芯片表面的方向上施加的物理值; 以及用于并入半导体传感器芯片的封装。 用于安装半导体传感器芯片的主表面相对于用于安装封装的印刷电路板的表面以预定角度形成。 主表面沿着两个相对侧设置有多个端子,用于连接半导体传感器芯片的输入/输出端子。 垂直于主表面的底面设置有沿着平行于主表面的两侧形成的多个销,使得多个销插入形成在印刷电路板中的安装孔中。 多个端子和多个引脚电连接,并且安装在主表面上的半导体传感器芯片的输入/输出端子与封装的多个端子电连接。
    • 4. 发明授权
    • Semiconductor sensor chip and method for producing the chip, and semiconductor sensor and package for assembling the sensor
    • 半导体传感器芯片及其制造方法,以及用于组装传感器的半导体传感器和封装
    • US06332359B1
    • 2001-12-25
    • US09241096
    • 1999-02-01
    • Katsumichi UeyanagiMutsuo NishikawaMitsuo Sasaki
    • Katsumichi UeyanagiMutsuo NishikawaMitsuo Sasaki
    • G01P1512
    • G01P1/023G01P15/0802G01P15/0888G01P15/11G01P15/123G01P21/00H01F10/126H01F10/265H05K1/18
    • A sensor chip having a support frame part and sensor structure including at least one displaceable weight part, and a beam part for connecting the weight part to the support frame part. The sensor structure is formed on a silicon substrate through an insulating layer and the insulating layer between the sensor structure and the silicon substrate is removed. The beam part is formed of two parallel beams and the weight part is connected to the support frame part by two parallel beams. At least two semiconductor strain gauges are formed on the surface of the two respective parallel beams. The semiconductor chip may be contained in a package having a main surface for mounting the semiconductor sensor chip formed at a predetermined angle with respect to the surface of a printed circuit board for mounting the package. The main surface is provided with a plurality of terminals along two opposite sides thereof for connecting with input/output terminals of the semiconductor sensor chip. A bottom surface perpendicular to the main surface is provided with a plurality of pins for inserting into mounting holes of the circuit board.
    • 一种具有支撑框架部分和传感器结构的传感器芯片,所述传感器芯片包括至少一个位移重量部分和用于将所述重量部分连接到所述支撑框架部分的梁部分。 传感器结构通过绝缘层形成在硅衬底上,并且去除传感器结构和硅衬底之间的绝缘层。 梁部分由两个平行的梁形成,重物部分通过两个平行的梁连接到支撑框架部分。 在两个相应的平行光束的表面上形成至少两个半导体应变计。 半导体芯片可以包含在具有用于安装相对于用于安装封装的印刷电路板的表面的预定角度的半导体传感器芯片的主表面的封装中。 主表面沿其两个相对侧设置有多个端子,用于连接半导体传感器芯片的输入/输出端子。 垂直于主表面的底表面设置有多个插脚插入电路板的安装孔中。
    • 7. 发明授权
    • Semiconductor physical quantity sensing device
    • 半导体物理量感测装置
    • US07180798B2
    • 2007-02-20
    • US10406604
    • 2003-04-04
    • Mutsuo NishikawaKatsumichi Ueyanagi
    • Mutsuo NishikawaKatsumichi Ueyanagi
    • G11C7/00G01N27/04H01L41/00G06G7/28
    • G01D18/008G01D3/022G11C2207/2254
    • A semiconductor physical quantity sensing device to perform electrical trimming at low cost by using a CMOS manufacturing process and a small number of terminals. The semiconductor physical quantity sensing device includes a wheatstone bridge circuit, which is a sensor element, an auxiliary memory circuit, which stores provisional trimming data, a main memory circuit, which stores finalized trimming data, an adjusting circuit, which adjusts the output characteristics of the sensor element based on trimming data stored in the auxiliary memory circuit or the main memory circuit, with the elements and circuits being only configured of active elements and passive elements manufactured by way of the CMOS manufacturing process formed on a same semiconductor chip.
    • 一种半导体物理量感测装置,其通过使用CMOS制造工艺和少量端子来以低成本进行修整。 半导体物理量检测装置包括作为传感器元件的惠斯登电桥电路,存储临时修整数据的辅助存储电路,存储最终修整数据的主存储电路,调整电路,其调整输出特性 传感器元件基于存储在辅助存储器电路或主存储器电路中的修整数据,元件和电路仅由有源元件和通过形成在同一半导体芯片上的CMOS制造工艺制造的无源元件构成。
    • 8. 发明申请
    • Signal amplifier circuit
    • 信号放大电路
    • US20070290761A1
    • 2007-12-20
    • US11783327
    • 2007-04-09
    • Mutsuo NishikawaKatsumichi UeyanagiKatsuyuki UematsuYuko Fujimoto
    • Mutsuo NishikawaKatsumichi UeyanagiKatsuyuki UematsuYuko Fujimoto
    • H03F1/34
    • H03F3/45G01D3/021G01D3/028G01L27/007
    • A signal amplifier circuit includes a negative feedback amplifier circuit having an output terminal, a first voltage limiting device for limiting the output voltage from the negative feedback amplifier circuit, a second voltage limiting device for limiting the output voltage from the negative feedback amplifier circuit, a first reference voltage supply applying a first reference voltage to the first voltage limiting device, a second reference voltage supply applying a second reference voltage to the second voltage limiting device. The first voltage limiting device is configured to fix a lower limit saturation voltage at the first reference voltage. The second voltage limiting device is configured to fix an upper limit saturation voltage at the second reference voltage.
    • 信号放大器电路包括具有输出端子的负反馈放大器电路,用于限制来自负反馈放大器电路的输出电压的第一电压限制装置,用于限制来自负反馈放大器电路的输出电压的第二电压限制装置, 将第一参考电压施加到所述第一电压限制装置的第一参考电压源,向所述第二电压限制装置施加第二参考电压的第二参考电压电源。 第一限压装置被配置为固定第一参考电压的下限饱和电压。 第二电压限制装置被配置为将第二参考电压的上限饱和电压固定。