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    • 3. 发明授权
    • Plasma display unit
    • 等离子显示单元
    • US06724356B1
    • 2004-04-20
    • US09537757
    • 2000-03-30
    • Ayahito KojimaHiroyuki WakayamaHirohito KuriyamaKatsuhiro IshidaAkira Yamamoto
    • Ayahito KojimaHiroyuki WakayamaHirohito KuriyamaKatsuhiro IshidaAkira Yamamoto
    • G09G328
    • G09G3/2946G09G3/2944G09G2320/0626G09G2330/02G09G2360/16
    • In a PDP unit, a display frame for one screen comprises a plurality of sub-frames, the luminance of each of which is determined by a sustaining pulse number. A length of one frame is calculated from the length of one cycle of a vertical synchronization signal and a sub-frame condition determination circuit determines, from the length of one frame, the number of sub-frames, the luminance of each sub-frame and a total sustaining pulse number. A load factor is calculated from an external input signal. A further circuit determines a maximum display luminance from consumed power and calculates a luminance factor, and yet a further circuit corrects the luminance drop due to a load from the total sustaining pulse number, the luminance ratio and the load factor for the respective sub-frame and calculates sustaining pulse numbers for the respective sub-frames. Thereby, the sustaining pulse numbers of the respective sub-frames are determined through calculations using the total sustaining pulse number, the luminance ratio, the load factor and the consumed power rather than using a luminance table, simplifying construction of the PDP unit while performing more accurate calculations and thereby improving display quality and providing a stable display without flickering.
    • 在PDP单元中,一个屏幕的显示帧包括多个子帧,每个子帧的亮度由维持脉冲数确定。 从垂直同步信号的一个周期的长度计算一帧的长度,并且子帧条件确定电路从一帧的长度确定子帧的数量,每个子帧的亮度和 总维持脉冲数。 负载系数由外部输入信号计算。 另外的电路确定从消耗的功率的最大显示亮度并计算亮度因子,并且还有一个电路校正由相对于子帧的总维持脉冲数,亮度比和负载因子的负载引起的亮度下降 并计算各个子帧的维持脉冲数。 因此,通过使用总维持脉冲数,亮度比,负载因子和消耗功率的计算来确定各个子帧的维持脉冲数,而不是使用亮度表,从而简化了PDP单元的构造,同时执行更多 精确的计算,从而提高显示质量,并提供稳定的显示而不闪烁。
    • 8. 发明授权
    • Display device
    • 显示设备
    • US06535224B2
    • 2003-03-18
    • US09458809
    • 1999-12-10
    • Hirohito KuriyamaKatsuhiro IshidaAkira YamamotoAyahito Kojima
    • Hirohito KuriyamaKatsuhiro IshidaAkira YamamotoAyahito Kojima
    • G09G510
    • G09G3/2007G09G3/2803G09G3/2944G09G5/006G09G2320/0271G09G2320/0626G09G2360/16
    • The present invention relates to a display device including an interface device, which can prevent from reducing a resolving power of gray scales for a dark picture signal is provided. The interface device according to the present invention is provided to prevent from decreasing a resolving power of luminance gray scales by setting a dynamic range of an analog digital converter according to a peak value of an analog picture signal. Further, a luminance control signal for determining a luminous level of the picture to be displayed is set according to the peak value of the analog picture signal. As the result, the interface device according to the present invention can generate a display signal displaying a picture having a sufficient resolving power of gray scales with a luminance (brightness) required for the darkness, even if a dark picture, of which analog picture signal is comparatively small, is generated.
    • 本发明涉及一种显示装置,其具有能够防止灰暗图像信号的灰度分辨率降低的接口装置。 根据本发明的接口装置被提供以通过根据模拟图像信号的峰值设置模拟数字转换器的动态范围来防止降低亮度灰度级的分辨率。 此外,根据模拟图像信号的峰值来设定用于确定要显示的图像的发光度的亮度控制信号。 结果,根据本发明的接口装置可以产生显示具有足够的灰度分辨能力的图像的显示信号,即使是暗图像,其中模拟图像信号 比较小,是生成的。
    • 10. 发明授权
    • Wave generation circuit for reading ROM data and generating wave signals
and flat matrix display apparatus using the same circuit
    • 用于读取ROM数据并产生波信号的波生成电路和使用相同电路的平面矩阵显示装置
    • US6052105A
    • 2000-04-18
    • US869227
    • 1997-06-04
    • Akira YamamotoMasaya TajimaToshio UedaHirohito KuriyamaKatsuhiro IshidaYoshikazu Kanazawa
    • Akira YamamotoMasaya TajimaToshio UedaHirohito KuriyamaKatsuhiro IshidaYoshikazu Kanazawa
    • G09F9/313G09G3/20G09G3/288G09G3/291G09G3/296G09G3/298G09G5/20H03B28/00G09G3/28G09C5/00G09G3/36
    • G09G3/2022G09G5/20G09G3/296
    • A wave generation circuit is disclosed, in which a complex waveform can be generated without increasing the ROM data amount or increasing the reading rate. Waveform data relating to a waveform and the generation thereof are stored in a ROM for each cycle. An address signal for reading the waveform data sequentially is produced sequentially by an address generation circuit. The waveform data read out are sequentially reproduced into a waveform signal by a waveform data output circuit. In a wave generating circuit including the ROM and the address generation circuit, the waveform data includes the extension information instructing to extend and reproduce the waveform data for a particular cycle. An extension and control circuit included in the wave generation circuit decides on the presence or absence of the extension information from the read waveform data, and in the presence of the extension information, controls the waveform data output circuit to maintain the output of a corresponding waveform signal while at the same time controlling the address generation circuit to retard the generation of the address signal. The wave generation circuit can generate a single waveform data in an extended form according to the extension information when the same data continues for a plurality of cycles, thereby reducing the waveform data amount and the ROM capacity.
    • 公开了一种波生成电路,其中可以在不增加ROM数据量或增加读取速率的情况下生成复杂波形。 与波形有关的波形数据及其生成存储在每个周期的ROM中。 用地址产生电路依次产生用于顺序读取波形数据的地址信号。 读出的波形数据通过波形数据输出电路顺序再现成波形信号。 在包括ROM和地址生成电路的波形发生电路中,波形数据包括指示在特定周期中扩展和再现波形数据的扩展信息。 包括在波形生成电路中的扩展和控制电路根据读取的波形数据确定扩展信息的存在或不存在,并且在扩展信息的存在下,控制波形数据输出电路以维持相应波形的输出 同时控制地址生成电路来延迟地址信号的产生。 当相同的数据持续多个周期时,波形发生电路可以根据扩展信息以扩展形式生成单个波形数据,从而减少波形数据量和ROM容量。