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    • 5. 发明申请
    • EFFECTIVE UTILIZATION OF AN INTEGRATED SELF-CARE PORTAL FOR AN ENRICHED CUSTOMER EXPERIENCE
    • 综合自助门户有效利用丰富的客户体验
    • US20130218782A1
    • 2013-08-22
    • US13532232
    • 2012-06-25
    • Manav SingalShivani GuptaMandeep Singh Sidhu
    • Manav SingalShivani GuptaMandeep Singh Sidhu
    • G06Q10/00
    • G06Q30/01G06Q30/02
    • This disclosure concerns an effective utilization of a self-care online portal containing enriched customer experience. Here the portal upon receiving a validated search string relevant to an issue faced and entered by the user through a web interface, displays the relevant information retrieved from the database by the server on the web interface thus enabling the user to resolve the issue by self-based on the retrieved relevant information. The user then gets rewarded for successful self-resolution of issue. Additionally, the user also gets an option of initiating one or more interaction channels comprising of but not restricted to a multimedia session or an audio conversation using a communicating device or a web enabled user discussion forums to further help in resolving the issue in a time effective optimized manner thereby creating an enriched customer experience.
    • 本公开涉及有效利用包含丰富的客户体验的自助在线门户。 这里门户在收到与用户通过Web界面面临和输入的问题相关的经过验证的搜索字符串时,在Web界面上显示服务器从数据库检索的相关信息,从而使用户能够通过自我解决问题来解决问题, 基于检索到的相关信息。 然后用户获得成功的自我解决问题的回报。 此外,用户还获得启动一个或多个包括但不限于多媒体会话或使用通信设备或使用网络的用户论坛的音频会话的交互信道的选项,以进一步帮助在有效的时间内解决该问题 优化的方式,从而创造丰富的客户体验。
    • 6. 发明授权
    • High voltage reset method for increasing the dynamic range of a CMOS image sensor
    • 高电压复位方法,用于增加CMOS图像传感器的动态范围
    • US06864920B1
    • 2005-03-08
    • US09939217
    • 2001-08-24
    • Willem J. KindtChristina P. PhanShivani Gupta
    • Willem J. KindtChristina P. PhanShivani Gupta
    • H04N5/355H04N5/374H04N5/376H04N5/335
    • H04N5/3745H04N5/374
    • A circuit and method for increasing the dynamic range of CMOS image sensors designed with a thin gate oxide layer. The circuit includes a high voltage supply circuit and a high voltage level shifter circuit. The high voltage supply circuit is configured to supply a voltage to the shifter circuit. The voltage has a voltage level higher than the maximum supply voltage of the associated fabrication process. The shifter circuit is configured to output a high reset signal based on a reset signal generated to reset a pixel circuit of a pixel array. Instead of the reset signal, the high reset signal is coupled to a gate of the reset transistor in the pixel circuit. The high reset signal allows the reset transistor to maintain a gate to source potential less than the maximum supply voltage even when the high reset signal is greater than the maximum supply voltage.
    • 一种用于增加设计有薄栅极氧化物层的CMOS图像传感器的动态范围的电路和方法。 该电路包括高压电源电路和高电压电平移位电路。 高压电源电路被配置为向移位器电路提供电压。 电压具有高于相关制造工艺的最大电源电压的电压电平。 移位器电路被配置为基于产生以复位像素阵列的像素电路的复位信号来输出高复位信号。 代替复位信号,高复位信号耦合到像素电路中的复位晶体管的栅极。 高复位信号允许复位晶体管即使当高复位信号大于最大电源电压时,仍将栅极至源极电位保持为小于最大电源电压。
    • 7. 发明授权
    • Method and system for performing object file modifications
    • 用于执行对象文件修改的方法和系统
    • US08589345B2
    • 2013-11-19
    • US13427418
    • 2012-03-22
    • Shivani Gupta
    • Shivani Gupta
    • G06F17/30
    • G06F17/30194
    • A method and apparatus for performing object modifications by using change-specific executable files comprises accessing at least one modification stub associated with an object file, wherein the modification stub comprises an instruction for modifying the object file, wherein the instruction identifies an element in the object file and defines instructions for modifying the identified element; applying a selected modification stub to the object file; and modifying the object file per the instruction contained in the modification stub.
    • 一种用于通过使用特定于可变文件执行对象修改的方法和装置,包括访问与目标文件相关联的至少一个修改存根,其中所述修改存根包括用于修改所述目标文件的指令,其中所述指令标识所述对象中的元素 文件并定义用于修改所识别的元素的指令; 将选定的修改存根应用于对象文件; 并根据修改存根中包含的指令修改目标文件。
    • 8. 发明授权
    • Constant voltage charge-pump circuit with feedback
    • 具有反馈的恒压充电泵电路
    • US06828851B1
    • 2004-12-07
    • US10286096
    • 2002-10-31
    • Bumha LeeShivani GuptaChristina Phan
    • Bumha LeeShivani GuptaChristina Phan
    • G05F1575
    • H02M3/07
    • A charge-pump circuit generates a constant voltage higher than the available power supply. A feedback path maintains the voltage at a constant level in spite of power supply, temperature and process variations. This charge pump circuit includes a switched capacitor interface arranged to generate a target voltage that is used to activate and deactivate a bypass capacitor interface to maintain the constant voltage. The bypass capacitor interface is configured to complete the feedback path. The feedback helps to ensure that node n1, that is coupled to the output of the charge pump, stays at a constant potential, irrespective of the power supply voltage.
    • 电荷泵电路产生比可用电源高的恒定电压。 尽管电源,温度和工艺变化,反馈路径仍将电压保持在恒定水平。 该电荷泵电路包括开关电容器接口,其布置成产生用于激活和去激活旁路电容器接口以维持恒定电压的目标电压。 旁路电容接口被配置为完成反馈路径。 反馈有助于确保与电荷泵的输出耦合的节点n1保持在恒定电位,而与电源电压无关。
    • 9. 发明授权
    • Parallel index maintenance
    • 并行索引维护
    • US06438562B1
    • 2002-08-20
    • US09379625
    • 1999-08-24
    • Shivani GuptaWilliam H. WaddingtonBenoit Dageville
    • Shivani GuptaWilliam H. WaddingtonBenoit Dageville
    • G06F1730
    • G06F17/30336Y10S707/99952Y10S707/99953
    • A method, system and product for coordinating a parallel update for a global index of an indexed table involves a coordinator process and slave processes. The coordinator process receives index maintenance records from data manipulation slaves for an indexed table. Each index maintenance record includes a value for an index key of a global index of the table. The coordinator process computes index key value ranges and sends each range to an index update slave. Each slave updates the global index using just the index maintenance records with key values in its respective range, thus avoiding contention among the slaves and increasing clustering so that scaleable parallelism may be more closely attained. Techniques are also described for deferring the maintenance of global indexes relative to the time when the table on which they are built is changed.
    • 用于协调索引表的全局索引的并行更新的方法,系统和产品涉及协调程序进程和从属进程。 协调器进程从索引表的数据操作从站接收索引维护记录。 每个索引维护记录包括表的全局索引的索引关键字的值。 协调器进程计算索引键值范围,并将每个范围发送到索引更新从站。 每个从站使用仅具有相应范围内的关键值的索引维护记录来更新全局索引,从而避免了从站之间的竞争并增加了聚类,从而可以更加可靠地实现可扩展的并行性。 还描述了相对于更改其构建表的时间推迟全局索引的维护的技术。
    • 10. 发明授权
    • Circuit including segmented switch array for capacitive loading reduction
    • 电路包括用于电容负载减少的分段开关阵列
    • US06380791B1
    • 2002-04-30
    • US09572022
    • 2000-05-16
    • Shivani GuptaChristina Phan
    • Shivani GuptaChristina Phan
    • G05F110
    • G06F1/26
    • An integrated circuit having at least one segmented array of switches, wherein the root node of each segmented array of switches is a node whose potential varies with time during operation. Each segmented switch array includes switches connected between nodes having a tree structure. The nodes include the root node and additional nodes of at least two different degrees relative to the root node. By providing a segmented array (rather than a non-segmented array) of switches at a node, the total load capacitance (including parasitic capacitance) at the node is reduced in accordance with the invention. In preferred embodiments, the invention is an analog integrated circuit having a first node at which the potential varies rapidly, and a segmented array of switches whose root node is the first node. Another aspect of the invention is a method for designing an integrated circuit to have reduced load capacitance (e.g., load capacitance due to parasitic capacitance) at at least one sensitive node, including the steps of identifying a sensitive node of a preliminary design for the circuit, wherein an array of switches is coupled to the sensitive node; and determining a refined design for the circuit in which the array is replaced by a segmented switch array comprising switches connected between nodes having a tree structure, wherein the nodes include a root node, and the root node is the sensitive node.
    • 具有至少一个开关分段阵列的集成电路,其中每个分段开关阵列的根节点是其运行期间其电位随时间变化的节点。 每个分段交换机阵列包括连接在具有树结构的节点之间的交换机。 节点包括根节点和相对于根节点至少两个不同度的附加节点。 通过在节点处提供开关的分段阵列(而不是非分段阵列),根据本发明减少了节点处的总负载电容(包括寄生电容)。 在优选实施例中,本发明是具有电位变化迅速的第一节点和其根节点是第一节点的分段阵列的模拟集成电路。 本发明的另一方面是一种用于设计集成电路以在至少一个敏感节点处具有降低的负载电容(例如由于寄生电容引起的负载电容)的方法,包括以下步骤:识别电路的初步设计的敏感节点 其中开关阵列耦合到所述敏感节点; 以及确定所述电路的精细设计,其中所述阵列由包括连接在具有树结构的节点之间的交换机的分段交换机阵列替换,其中所述节点包括根节点,并且所述根节点是所述敏感节点。